NLSXN5004DTR2G [ONSEMI]
4-Bit 100 Mb/s Configurable Dual-Supply Level Translator;
| 型号： | NLSXN5004DTR2G |
| 厂家： | 
ONSEMI |
| 描述： | 4-Bit 100 Mb/s Configurable Dual-Supply Level Translator |
| 文件： | 总16页 (文件大小：236K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
4-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
NLSX5004, NLSXN5004
The NLSX5004 and NLSXN5004 are 4−bit configurable
dual−supply autosensing bidirectional level translators that do not
require direction control pins. The A− and B−ports are designed to
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track two different power supply rails, V
and V
respectively.
CCA
CCB
Both the V
configurable from 0.9 V to 3.6 V.
and the V
supply rails are independently−
MARKING
DIAGRAMS
CCA
CCB
1
The NLSX5004 and NLSXN5004 have high dynamic output
current capability, allowing the translators to drive high capacitive
loads.
Enable input pins are available to reduce the power consumption.
These pins may be used to disable both A− and B−ports by putting
them in 3−state significantly reducing the supply current from both
A2M
G
UQFN12
MU SUFFIX
CASE 523AE
14
1
14
XXXXXXXXXG
AWLYWW
V
CCA
and V
. These pins are referenced to the V
supply. The
1
CCB
CCA
SOIC14
D SUFFIX
CASE 751A
NLSX5004 has an active−High enable (EN) while the NLSXN5004
has active−Low enable (EN).
Features
• Wide V
, V
Operating Range: 0.9 V to 3.6 V
CCB
CCA
14
14
• V
and V
are independent
CCB
CCA
XXXX
XXXX
ALYWG
G
− V
may be greater than, equal to, or less than V
CCA
CCB
1
• High 100 pF Capacitive Drive Capability
TSSOP14
DT SUFFIX
CASE 948G
• High−Speed w/ 140 Mbps Guaranteed Date Rate for V
,
CCA
1
V
CCB
> 1.8 V
• Low Bit−to−Bit skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Power−Up Sequencing
• Partial Power−Off Protection
• Available packaging:
1
XXXX
AYW
G
QFN14
MN SUFFIX
CASE 485DE
UQFN−12, SOIC14, TSSOP14, QFN−14, Other packages
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
XXXXX
XXXXX
ALYWG
G
QFN14
MN SUFFIX
CASE 485AL
• These Devices are Pb−Free, Halogen Free/BFR Free and RoHS
Compliant
XXXXX = Specific Device Code
Typical Applications
• Mobile Phones, Infotainment Systems, Other Devices
M
A
= Date Code
= Assembly Location
L or WL = Wafer Lot
= Year
Important Information
Y
W or WW = Work Week
• ESD Protection for All Pins:
HBM (Human Body Model) − 2000 V
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
February, 2021 − Rev. 1
NLSX5004/D
NLSX5004, NLSXN5004
+1.8 V
+3.6 V
VCCA
VCCB
NLSX500n /
NLSXN500n
+1.8 V
System
+3.6 V
System
IO1
A1
An
B1
B2
IO1
IOn
IOn
IOx
GND
EN/EN
GND
GND
Figure 1. Typical Application Circuit
VCCA
VCCB
P
ONE−SHOT
R1
N
ONE−SHOT
A
B
P
ONE−SHOT
R2
EN /
EN
N
ONE−SHOT
R1 = 1 kΩ, R2 = 1 kΩ
Figure 2. Functional Diagram (1 I/O Line)
VCCA
VCCB
A1
B1
Bn
An
GND
EN / EN
n = 4
Figure 3. Logic Diagram
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2
NLSX5004, NLSXN5004
PIN ASSIGNMENTS
Figure 4. UQFN12
Figure 5. QFN14 (2.5 x 3.0)
Figure 6. TSSOP / SOIC
Figure 7. QFN14 (3.5 x 3.5)
FUNCTION TABLE
PIN DESCRIPTIONS
Pins
Description
A−Port Supply Voltage
NLSX500n
NLSXN500n
Operating
V
CCA
V
CCB
EN
L
EN
H
Mode
An and Bn at Hi−Z
An and Bn Connected
B−Port Supply Voltage
Ground
GND
EN
H
L
Active−High Enable (NLSX500n),
Referenced to V
CCA
EN
Active−Low Enable (NLSXN500n),
Referenced to V
CCA
An
Bn
A−Port, Referenced to V
B−Port, Referenced to V
CCA
CCB
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3
NLSX5004, NLSXN5004
Table 1. MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
V
V
CCA
V
CCB
A−side DC Supply Voltage
−0.5 to +4.6
−0.5 to +4.6
−0.5 to +4.6
−0.5 to +4.6
−0.5 to +4.6
B−side DC Supply Voltage
V
V
IN
Input/Output Voltage
EN/EN
= 0 V)
V
Power Down Mode (V
and/or V
CCB
CCA
Tri−State Mode (EN = L or EN = H)
Active Mode
A−Port
B−Port
−0.5 to V
+0.5
CCA
−0.5 to V
+0.5
CCB
I
DC Input Diode Current
DC Output Diode Current
−50
V
< GND
V < GND
O
mA
mA
mA
mA
mA
°C
IK
IN
I
−50
100
100
100
OK
I
I
DC Supply Current Through V
DC Supply Current Through V
CCA
CCB
GND
CCA
CCB
I
DC Ground Current Through Ground Pin
Storage Temperature
T
STG
−65 to +150
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 2. RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
0.9
Max
3.6
3.6
3.6
3.6
3.6
Unit
V
V
CCA
V
CCB
A−Port Supply Voltage
B−Port Supply Voltage
Input/Output Voltage
0.9
V
V
I
EN/EN
= 0 V)
GND
GND
GND
GND
GND
−40
V
Power Down Mode (V
and/or V
CCB
CCA
Tri−State Mode (EN = L or EN = H)
Active Mode
A−Port
B−Port
V
CCA
CCB
V
T
A
Operating Temperature Range
Input Transition Rise or Fall Rate
+125
°C
nt/nV
V from 30% to 70% of V
I
/V
0
10
nS
CCA CCB
Functionaloperation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the
Recommended Operating Ranges limits may affect device reliability.
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4
NLSX5004, NLSXN5004
Table 3. DC ELECTRICAL CHARACTERISTICS
−405C to +855C
−405C to +1255C
Typ
(Note 2)
Min
A, EN/EN 0.9−3.6 0.9−3.6 0.65 *
Max
Min
Max
Symbol
Parameter
Test Conditions (Note 1) Pin/Port
V
CCA
(V) V
(V)
Unit
CCB
V
IH
Input HIGH
Voltage
−
−
0.65 *
−
V
V
V
CCA
CCA
B
0.9−3.6 0.9−3.6 0.65 *
−
−
−
−
−
−
0.65 *
CCB
−
V
V
V
V
V
V
V
CCB
V
IL
Input LOW
Voltage
A, EN/EN 0.9−3.6 0.9−3.6
−
0.35 *
CCA
−
0.35 *
CCA
V
V
B
A
B
0.9−3.6 0.9−3.6
−
0.35 *
CCB
−
0.35 *
CCB
V
V
V
Output HIGH
Voltage
I
I
= −20 mA
= 20 mA
0.9−3.6 0.9−3.6 0.9 *
−
0.9 *
−
OH
OH
V
CCA
V
CCA
0.9−3.6 0.9−3.6 0.9 *
−
0.9 *
−
V
CCB
V
CCB
V
Output LOW
Voltage
A
B
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
−
−
−
0.2
0.2
−
0.2
0.2
V
V
OL
OL
−
−
I
Tristate Output
Leakage
(EN = 0V or EN = V
);
mA
OZ
CCA
(A = 0 V or V
(B = 0 V or V
)
A
B
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
−
−
−
0.01
0.01
0.01
1.5
1
−
−
−
4.5
3.5
3
CCA
CCB
)
I
I
Input Pin
Leakage
V
IN
= 0 V to V
CCA
EN/EN
1
mA
mA
I
Supply Current (EN = V
or EN = 0 V);
V
V
V
V
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
0.9−3.6 0.9−3.6
−
−
−
−
−
−
−
0.4
0.3
2.0
1.5
1.5
1.5
1.5
1.5
1.5
−
−
−
−
−
−
−
6.0
6.0
7.0
6.0
5.0
5.0
5.0
CC
CCA
CCA
CCB
CCA
CCB
I
= 0 A, (A = 0 V, B = 0 V)
O
or (A = V
, B = V
)
CCA
CCB
I
Tristate Output
Mode Supply
Current
(EN = 0V or EN = V
(A = 0 V, B = 0 V) or
(A = V , B = V
),
0.2
mA
mA
CCZ
CCA
0.2
)
CCB
CCA
I
Power Off
Leakage
A = 0 to 3.6 V,
B = 0 to 3.6 V
A, B
0
0.9−3.6
0
0
0
0.02
0.01
0.01
OFF
0.9−3.6
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performancemay not be indicated by the Electrical Characteristics if operated under different conditions.
1. Normal test conditions are V = 0 V, C ≤ 15 pF and C ≤ 15 pF, unless otherwise specified.
I
LA
LB
2. Typical values are for T = +25°C. All units are production tested at T = +25°C. Limits over the operating temperature range are guaranteed
A
A
by design.
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5
NLSX5004, NLSXN5004
Table 4. TIMING CHARACTERISTICS
−405C to +855C
−405C to +1255C
Typ
(Note 4)
Min
Max
Min
Max
Symbol
Parameter
Test Conditions (Note 3)
V
CCA
(V) V
(V)
Unit
CCB
0.9−3.6 0.9−3.6
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
8.8
7.3
9.9
4.9
5.8
4.6
5.7
4.3
8.8
9.9
7.3
5.8
4.9
5.7
4.6
4.3
9.1
7.8
10.8
6.2
6.0
6.1
4.2
4.5
9.1
10.8
7.8
6.0
6.2
4.2
6.1
4.5
9.4
8.1
11.1
6.5
6.2
6.3
4.3
4.7
9.4
11.1
8.1
6.2
6.5
4.3
6.3
4.7
30
9
12
7
7.5
6
7
9.5
30
12
9
7.5
7
7
6
9.5
32
9.3
12.6
7.4
7.9
7.4
6.5
10
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
35
9
12
7
7.5
6
7
10
35
12
9
7.5
7
7
6
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
A to B
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
C = 15 pF
L
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
B to A
A to B
B to A
A to B
B to A
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
10
35
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
9.3
12.6
7.4
7.9
7.4
6.5
10.5
35
12.6
9.3
8.0
7.4
6.5
7.4
10.5
37
9.5
13.6
7.6
8.3
7.6
6.6
10.8
37
13.6
9.5
8.3
7.6
6.6
7.6
10.8
1.8−3.6 1.8–3.6
0.9–3.6 0.9–3.6
t
Propagation Delay
C = 30 pF
ns
PD
L
32
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
12.6
9.3
7.9
7.4
6.5
7.4
10
1.8−3.6 1.8–3.6
0.9–3.6 0.9–3.6
35
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
9.5
13.6
7.6
8.2
7.6
6.6
10.3
35
13.6
9.5
8.2
7.6
6.6
7.6
10.3
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
C = 50 pF
L
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
1.8–3.6 1.8–3.6
3. Typical values are for T = +25°C. Limits over the operating temperature range are guaranteed by design.
A
4. Guaranteed by design.
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6
NLSX5004, NLSXN5004
Table 4. TIMING CHARACTERISTICS (continued)
−405C to +855C
−405C to +1255C
Typ
(Note 4)
Min
Max
Min
Max
Symbol
Parameter
Test Conditions (Note 3)
V
CCA
(V) V
(V)
Unit
CCB
0.9–3.6 0.9–3.6
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
9.9
8.4
11.5
5.5
6.9
5.1
6.8
5.0
9.9
11.5
8.4
6.9
5.5
6.8
5.1
5.0
2.5
2.0
0.6
0.5
2.5
2.0
0.6
0.5
2.5
1.8
0.6
0.5
2.5
1.8
0.6
0.5
−
10
14
8.3
8.9
6.7
8.2
11
−
14
10
8.9
8.3
8.2
6.7
11
4.5
3.0
2.0
2.5
4.5
3.0
2.0
2.5
6.0
3.0
2.0
2.5
6.0
3.0
2.0
2.5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
10
14
8.3
9.0
6.8
8.2
11.5
−
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
A to B
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
t
Propagation Delay
C = 100 pF
L
ns
PD
1.2
1.8
1.8
2.8
1.8
3.3
1.8
1.2
2.8
1.8
3.3
1.8
14
10
9.0
8.3
8.2
6.8
11.5
4.5
3.0
2.0
2.5
4.5
3.0
2.0
2.5
6.0
3.0
2.0
2.5
6.0
3.0
2.0
2.5
B to A
1.8–3.6 1.8–3.6
0.9–1.2
1.2–1.8
1.8–2.8
A
B
A
B
0.9–3.6
2.8–3.6
0.9–1.2
1.2–1.8
t
Output Rise Time trial C = 15 pF
ns
R
L
0.9–3.6
1.8–2.8
2.8–3.6
0.9–1.2
1.2–1.8
1.8–2.8
0.9–3.6
2.8–3.6
0.9–1.2
1.2–1.8
t
Output Fall Time trial
C = 15 pF
L
ns
ns
F
0.9–3.6
1.8–2.8
2.8–3.6
Channel−to−Channel
Skew
t
0.9–3.6 0.9–3.6
−
−
0.15
−
0.15
SK
0.9–3.6 0.9–3.6
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.8–3.6 1.8–3.6
0.9–3.6 0.9−3.6
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.8–3.6 1.8–3.6
50
140
40
120
30
100
20
60
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
50
140
40
120
30
100
20
60
−
−
−
−
−
−
−
−
C = 15 pF
L
C = 30 pF
L
MDR
Maximum Data Rate
Mbps
C = 50 pF
L
C = 100 pF
L
EN = V
or
CCA
EN = 0 V
A = 1 MHz Sq Wave,
Input Driver Peak
Current
A
B
0.9–3.6 0.9–3.6
0.9–3.6 0.9–3.6
−
−
−
−
5.0
5.0
−
−
5.0
5.0
I
mA
I_PEAK
Amplitude = V
CCA
B = 1 MHz Sq Wave,
Amplitude = V
CCB
3. Typical values are for T = +25°C. Limits over the operating temperature range are guaranteed by design.
A
4. Guaranteed by design.
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7
NLSX5004, NLSXN5004
Table 4. TIMING CHARACTERISTICS (continued)
−405C to +855C
−405C to +1255C
Typ
(Note 4)
Min
Max
Min
Max
Symbol
Parameter
Test Conditions (Note 3)
V
(V) V
(V)
Unit
CCA
0.9
1.8
3.6
CCB
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
37
20
10
37
20
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
A
0.9–3.6
Z
O
1−Shot Output
W
(Note 4) Impedance
0.9
1.8
3.6
B
0.9–3.6
10
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
0.9–3.6 0.9–3.6
1.2–1.8 1.2–1.8
1.8–2.8 1.8–2.8
1.8–3.6 1.8–3.6
116.3
64.5
49.6
42.5
113.4
100
94.3
90.9
116.3
64.5
49.6
42.5
113.4
100
200
180
150
100
300
250
200
170
200
180
150
100
300
250
200
170
600
350
350
300
400
300
300
250
600
350
350
300
400
300
300
250
200
180
150
100
300
250
200
170
200
180
150
100
300
250
200
170
600
350
350
300
400
300
300
250
600
350
350
300
400
300
300
250
C = 15 pF; B = V
L
CCB
EN/EN
to A
C = 15 pF; B = 0 V
L
ns
t
Output Enable Time
EN
C = 15 pF; A = V
L
CCA
EN/EN
to B
C = 15 pF; A = 0 V
L
ns
94.3
90.9
255
180
C = 15 pF; B = V
L
CCB
166.7
155.6
156.7
140
130.2
124.6
255
EN/EN
to A
C = 15 pF; B = 0 V
L
t
Output Disable Time
ns
DIS
180
C = 15 pF; A = V
L
CCA
166.7
155.6
156.7
140
130.2
124.6
EN/EN
to B
C = 15 pF; A = 0 V
L
3. Typical values are for T = +25°C. Limits over the operating temperature range are guaranteed by design.
A
4. Guaranteed by design.
www.onsemi.com
8
NLSX5004, NLSXN5004
NLSX500n
NLSX500n
VCCB
VCCA
VCCA
EN/EN
VCCB
VCCA
EN/EN
VCCB
VCCB
VCCA
VCCA
GND
/
VCCA
GND
/
A
B
A
B
CLA
CLB
SOURCE
SOURCE
Figure 8. Driving A−Port Test Circuit (tPD
)
Figure 9. Driving B−Port Test Circuit (tPD)
Input
tr/tf v3 ns
VCC
90%
INPUT
A or B
50%
GND
10%
tPHL
tPLH
VOH
90%
50%
10%
OUTPUT
B or A
VOL
tF
tR
Figure 10. tPD (tPLH/tPHL) Propagation Delay Measurements
NLSX500n
NLSX500n
EN/EN
2 * (VCCB / VCCA)
EN/EN
50 kΩ
50 kΩ
SOURCE
SOURCE
B / A
A / B
B / A
A / B
15 pF
50 kΩ
VCCA
VCCB
/
15 pF
Figure 11. Enable/Disable Test Circuit (tPZH/tPHZ
)
Figure 12. Enable/Disable Test Circuit (tPZL/tPLZ)
EN
VCCA
INPUT
A or B
VCCA/2
EN
GND
tPLZ
tPZL
High
Impedance
50%
50%
10%
90%
VOL
VOH
OUTPUT
B or A
tPZH
tPHZ
High
Impedance
Figure 13. tEN/tDIS (tPZL/tPLZ/tPZH/tPHZ) Propagation Delay Measurements
www.onsemi.com
9
NLSX5004, NLSXN5004
IMPORTANT APPLICATIONS INFORMATION
Level Translator Architecture
Driving the NLSX5004 Enable pin (EN) to a low logic
level minimizes the power consumption of the device and
drives the A− and B−ports to high impedance states.
Normal translation operation occurs when the EN pin is
equal to a logic high signal.
Driving NLSXN5004 Enable pin (EN) to a high logic
level minimizes the power consumption of the device and
drives the A− and B−ports to high impedance states.
Normal translation operation occurs when the EN pin is
equal to a logic low signal.
The NLSX5004 and the NLSXN5004 auto−sense
translators provide bi−directional logic voltage level
shifting to transfer data in multiple supply voltage systems.
These level translators have two supply voltages, V
and
CCA
V , which set the logic levels on the input and output
CCB
sides of the translator. When used to transfer data from the
A to the B ports, input signals referenced to the V
supply are translated to output signals with a logic level
CCA
matched to V . In a similar manner, the B to A
CCB
translation shifts input signals with a logic level compatible
to V to an output signal matched to V
Both EN and EN pins are referenced to the V
and are Over−Voltage Tolerant (OVT).
supply
CCA
.
CCA
CCB
The NLSX5004 and the NLSXN5004 translators consist
of bi−directional channels that independently determine
the direction of the data flow without requiring a
directional pin. One−shot circuits are used to detect the
rising or falling input signals. In addition, the one−shots
decrease the rise and fall times of the output signal for
high−to−low and low−to−high transitions.
Uni−Directional versus Bi−Directional Translation
The NLSX5004 and NLSXN5004 translators can
function as non−inverting uni−directional translators. One
advantage of using these translators as uni−directional
devices is that each I/O−port can be configured as either an
input or an output. The configurable input or output feature
is especially useful in applications such as SPI that use
multiple uni−directional I/O lines to send data to and from
a device. The flexible I/O port of the auto sense translator
simplifies the trace connections on the PCB.
Input Driver Requirements
The NLSX5004 and NLSXN5004 support high data
rates, but these translators have relatively modest DC
output current drive. The high data rate of the
bi−directional I/O circuit is used to quickly transform from
an input to an output driver and vice versa. Each I/O port
has a modest DC current output so that the internal output
driver can be over−driven when data is sent in the opposite
direction. For proper operation, the input driver to the
auto−sense translator should be capable of driving 5.0 mA
of peak output current. The bi−directional configuration of
the translator results in both input stages being active for a
very short time period. Although the peak current required
from the input signal circuit is relatively large, the average
current is small and consistent with a standard CMOS input
stage.
Power Supply Guidelines
The values of the V
and V
supplies can be set to
CCA
CCB
anywhere between 0.9 and 3.6 V. Design flexibility is
maximized because V may be either greater than, equal
CCA
to or less than the V
supply.
CCB
The sequencing of the power supplies will not damage
the device during power−up operation. In addition, the A−
and B−ports are in high impedance states if either supply
voltage is equal to 0 V. For optimal performance, 0.01 to
0.1 µF decoupling capacitors should be used on the V
CCA
and V
power supply pins. Ceramic capacitors are a
CCB
good design choice to filter and bypass any noise signals on
the voltage lines to the ground plane of the PCB. The noise
immunity will be maximized by placing the capacitors as
close as possible to the supply and ground pins, along with
minimizing the PCB connection traces.
Enable Input (EN/EN)
The NLSX5004 and NLSXN5004 translators have
enable pins that provide tri−state operation at the I/O ports.
www.onsemi.com
10
NLSX5004, NLSXN5004
DEVICE ORDERING INFORMATION
Device Order Number
†
Package Type
UQFN−12
Tape & Reel Size
3000 Units/Reel
3000 Units/Reel
NLSX5004MUTAG
NLVSX5004MUTAG*
UQFN−12
NLSX5004DR2G
(In Development)
SOIC14
SOIC14
2500 Units/Reel
2500 Units/Reel
2500 Units/Reel
2500 Units/Reel
NLVSX5004DR2G*
(In Development)
NLSX5004DTR2G
(In Development)
TSSOP14
TSSOP14
NLVSX5004DTR2G*
(In Development)
NLSX5004MN1TXG
(In Development)
QFN14, 3.5 x 3.5 x 0.5P
QFN14, 3.5 x 3.5 x 0.5P
QFN14, 2.5 x 3.0 x 0.5P
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
NLVSX5004MN1TXG*
NLSX5004MN1TWG
(In Development)
NLVSX5004MN1TWG*
(In Development)
QFN14, 2.5 x 3.0 x 0.5P
UQFN−12
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
2500 Units/Reel
2500 Units/Reel
2500 Units/Reel
2500 Units/Reel
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
NLSXN5004MU2TAG
(In Development)
NLVSXN5004MU2TAG*
(In Development)
UQFN−12
NLSXN5004DR2G
(In Development)
SOIC14
NLVSXN5004DR2G*
(In Development)
SOIC14
NLSXN5004DTR2G
(In Development)
TSSOP14
NLVSXN5004DTR2G*
(In Development)
TSSOP14
NLSXN5004MN1TXG
(In Development)
QFN14, 3.5 x 3.5 x 0.5P
QFN14, 3.5 x 3.5 x 0.5P
QFN14, 2.5 x 3.0 x 0.5P
QFN14, 2.5 x 3.0 x 0.5P
NLVSXN5004MN1TXG*
(In Development)
NLSXN5004MN1TWG
(In Development)
NLVSXN5004MN1TWG*
(In Development)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
www.onsemi.com
11
NLSX5004, NLSXN5004
PACKAGE DIMENSIONS
UQFN12 1.7x2.0, 0.4P
CASE 523AE
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
D
A B
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM TERMINAL TIP.
L1
PIN 1 REFERENCE
4. MOLD FLASH ALLOWED ON TERMINALS
ALONG EDGE OF PACKAGE. FLASH 0.03
MAX ON BOTTOM SURFACE OF
TERMINALS.
5. DETAIL A SHOWS OPTIONAL
CONSTRUCTION FOR TERMINALS.
DETAIL A
E
NOTE 5
0.10
0.10
C
C
2X
2X
MILLIMETERS
TOP VIEW
DIM MIN
MAX
0.55
0.05
A
A1
A3
b
0.45
0.00
0.127 REF
DETAIL B
A
0.15
0.25
0.05
0.05
C
DETAIL B
OPTIONAL
CONSTRUCTION
D
1.70 BSC
2.00 BSC
0.40 BSC
E
e
12X
C
K
0.20
----
0.55
0.03
A1
SEATING
PLANE
C
L
0.45
0.00
0.15 REF
A3
SIDE VIEW
L1
L2
8X
K
5
1
7
DETAIL A
12X L
e
MOUNTING FOOTPRINT
SOLDERMASK DEFINED
2.00
11
12X
b
0.10
1
L2
M
M
C A B
C
BOTTOM VIEW
0.05
NOTE 3
0.40
0.32
PITCH
2.30
11X
0.22
12X
0.69
DIMENSIONS: MILLIMETERS
www.onsemi.com
12
NLSX5004, NLSXN5004
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE L
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
0.25
C A
B
DETAIL A
h
A
X 45
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
0.10
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
www.onsemi.com
13
NLSX5004, NLSXN5004
PACKAGE DIMENSIONS
TSSOP−14 WB
CASE 948G
ISSUE C
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
N
0.25 (0.010)
14
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
−V−
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
J1
K
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
www.onsemi.com
14
NLSX5004, NLSXN5004
PACKAGE DIMENSIONS
QFN14, 2.5x3.0, 0.5P
CASE 485DE
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
D
A
B
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
PIN ONE
REFERENCE
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
MILLIMETERS
E
A
DIM MIN
MAX
1.00
0.05
A
A1
A3
b
0.80
0.00
0.20 REF
EXPOSED Cu
MOLD CMPD
0.10
C
2X
0.20
0.30
D
2.50 BSC
D2
E
0.90
1.40
1.10
0.10
C
2X
3.00 BSC
TOP VIEW
E2
e
1.60
DETAIL B
0.50 BSC
ALTERNATE
L
0.30
---
0.50
0.05
CONSTRUCTIONS
DETAIL B
L1
0.05
0.05
C
(A3)
A1
RECOMMENDED
SOLDERING FOOTPRINT*
C
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
2.80
14X
0.63
1.18
DETAIL A
6
1
14X
L
7
8
9
1.68
3.33
E2
14X
0.32
13
2
14X
NOTE 3
b
C A B
1
14
PACKAGE
OUTLINE
M
M
e
0.10
0.05
0.50
PITCH
e/2
C
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
www.onsemi.com
15
NLSX5004, NLSXN5004
PACKAGE DIMENSIONS
QFN14 3.5x3.5, 0.5P
CASE 485AL
ISSUE O
EDGE OF PACKAGE
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN 1
LOCATION
L1
DETAIL A
DETAIL A
MILLIMETERS
OPTIONAL PIN
OPTIONAL PIN
CONSTRUCTION
E
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
CONSTRUCTION
A
A3
b
D
0.20 REF
0.18
0.30
3.50 BSC
MOLD CMPD
EXPOSED Cu
2X
2X
0.15
C
D2 1.90
2.15
E
3.50 BSC
E2 1.90
2.15
TOP VIEW
SIDE VIEW
0.15
C
e
e2
K
0.50 BSC
1.50 BSC
0.20
0.30
(A3)
−−−
0.50
0.03
0.10
0.08
C
DETAIL B
L
L1 0.00
OPTIONAL PIN
CONSTRUCTION
A
C
NOTE 4
A1
SEATING
PLANE
SOLDERING FOOTPRINT*
C
DETAIL B
DETAIL A
2X
3.80
0.63
D2
14X
14X
14X
0.36
K
7
9
14X
L
2X 2.12
E2
e
2
0.50
PITCH
14
1
14X b
1.50 PITCH
DIMENSIONS: MILLIMETERS
0.10 C A
0.05
B
e2
C
NOTE 3
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent− Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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