NLV14060BDG [ONSEMI]
14-Bit Binary Counter and Oscillator;
| 型号： | NLV14060BDG |
| 厂家： | 
ONSEMI |
| 描述： | 14-Bit Binary Counter and Oscillator |
| 文件： | 总8页 (文件大小：145K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14060B
14-Bit Binary Counter and
Oscillator
The MC14060B is a 14−stage binary ripple counter with an on−chip
oscillator buffer. The oscillator configuration allows design of either
RC or crystal oscillator circuits. Also included on the chip is a reset
function which places all outputs into the zero state and disables the
oscillator. A negative transition on Clock will advance the counter to
the next state. Schmitt trigger action on the input line permits very
slow input rise and fall times. Applications include time delay circuits,
counter controls, and frequency dividing circuits.
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This device contains protection circuitry to guard against damage due
to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated
SOIC−16
D SUFFIX
CASE 751B
SOEIAJ−16
F SUFFIX
CASE 966
TSSOP−16
DT SUFFIX
CASE 948F
voltages to this high−impedance circuit. For proper operation, V and
in
PIN ASSIGNMENT
V
should be constrained to the range V ≤ (V or V ) ≤ V
.
out
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either V or V ). Unused outputs must be left open.
Q12
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
V
DD
SS
DD
Q13
Q14
Q6
Q10
Features
Q8
• Fully Static Operation
Q9
• Diode Protection on All Inputs
Q5
RESET
CLOCK
OUT 1
OUT 2
• Supply Voltage Range = 3.0 V to 18 V
Q7
• Capable of Driving Two Low−power TTL Loads or One
Low−power Schottky TTL Load Over the Rated Temperature
Range
Q4
V
SS
9
• Buffered Outputs Available from Stages 4 Through 10 and
12 Through 14
MARKING DIAGRAMS
• Common Reset Line
• Pin−for−Pin Replacement for CD4060B
16
16
1
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
14060BG
AWLYWW
MC14060B
ALYWG
1
SOIC−16
SOEIAJ−16
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
16
1
Symbol
Parameter
Value
Unit
V
14
060B
ALYW G
G
V
DD
DC Supply Voltage Range
−0.5 to +18.0
V ,
Input or Output Voltage Range
(DC or Transient)
−0.5 to V
V
in
DD
V
out
+0.5
I ,
Input or Output Current
(DC or Transient) per Pin
10
mA
in
TSSOP−16
I
out
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
P
Power Dissipation, per Package
(Note 1)
500
mW
D
T
A
Ambient Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
260
°C
°C
°C
WW, W = Work Week
G or G
= Pb−Free Package
T
stg
(Note: Microdot may be in either location)
T
Lead Temperature (8 Second Soldering)
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/°C from 65°C To 125°C.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
August, 2014 − Rev. 10
MC14060B/D
MC14060B
Table 1. Truth Table
Clock
Reset
Output State
No Change
Advance to Next State
All Outputs are Low
L
L
H
H
X = Don’t Care
OUT 2
9
Q4
Q5
Q12
Q13
Q14
OUT 1
10
7
5
1
2
3
CLOCK
11
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
R
R
R
R
R
R
RESET
12
Q6 = PIN 4 Q8 = PIN 14 Q10 = PIN 15
Q7 = PIN 6 Q9 = PIN 13
V
= PIN 16
= PIN 8
DD
V
SS
Figure 1. Logic Diagram
ORDERING INFORMATION
Device
†
Package
Shipping
MC14060BDG
SOIC−16
(Pb−Free)
48 Units / Rail
48 Units / Rail
NLV14060BDG*
SOIC−16
(Pb−Free)
MC14060BDR2G
NLV14060BDR2G*
MC14060BDTR2G
NLV14060BDTR2G*
MC14060BFELG
SOIC−16
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2000 / Tape & Reel
SOIC−16
(Pb−Free)
TSSOP−16
(Pb−Free)
TSSOP−16
(Pb−Free)
SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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2
MC14060B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
−55°C
25°C
125°C
V
DD
Typ
(Note 2)
Min
Max
Min
Max
Min
Max
Vdc
Symbol
Characteristic
Output Voltage
Unit
V
OL
“0” Level
“1” Level
“0” Level
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
V
V
in
= V or 0
DD
V
OH
V
in
= 0 or V
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
V
V
DD
V
IL
Input Voltage
(V = 4.5 or 0.5 V)
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
O
(V = 9.0 or 1.0 V)
O
(V = 13.5 or 1.5 V)
O
V
IH
5.0
10
15
3.5
7.0
11.0
−
−
−
3.5
7.0
11.0
2.75
5.50
8.25
−
−
−
3.5
7.0
11.0
−
−
−
V
(V = 0.5 or 4.5 V)
“1” Level
O
(V = 1.0 or 9.0 V)
O
(V = 1.5 or 13.5 V)
O
V
IL
Input Voltage
(V = 4.5 Vdc)
“0” Level
(For Input 11
and Output 10)
Vdc
5.0
10
15
−
−
−
1.0
2.0
2.5
−
−
−
2.25
4.50
6.75
1.0
2.0
2.5
−
−
−
1.0
2.0
2.5
O
(V = 9.0 Vdc)
O
(V = 13.5 Vdc)
O
V
5.0
10
15
4.0
8.0
12.5
−
−
−
4.0
8.0
12.5
2.75
5.50
8.25
−
−
−
4.0
8.0
12.5
−
−
−
Vdc
mA
(V = 0.5 Vdc)
“1” Level
IH
O
(V = 1.0 Vdc)
O
(V = 1.5 Vdc)
O
I
Output Drive Current
OH
(V = 2.5 V)
(Except Source
Pins 9 and 10)
5.0
5.0
10
–3.0
–0.64
–1.6
−
−
−
−
–2.4
–0.51
–1.3
–4.2
–0.88
–2.25
–8.8
−
−
−
−
– 1.7
– 0.36
– 0.9
– 2.4
−
−
−
−
OH
(V = 4.6 V)
OH
(V = 9.5 V)
OH
(V = 13.5 V)
OH
15
– 4.2
–3.4
I
OL
(V = 0.4 V)
Sink
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
mA
OL
(V = 0.5 V)
OL
(V = 1.5 V)
OL
I
Input Current
15
−
−
−
0.1
−
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
−
mA
pF
mA
in
C
Input Capacitance (V = 0)
in
in
I
Quiescent Current
(Per Package)
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
DD
I
T
Total Supply Current (Notes 3, 4)
(Dynamic plus Quiescent,
Per Package)
5.0
10
15
I = (0.25 mA/kHz) f + I
mA
T
DD
DD
DD
I = (0.54 mA/kHz) f + I
T
I = (0.85 mA/kHz) f + I
T
(C = 50 pF on all outputs,
L
all buffers switching)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25°C.
4. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + (C − 50) Vfk
T
L
T
L
where: I is in mA (per package), C in pF, V = (V − V ) in volts, f in kHz is input frequency, and k = 0.002.
T
L
DD
SS
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3
MC14060B
SWITCHING CHARACTERISTICS (C = 50 pF, T = 25°C)
L
A
V
DD
Typ
Vdc
(Note 5)
Symbol
Characteristic
Min
Max
Unit
t
Output Rise Time (Counter Outputs)
5.0
10
15
−
−
−
40
25
20
200
100
80
ns
TLH
THL
t
Output Fall Time (Counter Outputs)
5.0
10
15
−
−
−
50
30
20
200
100
80
ns
ns
t
t
Propagation Delay Time
Clock to Q4
5.0
10
15
−
−
−
415
175
125
740
300
200
PLH
PHL
5.0
10
15
−
−
−
1.5
0.7
0.4
2.7
1.3
1.0
ms
Clock to Q14
t
Clock Pulse Width
5.0
10
15
100
40
30
65
30
20
−
−
−
ns
wH
f
Clock Pulse Frequency
Clock Rise and Fall Time
Reset Pulse Width
5.0
10
15
−
−
−
5
14
17
3.5
8
12
MHz
ns
f
t
t
5.0
10
15
TLH
THL
No Limit
t
w
5.0
10
15
120
60
40
40
15
10
ns
−
−
−
t
Propagation Delay Time
Reset to On
5.0
10
15
−
−
−
170
80
60
350
160
100
ns
PHL
5. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
V
DD
V
DD
CLOCK
NC OUT1
PULSE
500 mF
0.01 mF
I
D
Q4
Q5
Qn
GENERATOR
NC OUT2
R
C
L
C
L
CLOCK
PULSE
Q4
C
L
V
SS
GENERATOR
NC OUT1 Q5
NC OUT2
Qn
C
L
R
20 ns
20 ns
C
L
C
L
V
SS
90%
50%
10%
CLOCK
t
WH
20 ns
20 ns
t
t
PHL
PLH
V
V
DD
90%
50%
10%
90%
50%
10%
CLOCK
Q
SS
t
t
50% DUTY CYCLE
TLH
THL
Figure 1. Power Dissipation Test Circuit
and Waveform
Figure 2. Switching Time Test Circuit
and Waveforms
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4
MC14060B
11
1
f [
2.3R
C
tc tc
if 1 kHz ≤ f ≤ 100 kHz
and 2R < R < 10R
tc
RESET
10ꢀOUT 1
9ꢀOUT 2
tc
S
(f in Hz, R in ohms, C in farads)
R
tc
The formula may vary for other frequencies. Recommended
maximum value for the resistors in 1 MW.
R
C
tc
S
Figure 3. Oscillator Circuit Using RC Configuration
TYPICAL RC OSCILLATOR CHARACTERISTICS
100
8.0
4.0
V
DD
= 10 V
50
V
DD
= 15 V
f AS A FUNCTION
OF R
20
10
5
TC
(C = 1000 pF)
(R ≈ 2R
0
)
TC
S
1.0 V
-4.0
-8.0
-12
-16
f AS A FUNCTION
OF C
2
1
(R = 56 kW)
TC
5.0 V
(R = 120 k)
S
0.5
0.2
0.1
R
= 56 kW
R ꢁ=ꢁ0, fꢁ=ꢁ10.15ꢁkHz @ V ꢁ=ꢁ10, T ꢁ=ꢁ25°C
S DD A
R ꢁ=ꢁ120 kW, fꢁ=ꢁ7.8ꢁkHz @ V ꢁ=ꢁ10ꢁV, T ꢁ=ꢁ25°C
S DD A
TC
C = 1000 pF
1.0 k
10 k
100 k
, RESISTANCE (OHMS)
1.0 M
0.1
-55
-25
0
25
50
75
100
125
R
TC
0.001
T , AMBIENT TEMPERATURE (°C)
A
0.0001
0.01
C, CAPACITANCE (mF)
Figure 4. RC Oscillator Stability
Figure 5. RC Oscillator Frequency as a
Function of RTC and C
CLOCK
11
Table 2. Typical Data for Crystal Oscillator Circuit
500 kHz 32 kHz
Characteristic
Unit
Circuit Circuit
RESET
10ꢀOUT 1
9ꢀOUT 2
Crystal Characteristics
Resonant Frequency
Equivalent Resistance, R
18M
500
1.0
32
6.2
kHz
kW
S
R
O
External Resistor/Capacitor Values
R
C
C
47
82
20
750
82
20
kW
pF
pF
O
T
C
C
T
S
S
Frequency Stability
Figure 6. Typical Crystal Oscillator Circuit
Frequency Changes as a
Function of V (T = 25°C)
DD
A
V
V
Change from 5.0 V to 10V
Change from 10 V to 15 V
+6.0
+2.0
+2.0
+2.0
ppm
ppm
DD
DD
Frequency Change as a Function of
Temperature (V = 10 V)
DD
T Change from − 55°C to
+100
–160
+120 ppm
–560 ppm
A
+25°C Complete Oscillator (Note 6)
T Change from + 25°C to
A
+125°C Complete Oscillator
(Note 6)
6. Complete oscillator includes crystal, capacitors, and resistors.
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5
MC14060B
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
G
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
K
M
P
R
C
7
0
_
_
_
_
−T−
SEATING
PLANE
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
J
M
D
16 PL
M
S
S
A
0.25 (0.010)
T B
SOLDERING FOOTPRINT*
8X
6.40
16X
1.12
1
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
MC14060B
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F
ISSUE B
16X KREF
NOTES:
1. DIMENSIONING AND TOLERANCING PER
M
S
S
0.10 (0.004)
T U
V
ANSI Y14.5M, 1982.
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
K
K1
16
9
2X L/2
J1
SECTION N−N
B
−U−
L
J
PIN 1
IDENT.
N
8
0.25 (0.010)
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T U
A
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
N
−V−
A
B
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
F
C
1.20
−−− 0.047
DETAIL E
D
F
0.15 0.002 0.006
0.75 0.020 0.030
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
−W−
0.18
0.09
0.09
0.19
0.19
0.28 0.007 0.011
C
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.10 (0.004)
H
DETAIL E
SEATING
PLANE
−T−
6.40 BSC
0.252 BSC
D
G
M
0
8
0
8
_
_
_
_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MC14060B
PACKAGE DIMENSIONS
SOEIAJ−16
F SUFFIX
CASE 966
ISSUE A
NOTES:
ꢀꢂ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
E
16
9
ꢀꢂ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢂ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
Q
1
H
E
M
_
E
ꢀꢂ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
ꢀꢂ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN
---
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
---
0.05
0.35
0.10
9.90
5.10
2.05
A
A
1
0.20 0.002
0.50 0.014
0.20 0.007
1
b
0.13 (0.005)
b
c
0.10 (0.004)
M
D
E
10.50
5.45 0.201
0.390
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
0
10
0.90 0.028
10
_
0.035
0.031
M
Q
0
_
_
_
0.70
---
1
Z
0.78
---
ON Semiconductor and the
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