NSBA115TF3T5G [ONSEMI]
Digital Transistors (BRT); 数字晶体管( BRT )型号: | NSBA115TF3T5G |
厂家: | ONSEMI |
描述: | Digital Transistors (BRT) |
文件: | 总6页 (文件大小:113K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NSBA114EF3T5G Series
Preferred Devices
Digital Transistors (BRT)
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The digital transistor
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
digital transistor eliminates these individual components by
integrating them into a single device. The use of a digital transistor can
reduce both system cost and board space. The device is housed in the
SOT−1123 package which is designed for low power surface mount
applications.
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PNP SILICON DIGITAL
TRANSISTORS
PIN 3
COLLECTOR
(OUTPUT)
Features
PIN 1
BASE
(INPUT)
R1
R2
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
PIN 2
EMITTER
(GROUND)
• The SOT−1123 Package can be Soldered using Wave or Reflow.
• Available in 4 mm, 8000 Unit Tape & Reel
• These are Pb−Free Devices
• These are Halide−Free Devices
3
2
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
1
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
Value
50
Unit
Vdc
SOT−1123
CASE 524AA
STYLE 1
V
CBO
V
CEO
50
Vdc
I
C
100
mAdc
MARKING DIAGRAM
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
x M
x
M
= Device Code
= Date Code
G or G = Pb−Free Package
ORDERING INFORMATION
†
Device
Package
Shipping
NSBA114EFT5G SOT−1123 8000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
September, 2008 − Rev. 2
NSBA114EF3/D
NSBA114EF3T5G Series
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
P
D
T = 25°C (Note 1)
254
2.0
mW
mW/°C
A
Derate above 25°C
Thermal Resistance (Note 1)
Junction-to-Ambient
R
q
JA
493
°C/W
Total Device Dissipation
P
D
T = 25°C (Note 2)
297
2.4
mW
mW/°C
A
Derate above 25°C
Thermal Resistance (Note 2) Junction-to-Ambient
Thermal Resistance (Note 1) Junction-to-Lead 3
Junction and Storage Temperature
R
421
193
°C/W
°C/W
°C
q
JA
R
q
JL
T , T
J
−55 to +150
stg
2
2
1. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2. FR−4 @ 500 mm , 1 oz. copper traces, still air.
ORDERING INFORMATION, DEVICE MARKING AND RESISTOR VALUES
†
Device
NSBA114EF3T5G
NSBA124EF3T5G
NSBA144EF3T5G
NSBA114YF3T5TG
NSBA123TF3T5G
NSBA143EF3T5G
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144WF3T5G
NSBA114TF3T5G
NSBA115TF3T5G
Marking*
F (0°)
R1 (k)
10
R2 (k)
10
22
47
47
∞
Package
Shipping
Y (0°)
22
E (0°)
47
K (0°)
10
F (90°)
A (90°)
E (90°)
J (90°)
D (90°)
L (90°)
Q (90°)
2.2
4.7
4.7
2.2
47
SOT−1123
(Pb−Free)
4.7
47
47
22
∞
8000 / Tape & Reel
10
100
∞
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
*(XX°) = Degree rotation in the clockwise direction.
http://onsemi.com
2
NSBA114EF3T5G Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current (V = 50 V, I = 0)
Symbol
Min
Typ
Max
Unit
I
I
−
−
−
−
100
500
nAdc
nAdc
mAdc
CB
E
CBO
Collector−Emitter Cutoff Current (V = 50 V, I = 0)
CE
B
CEO
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
NSBA114EF3T5G
NSBA124EF3T5G
NSBA144EF3T5G
I
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.5
0.2
0.1
0.2
4.0
0.9
1.5
0.1
0.18
0.2
0.13
EBO
EB
C
NSBA114YF3T5TG
NSBA123TF3T5G
NSBA114TF3T5G
NSBA143EF3T5G
NSBA115T53T5G
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144WF3T5G
Collector−Base Breakdown Voltage (I = 10 mA, I = 0)
V
V
50
50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
Collector−Emitter Breakdown Voltage (Note 3)
(BR)CEO
(I = 2.0 mA, I = 0)
C
B
ON CHARACTERISTICS (Note 3)
DC Current Gain
NSBA114EF3T5G
NSBA124EF3T5G
NSBA144EF3T5G
h
FE
35
60
80
80
160
15
80
80
80
160
60
−
−
−
−
−
−
−
−
−
−
(V = 10 V, I = 5.0 mA)
100
140
140
350
27
140
140
140
250
CE
C
NSBA114YF3T5TG
NSBA115TF3T5G/NSBA123TF3T5G
NSBA143EF3T5G
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144WF3T5G
NSBA114TF3T5G
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
CE(sat)
−
−
0.25
Vdc
Vdc
C
E
NSBA114EF3T5G/NSBA124EF3T5G/NSBA144EF3T5G
NSBA114YF3T5G/NSBA123TF3T5G/NSBA123JF3T5G
NSBA144WF3T5G
(I = 10 mA, I = 1 mA)
C
B
NSBA143ZF3T5G/NSBA143EF3T5G/NSBA114TF3T5G
(I = 10 mA, I = 5 mA)
C
B
NSBA115TF3T5G
Output Voltage (on)
V
OL
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
NSBA114TF3T5G
NSBA114EF3T5G
NSBA124EF3T5G
NSBA114YF3T5G
NSBA123TF3T5G
NSBA143EF3T5G
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144EF3T5G
NSBA144WF3T5G
NSBA115TF3T5G
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
CC
B
L
(V = 5.0 V, V = 3.5 V, R = 1.0 kW)
CC
B
L
(V = 5.0 V, V = 4.0 V, R = 1.0 kW)
CC
B
L
(V = 5.0 V, V = 5.0 V, R = 1.0 kW)
CC
B
L
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
OH
4.9
−
−
Vdc
CC
B
L
NSBA114EF3T5G/NSBA124EF3T5G/NSBA144EF3T5G
NSBA114YEF3T5G/NSBA143ZF3T5G/NSBA123JF3TG
NSBA144WF3T5G
(V = 5.0 V, V = 0.25 V, R = 1.0 kW)
CC
B
L
NSBA123TF3T5G/NSBA143EF3T5G/NSBA114TF3T5G/
NSBA115TF3T5G
3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%
http://onsemi.com
3
NSBA114EF3T5G Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
Input Resistor
NSBA114TF3T5C
NSBA114EF3T5G
NSBA124EF3T5G
NSBA144EF3T5G
NSBA114YF3T5TG
NSBA123TF3T5G
NSBA143EF3T5G
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144WF3T5G
NSBA115TF3T5G
R1
7.0
7.0
15.4
32.9
7.0
1.5
3.3
3.3
10
10
22
47
10
2.2
4.7
4.7
2.2
47
13
13
28.6
61.1
13
2.9
6.1
6.1
kW
1.54
32.9
70
2.86
61.1
130
100
Resistor Ratio
R /R
1 2
NSBA114EF3T5G/NSBA124EF3T5G/
NSBA144EF3T5G/NSBA143EF3T5G
NSBA114YF3T5TG
NSBA123TF3T5G/NSBA114TF3T5G/
NSBA115TF3T5G
0.8
0.17
−
1.0
0.21
−
1.2
0.25
−
NSBA143ZF3T5G
NSBA123JF3T5G
NSBA144WF3T5G
0.055
0.038
1.7
0.1
0.047
2.1
0.185
0.056
2.6
http://onsemi.com
4
NSBA114EF3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − NSBA114EF3T5G
1.0
0.10
0.01
1000
I /I = 10
V
CE
= 10 V
C
B
T = 25°C
A
100
10
T = 150°C
A
150°C
25°C
−55°C
T = −55°C
A
1.0
0
5
10 15 20 25 30 35 40 45 50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 1. VCE(sat) vs. IC
Figure 2. DC Current Gain
100
10
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
150°C
1.0
−55°C
0.1
25°C
0.01
0
5
10 15 20 25 30 35 40 45 50
REVERSE BIAS VOLTAGE (V)
0
1
2
3
4
5
V , INPUT VOLTAGE (V)
in
Figure 3. Output Capacitance
Figure 4. Output Current vs. Input Voltage
10
25°C
−55°C
1.0
150°C
0.1
0
5
10 15 20 25 30 35 40 45 50
I , COLLECTOR CURRENT (mA)
C
Figure 5. Input Voltage vs. Output Current
http://onsemi.com
5
NSBA114EF3T5G Series
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA−01
ISSUE B
NOTES:
−X−
D
b1
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−Y−
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
1
2
3
E
b
e
MILLIMETERS
DIM MIN NOM MAX MIN
INCHES
NOM MAX
0.08 (0.0032) X Y
A
b
0.34
0.15
0.37
0.22
0.15
0.12
0.80
0.60
−−−
1.00
0.10
0.40
0.28
0.20
0.17
0.85
0.65
0.40
1.05
0.15
0.013 0.015 0.016
0.006 0.009 0.011
0.004 0.006 0.008
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.014 −−−− 0.016
0.037 0.039 0.041
0.002 0.004 0.006
A
b1 0.10
c
D
E
e
0.07
0.75
0.55
0.35
0.95
0.05
H
E
L
L
c
H
E
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
SOLDERING FOOTPRINT*
0.35
0.30
0.25
0.90
0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury
or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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NSBA114EF3/D
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