NSPM1042MUTBG [ONSEMI]

ESD & Surge Protection Device, 4.8 V, 200 A capable;
NSPM1042MUTBG
型号: NSPM1042MUTBG
厂家: ONSEMI    ONSEMI
描述:

ESD & Surge Protection Device, 4.8 V, 200 A capable

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NSPM1042  
ESD and Surge Protection  
Diode  
Features  
Protection for the following IEC Standards:  
IEC6100042 Level 4: 30 kV Contact Discharge  
IEC6100045 (Lightning) 200 A (8/20 ms)  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
www.onsemi.com  
Pin 1  
Pin 2  
MAXIMUM RATINGS  
Rating  
IEC 6100042 (ESD)  
Symbol  
Value  
Unit  
MARKING  
DIAGRAM  
Contact  
Air  
30  
30  
kV  
Operating Junction and Storage  
Temperature Range  
T , T  
65 to +150  
°C  
J
stg  
N3M  
UDFN2  
CASE 517DF  
Maximum Peak Pulse Current  
I
PP  
200  
A
8/20 ms @ T = 25°C, Pin 2 to Pin 1  
A
N3  
M
= Specific Device Code  
= Date Code  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
Device  
NSPM1042MUTBG  
Package  
Shipping  
UDFN2  
(PbFree)  
3000 / Tape &  
Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2017  
1
Publication Order Number:  
March, 2019 Rev. 0  
NSPM1042/D  
NSPM1042  
ELECTRICAL CHARACTERISTICS  
A
I
(T = 25°C unless otherwise noted)  
I
PP  
Symbol  
Parameter  
I
Maximum Reverse Peak Pulse Current  
R
V
PP  
DYN  
I
T
V
Clamping Voltage @ I  
I
V
R
BR RWM  
V
C
V
C
PP  
V
I
V
V
R
T
RWM BR  
C
V
Working Peak Reverse Voltage  
RWM  
I
I
R
Maximum Reverse Leakage Current @ V  
R
RWM  
DYN  
V
Breakdown Voltage @ I  
Test Current  
BR  
T
I
PP  
I
T
BiDirectional  
*See Application Note AND8308/D for detailed explanations of  
datasheet parameters.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
A
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
3.3  
4.8  
5.5  
6.0  
0.1  
0.1  
7.2  
8.4  
9.1  
9.5  
Unit  
V
Reverse Working Voltage  
Reverse Working Voltage  
Breakdown Voltage  
V
RWM  
V
RWM  
Pin 1 to Pin 2  
Pin 2 to Pin 1  
V
V
I = 1 mA, Pin 1 to Pin 2  
4.5  
5.0  
4.7  
5.4  
V
BR  
BR  
T
Breakdown Voltage  
V
I = 1 mA, Pin 2 to Pin 1  
V
T
Reverse Leakage Current  
Reverse Leakage Current  
Clamping Voltage (Note 1)  
Clamping Voltage (Note 1)  
Clamping Voltage (Note 1)  
Clamping Voltage (Note 1)  
I
R
V
RWM  
V
RWM  
= 3.3 V, Pin 1 to Pin 2  
= 4.8 V, Pin 2 to Pin 1  
0.05  
0.05  
6.6  
mA  
mA  
V
I
R
V
C
V
C
V
C
V
C
V
C
I
PP  
I
PP  
I
PP  
I
PP  
I
PP  
= 100 A, t = 8 x 20 ms, Pin 2 to Pin 1  
p
= 150 A, t = 8 x 20 ms, Pin 2 to Pin 1  
7.6  
V
p
= 180 A, t = 8 x 20 ms, Pin 2 to Pin 1  
8.2  
V
p
= 200 A, t = 8 x 20 ms, Pin 2 to Pin 1  
8.8  
V
p
Clamping Voltage TLP  
(Note 2)  
5.48  
V
= 8 A  
IEC 6100042 Level 2 equivalent  
( 4 kV Contact, 8 kV Air)  
I
PP  
= 16 A  
5.55  
IEC 6100042 Level 4 equivalent  
( 8 kV Contact, 16 kV Air)  
Dynamic Resistance  
Dynamic Resistance  
Junction Capacitance  
R
R
TLP Pulse, Pin 1 to Pin 2  
TLP Pulse, Pin 2 to Pin 1  
0.014  
0.01  
300  
W
W
DYN  
DYN  
C
V
R
= 0 V, f = 1 MHz  
480  
pF  
J
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
1. Nonrepetitive current pulse at T = 25°C, per IEC6100045 waveform.  
A
2. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.  
TLP conditions: Z = 50 W, t = 100 ns, t = 1 ns, averaging window; t = 70 ns to t = 90 ns.  
0
p
r
1
2
www.onsemi.com  
2
 
NSPM1042  
TYPICAL CHARACTERISTICS  
45  
40  
35  
30  
25  
20  
15  
10  
5
10  
5
0
5  
10  
15  
20  
25  
30  
0
5  
35  
40  
10  
45  
20  
0
20  
40  
60  
80  
100  
120  
20  
0
20  
40  
60  
80  
100 120  
TIME (ns)  
TIME (ns)  
Figure 1. ESD Clamping Voltage Pin 1 to Pin 2,  
Figure 2. ESD Clamping Voltage Pin 2 to Pin 1,  
8 kV Contact per IEC6100042  
8 kV Contact per IEC6100042  
20  
20  
18  
16  
14  
12  
10  
8
18  
16  
14  
12  
10  
8
6
6
4
4
2
2
0
0
0
1
2
3
4
5
6
7
8
9
10  
0
1
2
3
4
5
6
7
8
9
10  
V , VOLTAGE (V)  
C
V , VOLTAGE (V)  
C
Figure 3. 100 ns TLP IV Curve, Pin 1 to Pin 2  
Figure 4. 100 ns TLP IV Curve, Pin 2 to Pin 1  
10  
10  
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
0
20 40 60 80 100 120 140 160 180 200 220 240  
(A)  
0
20 40 60 80 100 120 140 160 180 200 220 240  
(A)  
I
pk  
I
pk  
Figure 5. Clamping Voltage vs. Peak Pulse  
Figure 6. Clamping Voltage vs. Peak Pulse  
Current (tp = 8/20 ms), Pin 1 to Pin 2  
Current (tp = 8/20 ms), Pin 2 to Pin 1  
www.onsemi.com  
3
NSPM1042  
TYPICAL CHARACTERISTICS  
400  
350  
300  
250  
200  
150  
100  
50  
0
5 4 3 2 1  
0
1
2
3
4
5
V
Bias  
(V)  
Figure 7. CV Characteristics  
www.onsemi.com  
4
NSPM1042  
50 W Coax  
Cable  
Transmission Line Pulse (TLP) Measurement  
L
Attenuator  
S
Transmission Line Pulse (TLP) provides current versus  
voltage (IV) curves in which each data point is obtained  
from a 100 ns long rectangular pulse from a charged  
transmission line. A simplified schematic of a typical TLP  
system is shown in Figure 8. TLP IV curves of ESD  
protection devices accurately demonstrate the product’s  
ESD capability because the 10s of amps current levels and  
under 100 ns time scale match those of an ESD event. This  
is illustrated in Figure 9 where an 8 kV IEC 6100042  
current waveform is compared with TLP current pulses at  
8 A and 16 A. A TLP IV curve shows the voltage at which  
the device turns on as well as how well the device clamps  
voltage over a range of current levels. For more information  
on TLP measurements and how to interpret them please  
refer to AND9007/D.  
÷
50 W Coax  
Cable  
I
M
V
M
10 MW  
DUT  
V
C
Oscilloscope  
Figure 8. Simplified Schematic of a Typical TLP  
System  
Figure 9. Comparison Between 8 kV IEC 6100042 and 8 A and 16 A TLP Waveforms  
www.onsemi.com  
5
 
NSPM1042  
IEC6100042 Waveform  
IEC 6100042 Spec.  
I
peak  
First Peak  
Current  
(A)  
100%  
90%  
Test Volt-  
age (kV)  
Current at  
30 ns (A)  
Current at  
60 ns (A)  
Level  
1
2
3
4
2
4
6
8
7.5  
15  
4
8
2
4
6
8
I @ 30 ns  
22.5  
30  
12  
16  
I @ 60 ns  
10%  
t
P
= 0.7 ns to 1 ns  
Figure 10. IEC6100042 Spec  
Device  
Under  
Test  
Oscilloscope  
ESD Gun  
50 W  
Cable  
50 W  
Figure 11. Diagram of ESD Test Setup  
ESD Voltage Clamping  
For sensitive circuit elements it is important to limit the  
voltage that an IC will be exposed to during an ESD event  
to as low a voltage as possible. The ESD clamping voltage  
is the voltage drop across the ESD protection diode during  
an ESD event per the IEC6100042 waveform. Since the  
IEC6100042 was written as a pass/fail spec for larger  
systems such as cell phones or laptop computers it is not  
clearly defined in the spec how to specify a clamping voltage  
at the device level. ON Semiconductor has developed a way  
to examine the entire voltage waveform across the ESD  
protection diode over the time domain of an ESD pulse in the  
form of an oscilloscope screenshot, which can be found on  
the datasheets for all ESD protection diodes. For more  
information on how ON Semiconductor creates these  
screenshots and how to interpret them please refer to  
AND8307/D.  
100  
t
r
PEAK VALUE I  
@ 8 ms  
RSM  
90  
80  
70  
60  
50  
40  
30  
20  
PULSE WIDTH (t ) IS DEFINED  
P
AS THAT POINT WHERE THE  
PEAK CURRENT DECAY = 8 ms  
HALF VALUE I /2 @ 20 ms  
RSM  
t
P
10  
0
0
20  
40  
t, TIME (ms)  
60  
80  
Figure 12. 8 x 20 ms Pulse Waveform  
www.onsemi.com  
6
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
UDFN2 2.0x1.25, 1.3P  
CASE 517DF  
ISSUE A  
SCALE 4:1  
DATE 06 JUL 2016  
A
B
D
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
PIN 1  
INDICATOR  
2. CONTROLLING DIMENSION: MILLIMETERS.  
MILLIMETERS  
E
DIM MIN  
0.45  
A1 0.00  
MAX  
0.55  
0.05  
1.05  
A
2X  
0.08  
C
b
D
E
e
0.95  
2.00 BSC  
1.25 BSC  
1.30 BSC  
2X  
0.08 C  
TOP VIEW  
L
0.45  
0.55  
A
0.05  
0.05  
C
C
GENERIC  
MARKING DIAGRAMS*  
A1  
SEATING  
PLANE  
C
XXM  
XXM  
SIDE VIEW  
e
Style 1  
Style 2  
XX  
M
= Specific Device Code  
= Date Code  
e/2  
0.05 C A B  
STYLE 1:  
PIN 1. CATHODE  
(POLARITY BAND)  
2. ANODE  
STYLE 2:  
.
NO POLARITY  
b
1
2X  
L
*This information is generic. Please refer  
to device data sheet for actual part  
marking. PbFree indicator, “G”, may  
or not be present.  
BOTTOM VIEW  
RECOMMENDED  
SOLDERING FOOTPRINT*  
2X  
1.10  
2.10  
1
2X  
0.70  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON04628G  
UDFN2 2.0X1.25, 1.3P  
PAGE 1 OF 1  
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