NST3946DP6T5G [ONSEMI]
Dual Complementary General Purpose Transistor; 双互补通用晶体管型号: | NST3946DP6T5G |
厂家: | ONSEMI |
描述: | Dual Complementary General Purpose Transistor |
文件: | 总7页 (文件大小:104K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NST3946DP6T5G
Dual Complementary
General Purpose Transistor
The NST3946DP6T5G device is a spin−off of our popular
SOT−23/SOT−323/SOT−563 three−leaded device. It is designed for
general purpose amplifier applications and is housed in the SOT−963
six−leaded surface mount package. By putting two discrete devices in
one package, this device is ideal for low−power surface mount
applications where board space is at a premium.
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Features
(3)
(2)
(1)
Q
• h , 100−300
FE
• Low V
, ≤ 0.4 V
CE(sat)
Q
1
2
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• This is a Pb−Free Device
(4)
(5)
(6)
NST3946DP6T5G*
MAXIMUM RATINGS
*Q1 PNP
Q2 NPN
Rating
Symbol
Value
40
Unit
Vdc
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Electrostatic Discharge
V
CEO
V
CBO
60
Vdc
4
5
6
V
EBO
6.0
Vdc
I
C
200
mAdc
3
2
1
HBM
MM
ESD
Class
2
B
SOT−963
CASE 527AD
PLASTIC
THERMAL CHARACTERISTICS
Characteristic (Single Heated)
Symbol
Max
Unit
Total Device Dissipation T = 25°C
P
D
240
1.9
mW
mW/°C
A
Derate above 25°C (Note 1)
MARKING DIAGRAM
Thermal Resistance, Junction-to-Ambient
(Note 1)
R
520
°C/W
q
JA
L
M G
Total Device Dissipation T = 25°C
P
280
2.2
mW
mW/°C
A
D
G
Derate above 25°C (Note 2)
1
Thermal Resistance, Junction-to-Ambient
(Note 2)
R
q
JA
446
°C/W
L
= Device Code
(180° Clockwise Rotation)
= Date Code
= Pb−Free Package
Characteristic (Dual Heated) (Note 3)
Symbol
Max
Unit
M
G
Total Device Dissipation T = 25°C
P
D
350
2.8
mW
mW/°C
A
Derate above 25°C (Note 1)
(Note: Microdot may be in either location)
Thermal Resistance, Junction-to-Ambient
(Note 1)
R
q
JA
357
°C/W
Total Device Dissipation T = 25°C
P
D
420
3.4
mW
mW/°C
A
ORDERING INFORMATION
Derate above 25°C (Note 2)
†
Thermal Resistance, Junction-to-Ambient
(Note 2)
R
q
JA
297
°C/W
Device
Package
Shipping
NST3946DP6T5G SOT−963 8000/Tape & Reel
(Pb−Free)
Junction and Storage Temperature Range T , T
−55 to
+150
°C
J
stg
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
2
1. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2
2. FR−4 @ 500 mm , 1 oz. copper traces, still air.
3. Dual heated values assume total power is sum of two equally powered channels
©
Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
July, 2008 − Rev. 1
NST3946DP6/D
NST3946DP6T5G
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage (Note 4)
(I = 1.0 mAdc, I = 0)
V
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(NPN)
(PNP)
40
−40
−
−
C
B
(I = −1.0 mAdc, I = 0)
C
B
Collector−Base Breakdown Voltage
(I = 10 mAdc, I = 0)
V
V
Vdc
Vdc
(NPN)
(PNP)
60
−40
−
−
C
E
(I = −10 mAdc, I = 0)
C
E
Emitter−Base Breakdown Voltage
(I = 10 mAdc, I = 0)
(NPN)
(PNP)
6.0
−5.0
−
−
E
C
(I = −10 mAdc, I = 0)
E
C
Collector Cutoff Current
(V = 30 Vdc, V = 3.0 Vdc)
I
nAdc
CEX
(NPN)
(PNP)
−
−
50
−50
CE
EB
(V = −30 Vdc, V = −3.0 Vdc)
CE
EB
ON CHARACTERISTICS (Note 4)
DC Current Gain
h
FE
−
(I = 0.1 mAdc, V = 1.0 Vdc)
(NPN)
(PNP)
40
70
100
60
−
−
300
−
C
CE
(I = 1.0 mAdc, V = 1.0 Vdc)
C
CE
(I = 10 mAdc, V = 1.0 Vdc)
C
CE
(I = 50 mAdc, V = 1.0 Vdc)
C
CE
(I = 100 mAdc, V = 1.0 Vdc)
30
−
C
CE
(I = −0.1 mAdc, V = −1.0 Vdc)
60
80
−
−
C
CE
(I = −1.0 mAdc, V = −1.0 Vdc)
C
CE
(I = −10 mAdc, V = −1.0 Vdc)
100
60
300
−
C
CE
(I = −50 mAdc, V = −1.0 Vdc)
C
CE
(I = −100 mAdc, V = −1.0 Vdc)
30
−
C
CE
Collector−Emitter Saturation Voltage
(I = 10 mAdc, I = 1.0 mAdc)
V
Vdc
Vdc
CE(sat)
(NPN)
(PNP)
−
−
0.2
0.3
C
B
(I = 50 mAdc, I = 5.0 mAdc)
C
B
(I = −10 mAdc, I = −1.0 mAdc)
−
−
−0.25
−0.4
C
B
(I = −50 mAdc, I = −5.0 mAdc)
C
B
Base−Emitter Saturation Voltage
(I = 10 mAdc, I = 1.0 mAdc)
V
BE(sat)
(NPN)
(PNP)
0.65
−
0.85
0.95
C
B
(I = 50 mAdc, I = 5.0 mAdc)
C
B
(I = −10 mAdc, I = −1.0 mAdc)
−0.65
−
−0.85
−0.95
C
B
(I = −50 mAdc, I = −5.0 mAdc)
C
B
4. Pulse Test: Pulse Width ≤ 300 μs; Duty Cycle ≤ 2.0%.
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2
NST3946DP6T5G
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Continued)
A
Characteristic
Symbol
Min
Max
Unit
SMALL−SIGNAL CHARACTERISTICS
Current−Gain − Bandwidth Product
f
T
MHz
(I = 10 mAdc, V = 20 Vdc, f = 100 MHz)
(NPN)
(PNP)
200
250
−
−
C
CE
(I = −10 mAdc, V = −20 Vdc, f = 100 MHz)
C
CE
Output Capacitance
C
pF
pF
dB
obo
(V = 5.0 Vdc, I = 0, f = 1.0 MHz)
(NPN)
(PNP)
−
−
4.0
4.5
CB
E
(V = −5.0 Vdc, I = 0, f = 1.0 MHz)
CB
E
Input Capacitance
C
ibo
(V = 0.5 Vdc, I = 0, f = 1.0 MHz)
(NPN)
(PNP)
−
−
8.0
10.0
EB
C
(V = −0.5 Vdc, I = 0, f = 1.0 MHz)
EB
C
Noise Figure
NF
(V = 5.0 Vdc, I = 100 mAdc, R = 1.0 k Ω, f = 1.0 kHz)
(NPN)
−
−
5.0
4.0
CE
C
S
(V = −5.0 Vdc, I = −100 mAdc, R = 1.0 k Ω, f = 1.0 kHz) (PNP)
CE
C
S
SWITCHING CHARACTERISTICS
Delay Time
Rise Time
Storage Time
Fall Time
(V = 3.0 Vdc, V = −0.5 Vdc)
(NPN)
(PNP)
t
−
−
35
35
CC
BE
d
(V = −3.0 Vdc, V = 0.5 Vdc)
CC
BE
ns
ns
(I = 10 mAdc, I = 1.0 mAdc)
(NPN)
(PNP)
t
−
−
35
35
C
B1
r
(I = −10 mAdc, I = −1.0 mAdc)
C
B1
(V = 3.0 Vdc, I = 10 mAdc)
(NPN)
(PNP)
t
−
−
275
250
CC
C
s
(V = −3.0 Vdc, I = −10 mAdc)
CC
C
(I = I = 1.0 mAdc)
(NPN)
(PNP)
t
f
−
−
50
50
B1
B2
(I = I = −1.0 mAdc)
B1
B2
NPN TRANSISTOR
0.28
400
I /I = 10
C
B
150°C (5.0 V)
350
V
= 150°C
CE(sat)
0.23
0.18
0.13
300 150°C (1.0 V)
250
25°C (5.0 V)
200
150
100
25°C (1.0 V)
−55°C
25°C
−55°C (5.0 V)
−55°C (1.0 V)
0.08
0.03
50
0
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 1. Collector Emitter Saturation Voltage vs.
Collector Current
Figure 2. DC Current Gain vs. Collector Current
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3
NST3946DP6T5G
NPN TRANSISTOR
1.1
1.0
0.9
0.8
0.7
0.6
0.5
1.1
V
= 2.0 V
I /I = 10
CE
C
B
1.0
0.9
0.8
0.7
0.6
0.5
−55°C
25°C
−55°C
25°C
150°C
150°C
0.4
0.3
0.4
0.3
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. Base Emitter Saturation Voltage vs.
Collector Current
Figure 4. Base Emitter Turn−On Voltage vs.
Collector Current
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
8.0
7.5
I
= 100 mA
C
7.0
6.5
6.0
5.5
5.0
4.5
80 mA
C
ib
60 mA
40 mA
20 mA
4.0
3.5
0.2
0
0.0001
0.001
0.01
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, EMITTER BASE VOLTAGE (V)
I , BASE CURRENT (A)
V
eb
b
Figure 5. Saturation Region
Figure 6. Input Capacitance
3.0
2.5
2.0
1.5
C
ob
1.0
0.5
0
5.0
10
15
20
25
30
V , COLLECTOR BASE VOLTAGE (V)
cb
Figure 7. Output Capacitance
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4
NST3946DP6T5G
PNP TRANSISTOR
0.40
0.35
0.30
0.25
0.20
0.15
0.10
350
300
150°C (5.0 V)
150°C (1.0 V)
I /I = 10
C
B
V
= 150°C
CE(sat)
250
200
150
100
25°C (5.0 V)
25°C
25°C (1.0 V)
−55°C (5.0 V)
−55°C (1.0 V)
−55°C
50
0
0.05
0
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 8. Collector Emitter Saturation Voltage vs.
Collector Current
Figure 9. DC Current Gain vs. Collector Current
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5
NST3946DP6T5G
PNP TRANSISTOR
1.1
1.0
0.9
0.8
0.7
0.6
0.5
1.1
V
= 2.0 V
I /I = 10
CE
C
B
1.0
0.9
0.8
0.7
0.6
0.5
−55°C
25°C
−55°C
25°C
150°C
150°C
0.4
0.3
0.4
0.3
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 10. Base Emitter Saturation Voltage vs.
Collector Current
Figure 11. Base Emitter Turn−On Voltage vs.
Collector Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
9.0
8.0
100 mA
80 mA
60 mA
40 mA
7.0
6.0
5.0
C
ib
20 mA
4.0
3.0
0.1
0
I
= 10 mA
C
0.0001
0.001
0.01
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, EMITTER BASE VOLTAGE (V)
I , BASE CURRENT (A)
V
eb
b
Figure 12. Saturation Region
Figure 13. Input Capacitance
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
C
ob
1.5
1.0
0
5.0
10
15
20
25
30
V , COLLECTOR BASE VOLTAGE (V)
cb
Figure 14. Output Capacitance
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6
NST3946DP6T5G
PACKAGE DIMENSIONS
SOT−963
CASE 527AD−01
ISSUE C
NOTES:
C
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
A
B
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
L
6
5
4
3
MILLIMETERS
INCHES
NOM MAX
H
E
E
DIM MIN
NOM
0.37
0.15
0.12
1.00
MAX
MIN
1 2
A
b
C
D
E
e
L
0.34
0.10
0.07
0.95
0.75
0.40
0.20
0.17
1.05
0.85
0.004 0.006 0.008
0.003 0.005 0.007
0.037 0.039 0.041
0.03 0.032 0.034
0.014 BSC
0.002 0.004 0.006
0.037 0.039 0.041
e
C
0.80
6X
b
0.35 BSC
0.10
0.05
0.95
0.15
1.05
0.08
C
A
B
HE
1.00
SOLDERING FOOTPRINT*
0.35
0.35
0.014 0.014
0.90
0.0354
0.20
0.08
0.20
0.08
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NST3946DP6/D
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