NSVMUN5312DW1T3G [ONSEMI]
Complementary Bias Resistor Transistors;
| 型号： | NSVMUN5312DW1T3G |
| 厂家： | 
ONSEMI |
| 描述： | Complementary Bias Resistor Transistors 开关 光电二极管 晶体管 |
| 文件： | 总10页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MUN5312DW1,
NSBC124EPDXV6,
NSBC124EPDP6
Complementary Bias
Resistor Transistors
www.onsemi.com
PIN CONNECTIONS
(2)
R1 = 22 kW, R2 = 22 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
(3)
(1)
R
1
R
2
Q
1
Q
2
R
2
Features
R
1
• Simplifies Circuit Design
• Reduces Board Space
(4)
(5)
(6)
• Reduces Component Count
MARKING DIAGRAMS
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable*
6
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
SOT−363
CASE 419B
12 M G
Compliant
G
MAXIMUM RATINGS
(T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
1
2
Rating
Symbol
Max
50
Unit
Vdc
SOT−563
CASE 463A
1
12 M G
Collector-Base Voltage
Collector-Emitter Voltage
V
CBO
CEO
G
V
50
Vdc
Collector Current − Continuous
Input Forward Voltage
I
100
40
mAdc
Vdc
C
V
IN(fwd)
SOT−963
CASE 527AD
Input Reverse Voltage
V
10
Vdc
M G
IN(rev)
G
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1
12/R
M
G
=
=
=
Specific Device Code
Date Code*
Pb-Free Package
ORDERING INFORMATION
†
Device
Package
Shipping
MUN5312DW1T1G,
SMUN5312DW1T1G*
SOT−363
3,000 / Tape & Reel
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
NSVMUN5312DW1T3G*
SOT−363
SOT−363
10,000 / Tape & Reel
3,000 / Tape & Reel
MUN5312DW1T2G,
NSVMUN5312DW1T2G*
NSBC124EPDXV6T1G
NSBC124EPDXV6T5G
NSBC124EPDP6T5G
SOT−563
SOT−563
SOT−963
4,000 / Tape & Reel
8,000 / Tape & Reel
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
June, 2015 − Rev. 3
DTC124EP/D
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
MUN5312DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
P
D
T = 25°C
(Note 1)
187
256
1.5
2.0
mW
A
(Note 2)
Derate above 25°C
(Note 1)
mW/°C
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
670
490
°C/W
q
JA
MUN5312DW1 (SOT−363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
250
385
2.0
3.0
mW
A
(Note 2)
Derate above 25°C
(Note 1)
(Note 1)
mW/°C
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 2)
R
°C/W
°C/W
°C
q
JA
493
325
Thermal Resistance,
Junction to Lead (Note 1)
(Note 2)
R
q
JL
188
208
Junction and Storage Temperature Range
NSBC124EPDXV6 (SOT−563) ONE JUNCTION HEATED
Total Device Dissipation
T , T
J
−55 to +150
stg
P
D
T = 25°C
(Note 1)
Derate above 25°C
357
2.9
mW
mW/°C
A
(Note 1)
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
D
(Note 1)
350
NSBC124EPDXV6 (SOT−563) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
T = 25°C
(Note 1)
Derate above 25°C
500
4.0
mW
mW/°C
A
(Note 1)
(Note 1)
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
250
Junction and Storage Temperature Range
NSBC124EPDP6 (SOT−963) ONE JUNCTION HEATED
Total Device Dissipation
T , T
−55 to +150
°C
J
stg
P
D
T = 25°C
(Note 4)
231
269
1.9
2.2
MW
A
(Note 5)
Derate above 25°C
(Note 4)
(Note 4)
mW/°C
(Note 5)
Thermal Resistance,
Junction to Ambient
(Note 5)
R
°C/W
q
JA
540
464
NSBC124EPDP6 (SOT−963) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 4)
339
408
2.7
3.3
MW
A
(Note 5)
Derate above 25°C
(Note 4)
(Note 4)
mW/°C
(Note 5)
Thermal Resistance,
Junction to Ambient
(Note 5)
R
°C/W
°C
q
JA
369
306
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 × 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
2
4. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2
5. FR−4 @ 500 mm , 1 oz. copper traces, still air.
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2
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
ELECTRICAL CHARACTERISTICS (T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.2
−
CB
E
Collector-Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter-Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector-Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector-Emitter Breakdown Voltage (Note 6)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 6)
h
FE
(I = 5.0 mA, V = 10 V)
60
−
100
−
−
C
CE
Collector-Emitter Saturation Voltage (Note 6)
(I = 10 mA, I = 0.3 mA)
V
V
CE(sat)
0.25
C
B
Input Voltage (Off)
(V = 5.0 V, I = 100 mA) (NPN)
V
Vdc
i(off)
i(on)
−
−
1.2
1.2
−
−
CE
C
(V = 5.0 V, I = 100 mA) (PNP)
CE
C
Input Voltage (On)
(V = 0.2 V, I = 5.0 mA) (NPN)
V
Vdc
−
−
1.9
2.0
−
−
CE
C
(V = 0.2 V, I = 5.0 mA) (PNP)
CE
C
Output Voltage (On)
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
Vdc
Vdc
kW
OL
−
−
0.2
CC
B
L
Output Voltage (Off)
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
15.4
0.8
−
−
CC
B
L
Input Resistor
R1
R /R
22
1.0
28.6
1.2
Resistor Ratio
1
2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
400
350
300
250
(1) SOT−363; 1.0 × 1.0 Inch Pad
200
150
100
(2) SOT−563; Minimum Pad
(1) (2) (3)
2
(3) SOT−963; 100 mm , 1 oz. Copper Trace
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
MUN5312DW1, NSBC124EPDXV6
1000
1
V
CE
= 10 V
T ꢀ=ꢀ150°C
A
I /I = 10
C B
25°C
25°C
150°C
-55°C
100
0.1
T ꢀ=ꢀ-55°C
A
10
1
0.01
0.001
1
10
I , COLLECTOR CURRENT (mA)
100
0
10
20
30
40
50
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
3.2
100
10
150°C
25°C
f = 10 kHz
= 0 A
T = 25°C
A
2.8
2.4
2.0
1.6
T ꢀ=ꢀ-55°C
A
I
E
1
0.1
1.2
0.8
0.01
0.001
0.4
0
V = 5 V
O
0
1
2
3
4
5
6
7
8
9
10
0
10
20
30
40
50
V , INPUT VOLTAGE (V)
in
V , REVERSE VOLTAGE (V)
R
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
V = 0.2 V
O
10
1
T ꢀ=ꢀ-55°C
A
25°C
150°C
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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4
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS − PNP TRANSISTOR
MUN5312DW1, NSBC124EPDXV6
1000
1
V
CE
= 10 V
I /I = 10
C B
T ꢀ=ꢀ150°C
A
25°C
150°C
25°C
100
ꢁ0.1
-55°C
T ꢀ=ꢀ-55°C
A
ꢁ0.01
10
1
ꢁ0.001
1
10
100
ꢁ10
ꢁ20
ꢁ30
0
ꢁ40
50
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
10
9
100
10
25°C
150°C
f = 10 kHz
= 0 A
T = 25°C
A
l
E
8
7
T ꢀ=ꢀ-55°C
A
1
6
5
4
3
2
1
ꢁ0.1
ꢁ0.01
V = 5 V
O
0
0
ꢁ0.001
10
20
30
40
50
0
1
ꢁ2
3
ꢁ4
ꢁ5
ꢁ6
ꢁ7
ꢁ8
ꢁ9
10
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (VOLTS)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
V = 0.2 V
O
10
T ꢀ=ꢀ-55°C
A
1
25°C
150°C
ꢁ0.1
0
10
ꢁ20
ꢁ30
ꢁ40
ꢁ50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
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5
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
NSBC124EPDP6
1
1000
I /I = 10
C
B
V
CE
= 10 V
25°C
150°C
100
−55°C
25°C
0.1
150°C
−55°C
10
1
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 12. VCE(sat) vs. IC
Figure 13. DC Current Gain
100
10
1
2.4
2.0
1.6
1.2
0.8
150°C
f = 10 kHz
= 0 A
T = 25°C
A
−55°C
I
E
25°C
0.1
0.4
0
V
O
= 5 V
0.01
0
10
20
30
40
50
0
2
4
6
8
10
12
14
16
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 14. Output Capacitance
Figure 15. Output Current vs. Input Voltage
100
25°C
10
−55°C
150°C
1
V
O
= 0.2 V
40
0.1
0
10
20
30
50
I , COLLECTOR CURRENT (mA)
C
Figure 16. Input Voltage vs. Output Current
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6
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS − PNP TRANSISTOR
NSBC124EPDP6
1
1000
25°C
I /I = 10
C
B
150°C
100
−55°C
25°C
150°C
0.1
10
1
−55°C
V
CE
= 10 V
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 17. VCE(sat) vs. IC
Figure 18. DC Current Gain
7
6
100
10
1
150°C
f = 10 kHz
= 0 A
T = 25°C
A
−55°C
I
E
5
4
3
2
25°C
0.1
1
0
V
O
= 5 V
0.01
0
10
20
30
40
50
0
2
4
6
8
10
12
14
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 19. Output Capacitance
Figure 20. Output Current vs. Input Voltage
100
25°C
10
−55°C
150°C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 21. Input Voltage vs. Output Current
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7
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
2X
aaa H D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
4
3
L
L2
E1
E
DETAIL A
2
aaa C
2X
2X 3 TIPS
bbb H D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
TOP VIEW
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
6X
0.30
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
8
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
A
−X−
L
6
5
2
4
3
MILLIMETERS
DIM MIN NOM MAX
INCHES
NOM MAX
E
−Y−
MIN
H
E
A
b
C
D
E
e
0.50
0.17
0.08
1.50
1.10
0.55
0.22
0.12
1.60
1.20
0.60 0.020 0.021 0.023
0.27 0.007 0.009 0.011
0.18 0.003 0.005 0.007
1.70 0.059 0.062 0.066
1.30 0.043 0.047 0.051
0.02 BSC
1
b 56 PL
C
0.5 BSC
0.20
e
M
0.08 (0.003)
X Y
L
0.10
1.50
0.30 0.004 0.008 0.012
1.70 0.059 0.062 0.066
H
1.60
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
9
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
NOTES:
D
X
Y
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
6
5
4
3
H
E
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
C
D
6X
L
E
0.80
e
HE
L
L2
0.35 BSC
1.00
0.19 REF
0.10
0.95
0.05
1.05
0.15
6X
b
6X
L2
0.08
X Y
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
6X
6X
0.35
0.20
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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DTC124EP/D
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