NSVMUN5338DW1T3G [ONSEMI]
4.7kΩ, 10kΩ Complementary Bias Resistor Transistors;型号: | NSVMUN5338DW1T3G |
厂家: | ONSEMI |
描述: | 4.7kΩ, 10kΩ Complementary Bias Resistor Transistors |
文件: | 总8页 (文件大小:214K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Complementary Bias
Resistor Transistors
R1 = 4.7 kW, R2 = 10 kW
R1 = 47 kW, R2 = 47 W
NPN and PNP Transistors with Monolithic
Bias Resistor Network
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PIN CONNECTIONS
(2)
MUN5338DW1
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
(3)
(1)
R
1
R
2
Q
1
Q
2
Features
R
2
R
1
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
(4)
(5)
(6)
• NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101
Qualified and PPAP Capable*
MARKING DIAGRAM
6
SOT−363
CASE 419B
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
RM MG
G
1
MAXIMUM RATINGS
(T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
RM = Specific Device Code
M
G
= Date Code*
= Pb-Free Package
Rating
Symbol
Max
50
Unit
Vdc
Collector-Base Voltage
Collector-Emitter Voltage
V
CBO
V
CEO
(Note: Microdot may be in either location)
50
Vdc
*Date Code orientation may vary depending up-
on manufacturing location.
Collector Current − Continuous
Input Forward Voltage
I
100
20
mAdc
Vdc
C
V
IN(fwd)
Input Reverse Voltage
V
IN(rev)
7
Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
MUN5338DW1T3G,
NSVMUN5338DW1T3G*
SOT−363
10,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
July, 2021 − Rev. 1
MUN5338/D
MUN5338DW1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
(SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
P
D
T = 25°C
(Note 1)
187
256
1.5
2.0
mW
A
(Note 2)
Derate above 25°C
(Note 1)
mW/°C
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
670
490
°C/W
q
JA
(SOT−363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
250
385
2.0
3.0
mW
A
(Note 2)
Derate above 25°C
(Note 1)
(Note 1)
mW/°C
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 2)
R
°C/W
°C/W
°C
q
JA
493
325
Thermal Resistance,
Junction to Lead (Note 1)
(Note 2)
R
q
JL
188
208
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 × 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
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2
MUN5338DW1
ELECTRICAL CHARACTERISTICS (T = 25°C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
I
I
nAdc
nAdc
mAdc
CBO
(V = 50 V, I = 0)
−
−
−
−
100
500
CB
E
Collector-Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter-Base Cutoff Current
Q1 (V = 6.0 V, I = 0)
I
EBO
−
−
−
−
0.6
0.1
EB
C
Q2 (V = 6.0 V, I = 0)
EB
C
Collector-Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
Vdc
Vdc
(BR)CBO
50
50
−
−
−
−
C
E
Collector-Emitter Breakdown Voltage (Note 4)
(I = 2.0 mA, I = 0)
(BR)CEO
C
B
ON CHARACTERISTICS
DC Current Gain (Note 4)
h
FE
(I = 5.0 mA, V = 10 V)
20
−
−
0.25
−
C
CE
Collector-Emitter Saturation Voltage (Note 4)
(I = 10 mA, I = 0.3 mA)
V
V
CE(sat)
−
C
B
Input Voltage (Off)
(V = 5.0 V, I = 100 mA)
V
V
Vdc
Vdc
i(off)
−
0.6
CE
C
Input Voltage (On)
i(on)
Q1 (V = 0.3 V, I = 5 mA)
−
2.6
1.9
−
CE
C
Q2 (V = 0.2 V, Ic = 3 mA)
CE
Output Voltage (On)
V
OL
Vdc
Q1 (V = 5.0 V, V = 2.5 V, R = 1.0 kW)
−
−
0.2
CC
B
L
Q2 (V = 5.0 V, V = 3.5 V, R = 1.0 kW)
CC
B
L
Output Voltage (Off)
V
OH
Vdc
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
−
−
CC
B
L
Input Resistor (Q1 PNP)
Input Resistor (Q2 NPN)
R1
R /R
3.3
33
4.7
47
6.1
61
kW
Resistor Ratio (Q1 PNP)
Resistor Ratio (Q2 NPN)
0.38
0.8
0.47
1.0
0.56
1.2
1
2
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
400
350
300
250
(1) SOT−363; 1.0 × 1.0 Inch Pad
200
(1)
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
MUN5338DW1
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
NSVMUN5338DW1
10
1
1000
V
= 10 V
CE
I /I = 10
C B
T ꢀ=ꢀ75°C
A
25°C
-25°C
25°C
100
T ꢀ=ꢀ-25°C
A
75°C
0.1
0.01
10
0
20
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
1
100
10
1
25°C
f = 1 MHz
I = 0 mA
75°C
E
T ꢀ=ꢀ-25°C
A
0.8
T = 25°C
A
0.6
0.4
0.1
0.01
0.2
0
V = 5 V
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
V = 0.2 V
O
T ꢀ=ꢀ-25°C
A
25°C
75°C
10
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage versus Output Current
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4
MUN5338DW1
TYPICAL CHARACTERISTICS − PNP TRANSISTOR
NSVMUN5338DW1
1000
1
V
CE
= 10 V
I /I = 10
C B
T ꢀ=ꢀ75°C
A
25°C
100
-25°C
T ꢀ=ꢀ75°C
A
25°C
0.1
-25°C
10
1
0.01
1
10
100
1000
0
10
20
30
40
50
60
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
12
100
10
f = 1 MHz
I = 0 mA
10
8
E
75°C
T = 25°C
A
6
1
0.1
V = 5 V
O
4
SERIES 1
T ꢀ=ꢀ-25°C
A
2
0
25°C
0.01
0
5
10
15
20
25
30
35
40
45
0
2
4
6
8
10
12
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXMG
6X
0.66
G
1
2.50
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. ANODE 2
2. N/C
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1. ANODE
2. ANODE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
3. COLLECTOR
3. CATHODE 1
4. ANODE 1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR 2
6. ANODE
6. CATHODE
6. CATHODE 2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
4. SOURCE 1
5. DRAIN 1
6. GATE 2
4. DRAIN 1
5. DRAIN 2
6. GATE 2
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
5. BASE 2
6. COLLECTOR 2
STYLE 13:
PIN 1. ANODE
2. N/C
STYLE 14:
PIN 1. VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1. VIN1
2. VCC
PIN 1. ANODE 1
2. ANODE 2
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE 3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
5. EMITTER 1
6. COLLECTOR 1
5. EMITTER 2
6. COLLECTOR 1
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1. ANODE 1
2. N/C
STYLE 22:
PIN 1. D1 (i)
2. GND
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
STYLE 24:
PIN 1. CATHODE
2. ANODE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE 2
4. CATHODE 2
5. N/C
3. D2 (i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2 (c)
5. VBUS
6. D1 (c)
4. N/C
5. V EN
5. CH2
6. N/C
6. V REF
6. CATHODE 1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1. ANODE
2. ANODE
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR 1
6. DRAIN 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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