NTB4302G [ONSEMI]

Power MOSFET 74 Amps, 30 Volts N-Channel D2PAK;
NTB4302G
型号: NTB4302G
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET 74 Amps, 30 Volts N-Channel D2PAK

开关 脉冲 晶体管 功率场效应晶体管
文件: 总8页 (文件大小:75K)
中文:  中文翻译
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NTP4302, NTB4302  
Power MOSFET  
74 Amps, 30 Volts  
N−Channel TO−220 and D2PAK  
Features  
Low R  
DS(on)  
http://onsemi.com  
Higher Efficiency Extending Battery Life  
Diode Exhibits High Speed, Soft Recovery  
Avalanche Energy Specified  
74 AMPERES  
30 VOLTS  
RDS(on) = 9.3 mMax  
I  
Specified at Elevated Temperature  
DSS  
Typical Applications  
DC−DC Converters  
N−Channel  
Low Voltage Motor Control  
D
Power Management in Portable and Battery Powered Products: Ie:  
Computers, Printers, Cellular and Cordless Telephones, and PCMCIA  
Cards  
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
4
S
Rating  
Symbol Value  
Unit  
4
Drain−to−Source Voltage  
V
30  
30  
Vdc  
Vdc  
Vdc  
DSS  
1
2
Drain−to−Gate Voltage (R = 10 M)  
V
DGR  
GS  
3
Gate−to−Source Voltage  
− Continuous  
2
V
"20  
D PAK  
GS  
TO−220AB  
CASE 221A  
STYLE 5  
CASE 418AA  
STYLE 2  
Drain Current  
− Continuous @ T = 25°C  
I
I
74  
47  
175  
Adc  
Apk  
C
D
D
1
2
− Continuous @ T = 100°C  
C
3
− Single Pulse (t v10 µs)  
I
p
DM  
MARKING DIAGRAMS  
& PIN ASSIGNMENTS  
Total Power Dissipation @ T = 25°C  
P
D
80  
W
C
Derate above 25°C  
0.66  
W/°C  
4
4
Operating and Storage Temperature Range  
T , T  
55 to  
+150  
°C  
J
stg  
Drain  
Drain  
Single Pulse Drain−to−Source Avalanche  
E
AS  
722  
mJ  
Energy − Starting T = 25°C  
J
NTx4302  
LLYWW  
(V = 30 Vdc, V = 10 Vdc, L = 5.0 mH  
DD  
GS  
NTx4302  
LLYWW  
I
= 17 A, V = 30 Vdc, R = 25 )  
DS G  
L(pk)  
Thermal Resistance  
− Junction−to−Case  
°C/W  
°C  
1
Gate  
3
1
Gate  
3
2
R
R
1.55  
70  
θ
JC  
JA  
Source  
Source  
Drain  
− Junction−to−Ambient (Note 1)  
θ
2
Maximum Lead Temperature for Soldering  
Purposes, 1/8from case for 10 seconds  
T
260  
L
x
= P or B  
Drain  
NTx4302  
LL  
Y
= Device Code  
= Location Code  
= Year  
1. When surface mounted to an FR4 Board using minimum recommended Pad  
2
Size, (Cu Area 0.412 in ).  
2. Current limited by internal lead wires.  
WW  
= Work Week  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NTP4302  
NTB4302  
NTB4302T4  
TO−220AB  
50 Units/Rail  
50 Units/Rail  
2
D PAK  
2
D PAK  
800/Tape & Reel  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
October, 2003 − Rev. 1  
NTP4302/D  
 
NTP4302, NTB4302  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage (Note 3)  
(V = 0 Vdc, I = 250 µAdc)  
V
Vdc  
(BR)DSS  
30  
25  
GS  
D
Temperature Coefficient (Positive)  
mV/°C  
µAdc  
Zero Gate Voltage Drain Current  
I
DSS  
(V = 30 Vdc, V = 0 Vdc)  
1.0  
10  
DS  
GS  
(V = 30 Vdc, V = 0 Vdc, T = 125°C)  
DS  
GS  
J
Gate−Body Leakage Current (V = ±20 Vdc, V = 0 Vdc)  
I
±100  
nAdc  
Vdc  
GS  
DS  
GSS  
ON CHARACTERISTICS (Note 3)  
Gate Threshold Voltage (Note 3)  
(V = V , I = 250 µAdc)  
V
GS(th)  
1.0  
1.9  
−3.8  
3.0  
DS  
GS  
D
Threshold Temperature Coefficient (Negative)  
mV/°C  
mΩ  
Static Drain−to−Source On−Resistance (Note 3)  
R
DS(on)  
(V = 10 Vdc, I = 37 Adc)  
6.8  
6.8  
9.5  
9.3  
9.3  
12.5  
GS  
D
(V = 10 Vdc, I = 20 Adc)  
GS  
D
(V = 4.5 Vdc, I = 10 Adc)  
GS  
D
Forward Transconductance (Note 3) (V = 10 Vdc, I = 20 Adc)  
g
FS  
40  
mhos  
pF  
DS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
2050  
640  
2400  
800  
iss  
(V = 24 Vdc, V = 0 Vdc,  
DS  
GS  
Output Capacitance  
C
oss  
f = 1.0 MHz)  
Transfer Capacitance  
C
225  
310  
rss  
SWITCHING CHARACTERISTICS (Note 4)  
Turn−On Delay Time  
t
10  
22  
45  
35  
18  
70  
32  
30  
28  
7.5  
19  
18  
35  
75  
70  
ns  
ns  
d(on)  
Rise Time  
t
r
(V = 24 Vdc, I = 20 Adc,  
DD  
D
V
= 10 Vdc, R = 2.5 ) (Note 3)  
G
GS  
Turn−Off Delay Time  
Fall Time  
t
t
t
d(off)  
t
f
Turn−On Delay Time  
Rise Time  
d(on)  
t
r
(V = 24 Vdc, I = 10 Adc,  
DD  
D
V
GS  
= 4.5 Vdc, R = 2.5 ) (Note 3)  
G
Turn−Off Delay Time  
Fall Time  
d(off)  
t
f
Gate Charge  
Q
nC  
T
(V = 24 Vdc, I = 37 Adc,  
DS  
D
Q
Q
gs  
gd  
V
GS  
= 4.5 Vdc) (Note 3)  
SOURCE−DRAIN DIODE CHARACTERISTICS  
Forward On−Voltage  
(I = 20 Adc, V = 0 Vdc) (Note 3)  
V
0.90  
0.75  
1.3  
Vdc  
ns  
S
GS  
SD  
(I = 20 Adc, V = 0 Vdc, T = 125°C)  
S
GS  
J
Reverse Recovery Time  
t
37  
21  
rr  
(I = 20 Adc, V = 0 Vdc,  
S
GS  
t
a
dI /dt = 100 A/µs) (Note 3)  
S
t
16  
b
Reverse Recovery Stored Charge  
Q
0.035  
µC  
RR  
3. Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.  
4. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NTP4302, NTB4302  
60  
V
GS  
= 10 V  
70  
60  
50  
40  
30  
20  
10  
7 V  
5 V  
V
10 V  
DS  
4.4 V  
4 V  
T = 25_C  
J
4.6 V  
50  
40  
30  
20  
10  
0
3.8 V  
T = 25°C  
J
3 V  
2.8 V  
3.4 V  
3.2 V  
T = 100°C  
J
T = −55°C  
J
0
0
0.5  
1
1.5  
2
2.5  
3
2
3
4
5
6
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
V
GS  
, GATE−TO−SOURCE VOLTAGE (VOLTS)  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.08  
0.06  
0.015  
0.01  
I
= 20 A  
D
T = 25°C  
J
T = 25°C  
J
V
V
= 4.5 V  
= 10 V  
GS  
0.04  
0.02  
0
0.005  
GS  
0
0
2
4
6
8
10  
0
10  
20  
30  
40  
50  
60  
70  
V
GS  
, GATE−TO−SOURCE VOLTAGE (VOLTS)  
I , DRAIN CURRENT (AMPS)  
D
Figure 3. On−Resistance versus  
Gate−to−Source Voltage  
Figure 4. On−Resistance versus Drain Current  
and Gate Voltage  
10000  
1000  
1.6  
1.4  
I
V
= 20 A  
V
GS  
= 0 V  
D
= 10 V  
GS  
T = 150°C  
J
1.2  
1
100  
10  
T = 100°C  
J
0.8  
0.6  
1
−50 −25  
0
25  
50  
75  
100  
125 150  
0
10  
15  
20  
25  
30  
T , JUNCTION TEMPERATURE (°C)  
J
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−to−Source Leakage Current  
versus Voltage  
http://onsemi.com  
3
NTP4302, NTB4302  
6000  
5000  
4000  
3000  
2000  
1000  
5
30  
24  
V
= 0 V  
V
= 0 V  
T = 25°C  
J
DS  
GS  
Q
T
V
DS  
4
3
2
V
GS  
C
iss  
Q
Q
2
1
18  
12  
6
C
rss  
C
C
iss  
1
0
oss  
I
D
= 37 A  
T = 25°C  
J
C
rss  
0
10  
V
GS  
0 V  
10  
20  
30  
0
10  
20  
30  
DS  
Q , TOTAL GATE CHARGE (nC)  
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE (VOLTS)  
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage versus Total Charge  
1000  
100  
25  
20  
V
= 0 V  
V
I
= 24 V  
= 20 A  
= 10 V  
GS  
DD  
T = 25°C  
J
D
V
GS  
t
d(off)  
t
f
15  
10  
t
r
10  
1
t
d(on)  
5
0
0.5  
1
10  
100  
0.6  
0.7  
0.8  
0.9  
1
R , GATE RESISTANCE ()  
G
V
SD  
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)  
Figure 9. Resistive Switching Time Variations  
versus Gate Resistance  
Figure 10. Diode Forward Voltage versus Current  
1000  
100  
10  
800  
700  
600  
500  
400  
300  
Mounted on 2sq. FR4 board (1sq. 2 oz. Cu 0.06″  
thick single sided) with one die operating, 10 s max.  
I
= 17 A  
D
V
= 20 V  
GS  
SINGLE PULSE  
= 25°C  
T
C
10 µs  
100 µs  
1 ms  
10 ms  
200  
100  
0
dc  
10  
R
LIMIT  
DS(on)  
THERMAL LIMIT  
PACKAGE LIMIT  
1
0.1  
1
100  
25  
50  
75  
100  
125  
150  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
T , STARTING JUNCTION TEMPERATURE (°C)  
J
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy versus  
Starting Junction Temperature  
http://onsemi.com  
4
NTP4302, NTB4302  
SAFE OPERATING AREA  
1.00  
D = 0.5  
0.2  
0.1  
P
(pk)  
0.05  
0.10  
R
(t) = r(t) R  
θ
JC  
θ
JC  
0.02  
0.01  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
SINGLE PULSE  
t
1
READ TIME AT t  
1
t
2
T
− T = P  
C
R (t)  
θ
JC  
J(pk)  
(pk)  
DUTY CYCLE, D = t /t  
1 2  
0.01  
1.0E−05  
1.0E−04  
1.0E−03  
1.0E−02  
1.0E−01  
1.0E+00  
1.0E+01  
t, TIME (s)  
Figure 13. Thermal Response  
di/dt  
I
S
t
rr  
t
a
t
b
TIME  
0.25 I  
t
p
S
I
S
Figure 14. Diode Reverse Recovery Waveform  
http://onsemi.com  
5
NTP4302, NTB4302  
PACKAGE DIMENSIONS  
TO−220 THREE−LEAD  
TO−220AB  
CASE 221A−09  
ISSUE AA  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
SEATING  
PLANE  
−T−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
C
S
B
F
T
4
1
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.46  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
−−−  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.64  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
−−−  
A
K
Q
Z
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.018  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
−−−  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.025  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
−−−  
2
3
U
H
G
H
J
K
L
L
R
J
N
Q
R
S
T
V
G
D
U
V
Z
N
0.080  
2.04  
STYLE 5:  
PIN 1. GATE  
2. DRAIN  
3. SOURCE  
4. DRAIN  
http://onsemi.com  
6
NTP4302, NTB4302  
PACKAGE DIMENSIONS  
D2PAK  
CASE 418AA−01  
ISSUE O  
NOTES:  
C
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
E
V
−B−  
W
INCHES  
DIM MIN MAX  
MILLIMETERS  
4
MIN  
MAX  
A
B
C
D
E
F
G
J
K
M
S
V
0.340 0.380  
0.380 0.405  
0.160 0.190  
0.020 0.036  
0.045 0.055  
8.64  
9.65 10.29  
4.06  
0.51  
1.14  
7.87  
9.65  
4.83  
0.92  
1.40  
−−−  
A
S
1
2
3
0.310  
0.100 BSC  
0.018 0.025  
−−−  
2.54 BSC  
0.46  
2.29  
7.11  
0.64  
2.79  
−−−  
−T−  
SEATING  
PLANE  
K
0.090  
0.280  
0.110  
−−−  
W
0.575 0.625 14.60 15.88  
0.045 0.055 1.14 1.40  
J
G
STYLE 2:  
PIN 1. GATE  
D 3 PL  
M
M
0.13 (0.005)  
T B  
2. DRAIN  
3. SOURCE  
4. DRAIN  
VARIABLE  
CONFIGURATION  
ZONE  
U
M
M
M
F
F
F
VIEW W−W  
1
VIEW W−W  
2
VIEW W−W  
3
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7
NTP4302, NTB4302  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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For additional information, please contact your  
local Sales Representative.  
NTP4302/D  

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