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NTD5805N_12 [ONSEMI]

Power MOSFET 40 V, 51 A, Single N.Channel, DPAK; 功率MOSFET的40 V ， 51 A单N.Channel ， DPAK
NTD5805N_12
型号： NTD5805N_12
厂家： ONSEMI    ONSEMI
描述：

Power MOSFET 40 V, 51 A, Single N.Channel, DPAK
功率MOSFET的40 V ， 51 A单N.Channel ， DPAK
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NTD5805N, NVD5805N  
Power MOSFET  
40 V, 51 A, Single N−Channel, DPAK  
Features  
• Low R  
DS(on)  
• High Current Capability  
http://onsemi.com  
• Avalanche Energy Specified  
• NVD Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q101  
Qualified and PPAP Capable  
• These Devices are Pb−Free and are RoHS Compliant  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
16 mW @ 5.0 V  
9.5 mW @ 10 V  
40 V  
51 A  
Applications  
D
• LED Backlight Driver  
• CCFL Backlight  
• DC Motor Control  
G
• Power Supply Secondary Side Synchronous Rectification  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
S
J
N−CHANNEL MOSFET  
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
40  
Unit  
V
V
DSS  
4
Gate−to−Source Voltage − Continuous  
V
"20  
"30  
V
GS  
GS  
Gate−to−Source Voltage  
V
V
2
1
− Non−Repetitive (t < 10 mS)  
p
3
Continuous Drain  
T
= 25°C  
= 100°C  
= 25°C  
I
51  
36  
47  
A
C
D
Current (R  
(Note 1)  
)
q
JC  
CASE 369C  
DPAK  
(Surface Mount)  
STYLE 2  
Steady  
State  
T
C
Power Dissipation  
(R ) (Note 1)  
T
C
P
W
D
q
JC  
Pulsed Drain Current  
t = 10 ms  
I
85  
A
p
DM  
MARKING DIAGRAM  
& PIN ASSIGNMENT  
Operating Junction and Storage Temperature  
T , T  
J
−55 to  
175  
°C  
stg  
Source Current (Body Diode)  
I
30  
80  
A
S
4
Drain  
Single Pulse Drain−to−Source Avalanche  
E
AS  
mJ  
Energy (V = 50 V, V = 10 V, R = 25 W,  
DD  
GS  
G
I
= 40 A, L = 0.1 mH, V = 40 V)  
L(pk)  
DS  
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
L
260  
°C  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
2
Drain  
1
3
Gate Source  
THERMAL RESISTANCE MAXIMUM RATINGS  
Y
= Year  
WW  
= Work Week  
Parameter  
Symbol  
Value  
Unit  
5805N = Device Code  
= Pb−Free Package  
Junction−to−Case (Drain)  
R
3.2  
°C/W  
q
JC  
G
Junction−to−Ambient − Steady State (Note 1)  
R
107  
q
JA  
1. Surface−mounted on FR4 board using the minimum recommended pad size.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
April, 2012 − Rev. 4  
NTD5805N/D  
 
NTD5805N, NVD5805N  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage  
V
V
GS  
= 0 V, I = 250 mA  
40  
V
(BR)DSS  
D
Drain−to−Source Breakdown Voltage  
Temperature Coefficient  
V
/T  
J
40.8  
mV/°C  
(BR)DSS  
Zero Gate Voltage Drain Current  
I
T = 25°C  
1.0  
100  
100  
mA  
DSS  
J
V
= 0 V,  
GS  
DS  
V
= 40 V  
T = 150°C  
J
Gate−to−Source Leakage Current  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
I
V
= 0 V, V  
=
20 V  
nA  
GSS  
DS  
GS  
GS  
V
V
= V , I = 250 mA  
1.5  
3.5  
V
GS(TH)  
DS  
D
Negative Threshold Temperature  
Coefficient  
V
/T  
7.04  
mV/°C  
GS(TH)  
J
Drain−to−Source On Resistance  
R
V
= 10 V, I = 15 A  
7.6  
9.5  
16  
mW  
S
DS(on)  
GS  
D
V
GS  
= 5.0 V, I = 10 A  
10.9  
8.54  
D
Forward Transconductance  
gFS  
V
= 15 V, I = 15 A  
DS D  
CHARGES, CAPACITANCES AND GATE RESISTANCES  
Input Capacitance  
C
1725  
220  
160  
33  
pF  
iss  
V
= 0 V, f = 1.0 MHz,  
DS  
GS  
Output Capacitance  
C
oss  
V
= 25 V  
Reverse Transfer Capacitance  
Total Gate Charge  
C
rss  
Q
80  
nC  
ns  
G(TOT)  
Threshold Gate Charge  
Gate−to−Source Charge  
Gate−to−Drain Charge  
SWITCHING CHARACTERISTICS (Note 3)  
Turn−On Delay Time  
Rise Time  
Q
2.0  
G(TH)  
V
V
= 10 V, V = 32 V,  
DS  
GS  
I
D
= 30 A  
Q
7.2  
GS  
Q
9.8  
GD  
t
10.2  
17.9  
22.9  
4.5  
d(on)  
t
r
= 10 V, V = 32 V,  
GS  
DD  
I
= 30 A, R = 2.5 W  
D
G
Turn−Off Delay Time  
Fall Time  
t
d(off)  
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS  
Forward Diode Voltage  
V
T = 25°C  
0.83  
0.65  
24.8  
14.6  
10.2  
15.5  
1.2  
V
SD  
J
V
S
= 0 V,  
GS  
I
= 10 A  
T = 150°C  
J
Reverse Recovery Time  
Charge Time  
t
ns  
RR  
ta  
V
GS  
= 0 V, dIs/dt = 100 A/ms,  
I
S
= 30 A  
Discharge Time  
tb  
Reverse Recovery Charge  
Q
nC  
RR  
2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.  
3. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NTD5805N, NVD5805N  
TYPICAL PERFORMANCE CHARACTERISTICS  
100  
90  
80  
70  
60  
50  
40  
30  
20  
100  
10 V  
T = 25°C  
V
DS  
≥ 10 V  
5.2 V  
5.0 V  
J
75  
50  
V
GS  
= 7 V − 5.5 V  
4.5 V  
T = 100°C  
J
25  
0
4.0 V  
3.5 V  
T = 25°C  
J
10  
0
T = −55°C  
J
0
0.5  
1
1.5  
2
2.5  
3
2
3
4
5
6
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
V
GS  
, GATE−TO−SOURCE VOLTAGE (V)  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.021  
0.019  
0.017  
0.015  
0.013  
0.011  
0.05  
0.04  
T = 25°C  
I
= 30 A  
J
D
T = 25°C  
J
0.03  
0.02  
0.01  
0
V
= 5 V  
GS  
V
= 10 V  
45  
GS  
0.009  
0.007  
4
5
6
7
8
9
10  
10  
15  
20  
25  
30  
35  
40  
50  
V
GS  
, GATE−TO−SOURCE VOLTAGE (V)  
I , DRAIN CURRENT (A)  
D
Figure 3. On−Resistance vs. Drain Current  
Figure 4. On−Resistance vs. Drain Current and  
Gate Voltage  
10,000  
1000  
100  
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
V
GS  
= 0 V  
I
V
= 51 A  
D
= 10 V  
GS  
T = 150°C  
J
T = 100°C  
J
10  
−50 −25  
0
25  
50  
75  
100 125 150 175  
2
12  
, DRAIN−TO−SOURCE VOLTAGE (V)  
DS  
22  
32  
42  
T , JUNCTION TEMPERATURE (°C)  
J
V
Figure 5. On−Resistance Variation with  
Figure 6. Drain−to−Source Leakage Current  
Temperature  
vs. Voltage  
http://onsemi.com  
3
NTD5805N, NVD5805N  
TYPICAL PERFORMANCE CHARACTERISTICS  
3000  
2000  
40  
30  
20  
20  
V
= 0 V  
GS  
T = 25°C  
J
15  
10  
C
iss  
V
DS  
QT  
V
GS  
Q
Q
1000  
0
gs  
gd  
5
0
10  
0
C
oss  
I
= 30 A  
D
T = 25°C  
C
J
rss  
10  
Vgs  
5
0
5
10  
Vds  
15 20 25 30 35 40  
0
10  
20  
30  
40  
Q , TOTAL GATE CHARGE (nC)  
g
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
Figure 7. Capacitance Variation  
1000  
100  
10  
30  
20  
10  
0
V
= 0 V  
GS  
V
= 32 V  
= 30 A  
= 10 V  
DD  
T = 25°C  
J
I
D
t
d(off)  
V
GS  
t
f
t
r
t
d(on)  
1
1
10  
R , GATE RESISTANCE (W)  
100  
0.4  
0.5  
0.6  
, SOURCE−TO−DRAIN VOLTAGE (V)  
SD  
0.7  
0.8  
0.9  
1.0  
V
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
1000  
100  
10 ms  
100 ms  
10  
V
GS  
= 10 V  
1 ms  
Single Pulse  
= 25°C  
10 ms  
dc  
T
C
1
R
Limit  
DS(on)  
Thermal Limit  
Package Limit  
0.1  
0.1  
1
10  
100  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (V)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
4
NTD5805N, NVD5805N  
TYPICAL PERFORMANCE CHARACTERISTICS  
10  
1
D = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
Single Pulse  
0.1  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t, PULSE TIME (s)  
Figure 12. Thermal Response  
ORDERING INFORMATION  
Order Number  
†
Package  
Shipping  
NTD5805NT4G  
DPAK  
2500 / Tape & Reel  
2500 / Tape & Reel  
(Pb−Free)  
NVD5805NT4G  
DPAK  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
5
NTD5805N, NVD5805N  
PACKAGE DIMENSIONS  
DPAK  
CASE 369C−01  
ISSUE D  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
2. CONTROLLING DIMENSION: INCHES.  
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-  
MENSIONS b3, L3 and Z.  
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS, OR BURRS. MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS SHALL  
NOT EXCEED 0.006 INCHES PER SIDE.  
5. DIMENSIONS D AND E ARE DETERMINED AT THE  
OUTERMOST EXTREMES OF THE PLASTIC BODY.  
6. DATUMS A AND B ARE DETERMINED AT DATUM  
PLANE H.  
C
A
D
A
E
c2  
b3  
B
4
2
L3  
L4  
Z
H
DETAIL A  
1
3
INCHES  
DIM MIN MAX  
0.086 0.094  
A1 0.000 0.005  
0.025 0.035  
MILLIMETERS  
MIN  
2.18  
0.00  
0.63  
0.76  
4.57  
0.46  
0.46  
5.97  
6.35  
MAX  
2.38  
0.13  
0.89  
1.14  
5.46  
0.61  
0.61  
6.22  
6.73  
A
b2  
c
b
b
b2 0.030 0.045  
b3 0.180 0.215  
M
0.005 (0.13)  
C
H
e
c
0.018 0.024  
c2 0.018 0.024  
GAUGE  
SEATING  
PLANE  
L2  
PLANE  
C
D
E
e
0.235 0.245  
0.250 0.265  
0.090 BSC  
2.29 BSC  
9.40 10.41  
1.40 1.78  
2.74 REF  
0.51 BSC  
0.89 1.27  
H
L
L1  
0.370 0.410  
0.055 0.070  
0.108 REF  
L
A1  
L1  
L2  
0.020 BSC  
DETAIL A  
L3 0.035 0.050  
ROTATED 905 CW  
L4  
Z
−−− 0.040  
0.155 −−−  
−−−  
3.93  
1.01  
−−−  
STYLE 2:  
PIN 1. GATE  
2. DRAIN  
SOLDERING FOOTPRINT*  
6.20  
3.00  
3. SOURCE  
4. DRAIN  
0.244  
0.118  
2.58  
0.102  
5.80  
0.228  
1.60  
0.063  
6.17  
0.243  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81−3−5817−1050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NTD5805N/D  

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