NTF6P02T3 [ONSEMI]

Power MOSFET -6.0 Amps, -20 Volts P-Channel SOT-223; 功率MOSFET -6.0安培,伏特-20 P沟道SOT- 223
NTF6P02T3
型号: NTF6P02T3
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET -6.0 Amps, -20 Volts P-Channel SOT-223
功率MOSFET -6.0安培,伏特-20 P沟道SOT- 223

文件: 总8页 (文件大小:71K)
中文:  中文翻译
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NTF6P02T3  
Power MOSFET  
-6.0 Amps, -20 Volts  
P–Channel SOT–223  
Features  
http://onsemi.com  
Low R  
DS(on)  
Logic Level Gate Drive  
Diode Exhibits High Speed, Soft Recovery  
Avalanche Energy Specified  
–6.0 AMPERES  
–20 VOLTS  
RDS(on) = 44 mW (Typ.)  
Typical Applications  
P–Channel  
Power Management in Portables and Battery–Powered Products, i.e.:  
Cellular and Cordless Telephones and PCMCIA Cards  
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Drain–to–Source Voltage  
Gate–to–Source Voltage  
Drain Current (Note 1)  
Symbol Value  
Unit  
Vdc  
Vdc  
G
V
DSS  
–20  
V
GS  
±8.0  
S
– Continuous @ T = 25°C  
I
I
–10  
–8.4  
–35  
Adc  
A
D
D
MARKING  
DIAGRAM  
– Continuous @ T = 70°C  
A
I
Apk  
W
– Single Pulse (t = 10 µs)  
DM  
p
Total Power Dissipation @ T = 25°C  
P
8.3  
A
D
4
Operating and Storage Temperature Range  
T , T  
–55 to  
+150  
°C  
SOT–223  
CASE 318E  
STYLE 3  
J
stg  
AWW  
6P02  
1
2
Single Pulse Drain–to–Source Avalanche  
E
AS  
150  
mJ  
°C/W  
°C  
3
Energy – Starting T = 25°C  
J
(V = –20 Vdc, V = –5.0 Vdc,  
DD  
GS  
I
= –10 A, L = 3.0 mH, R = 25W)  
A
WW  
6P02  
= Assembly Location  
= Work Week  
= Device Code  
L(pk)  
G
Thermal Resistance  
– Junction to Lead (Note 1)  
– Junction to Ambient (Note 2)  
– Junction to Ambient (Note 3)  
R
R
R
15  
71.4  
160  
θ
θ
θ
JL  
JA  
JA  
PIN ASSIGNMENT  
Maximum Lead Temperature for Soldering  
T
L
260  
4 Drain  
Purposes, 1/8from case for 10 seconds  
1. Steady State.  
2. When surface mounted to an FR4 board using 1pad size,  
2
(Cu. Area 1.127 in ), Steady State.  
3. When surface mounted to an FR4 board using minimum recommended pad  
2
size, (Cu. Area 0.412 in ), Steady State.  
1
2
3
Gate Drain Source  
ORDERING INFORMATION  
Device  
NTF6P02T3  
Package  
Shipping  
SOT–223 4000/Tape & Reel  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
September, 2002 – Rev. 0  
NTF6P02T3/D  
NTF6P02T3  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Characteristic  
OFF CHARACTERISTICS  
Symbol  
Min  
Typ  
Max  
Unit  
Drain–to–Source Breakdown Voltage (Note 4)  
V
Vdc  
(BR)DSS  
(V = 0 Vdc, I = –250 mAdc)  
Temperature Coefficient (Positive)  
–20  
–25  
–11  
GS  
D
mV/°C  
mAdc  
Zero Gate Voltage Drain Current  
I
DSS  
(V = –20 Vdc, V = 0 Vdc)  
–1.0  
–10  
DS  
GS  
(V = –20 Vdc, V = 0 Vdc, T = 125°C)  
DS  
GS  
J
Gate–Body Leakage Current  
(V = ± 8.0 Vdc, V = 0 Vdc)  
I
± 100  
nAdc  
Vdc  
GS  
DS  
GSS  
ON CHARACTERISTICS (Note 4)  
Gate Threshold Voltage (Note 4)  
V
GS(th)  
(V = V , I = –250 mAdc)  
Threshold Temperature Coefficient (Negative)  
–0.4  
–0.7  
2.6  
–1.0  
DS  
GS D  
mV/°C  
mW  
Static Drain–to–Source On–Resistance (Note 4)  
R
DS(on)  
(V = –4.5 Vdc, I = –6.0 Adc)  
44  
57  
57  
50  
70  
GS  
D
(V = –2.5 Vdc, I = –4.0 Adc)  
GS  
D
(V = –2.5 Vdc, I = –3.0 Adc)  
GS  
D
g
12  
Mhos  
pF  
Forward Transconductance (Note 4)  
(V = –10 Vdc, I = –6.0 Adc)  
fs  
DS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
(V = –16 Vdc, V = 0 V,  
C
900  
350  
90  
1200  
500  
150  
DS  
GS  
iss  
f = 1.0 MHz)  
Output Capacitance  
C
oss  
Transfer Capacitance  
Input Capacitance  
C
rss  
(V = –10 Vdc, V = 0 V,  
C
940  
410  
110  
pF  
DS  
GS  
iss  
f = 1.0 MHz)  
Output Capacitance  
C
oss  
Transfer Capacitance  
C
rss  
SWITCHING CHARACTERISTICS (Note 5)  
Turn–On Delay Time  
Rise Time  
(V = –5.0 Vdc, I = –1.0 Adc,  
t
d(on)  
7.0  
25  
75  
50  
8.0  
30  
60  
60  
15  
1.7  
6.0  
12  
45  
125  
85  
ns  
ns  
DD  
D
V
GS  
= –4.5 Vdc,  
t
r
R
= 6.0 W)  
G
Turn–Off Delay Time  
Fall Time  
t
t
t
d(off)  
t
f
Turn–On Delay Time  
Rise Time  
(V = –16 Vdc, I = –6.0 Adc,  
DD  
D
d(on)  
V
GS  
= –4.5 Vdc,  
t
r
R
= 2.5 W)  
G
Turn–Off Delay Time  
Fall Time  
d(off)  
t
f
Gate Charge  
(V = –16 Vdc, I = –6.0 Adc,  
Q
20  
nC  
DS  
D
T
V
GS  
= –4.5 Vdc) (Note 4)  
Q
gs  
gd  
Q
SOURCE–DRAIN DIODE CHARACTERISTICS  
Forward On–Voltage  
(I = –3.0 Adc, V = 0 Vdc) (Note 4)  
V
–0.82  
–0.74  
–0.68  
–1.2  
Vdc  
ns  
S
GS  
SD  
(I = –2.1 Adc, V = 0 Vdc)  
S
GS  
(I = –3.0 Adc, V = 0 Vdc, T = 125°C)  
S
GS  
J
Reverse Recovery Time  
(I = –3.0 Adc, V = 0 Vdc,  
t
rr  
42  
17  
S
GS  
dI /dt = 100 A/ms) (Note 4)  
S
t
a
t
25  
b
Reverse Recovery Stored Charge  
Q
0.036  
mC  
RR  
4. Pulse Test: Pulse Width 300 ms, Duty Cycle 2.0%.  
5. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
NTF6P02T3  
TYPICAL ELECTRICAL CHARACTERISTICS  
12  
–10 V  
–7.0 V  
–5.0 V  
9
12  
–2.2 V  
T = 25°C  
J
V
DS  
–10 V  
–2.0 V  
–1.8 V  
10  
8
–2.4 V  
–3.2 V  
–4.4 V  
6
6
3
–1.6 V  
–1.4 V  
4
T = –55°C  
J
2
0
T = 25°C  
J
V
5
= –1.2 V  
T = 100°C  
J
GS  
0
0
1
2
3
4
6
7
8
9
10  
0
0.5  
1
1.5  
2
2.5  
3
–V  
DS,  
DRAIN–TO–SOURCE VOLTAGE (VOLTS)  
–V  
GS,  
GATE–TO–SOURCE VOLTAGE (VOLTS)  
Figure 1. On–Region Characteristics  
Figure 2. Transfer Characteristics  
0.08  
0.2  
T = 25°C  
J
0.07  
0.06  
0.05  
0.04  
I
= –6.0 A  
D
0.15  
0.1  
V
= –2.5 V  
= –4.5 V  
GS  
T = 25°C  
J
V
GS  
0.05  
0
0.03  
0.02  
0
1
2
3
4
5
6
2
4
6
8
10  
12  
14  
–V  
GS,  
GATE–TO–SOURCE VOLTAGE (VOLTS)  
–I DRAIN CURRENT (AMPS)  
D,  
Figure 3. On–Resistance versus  
Gate–to–Source Voltage  
Figure 4. On–Resistance versus Drain Current  
and Gate Voltage  
1.6  
10,000  
1000  
100  
I
V
= –6.0 A  
D
V
GS  
= 0 V  
T = 150°C  
J
= –4.5 V  
GS  
1.4  
1.2  
1.0  
0.8  
0.6  
T = 100°C  
J
–50 –25  
0
25  
50  
75  
100 125  
150  
2
4
6
8
10  
12  
14  
16  
18  
20  
–V  
DS,  
DRAIN–TO–SOURCE VOLTAGE (VOLTS)  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 6. Drain–to–Source Leakage Current  
versus Voltage  
Figure 5. On–Resistance Variation with  
Temperature  
http://onsemi.com  
3
NTF6P02T3  
TYPICAL ELECTRICAL CHARACTERISTICS  
3000  
2400  
1800  
1200  
5
20  
V
DS  
= 0 V  
V
GS  
= 0 V  
Q
T
T = 25°C  
J
C
iss  
–V  
DS  
4
3
2
16  
12  
8
–V  
GS  
C
rss  
Q
gs  
Q
gd  
C
iss  
I
= –6.0 A  
D
C
oss  
600  
0
4
0
1
0
T = 25°C  
J
C
rss  
–V  
GS  
–V  
DS  
10  
5
0
5
10  
15  
20  
0
4
8
12  
16  
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE  
(VOLTS)  
Q , TOTAL GATE CHARGE (nC)  
g
Figure 7. Capacitance Variation  
Figure 8. Gate–to–Source and  
Drain–to–Source Voltage versus Total Charge  
7
1000  
100  
V
= –16 V  
= –3.0 A  
= –4.5 V  
DD  
V
GS  
= 0 V  
I
D
6
5
4
3
2
T = 25°C  
J
V
GS  
t
t
d(off)  
t
f
t
r
10  
1
d(on)  
1
0
1
10  
R , GATE RESISTANCE (W)  
100  
0.3  
0.6  
0.9  
1.2  
–V , SOURCE–TO–DRAIN VOLTAGE (VOLTS)  
G
SD  
Figure 9. Resistive Switching Time Variation  
versus Gate Resistance  
Figure 10. Diode Forward Voltage versus Current  
http://onsemi.com  
4
NTF6P02T3  
TYPICAL ELECTRICAL CHARACTERISTICS  
1
D = 0.5  
0.2  
0.1  
NORMALIZED TO R  
AT STEADY STATE (1PAD)  
q
JA  
0.05  
0.1  
0.0175 W 0.0710 W 0.2706 W 0.5779 W 0.7086 W  
0.0154 F 0.0854 F 0.3074 F 1.7891 F 107.55 F  
AMBIENT  
0.02  
CHIP  
JUNCTION  
0.01  
SINGLE PULSE  
0.01  
1.0E-03  
1.0E-02  
1.0E-01  
1.0E+00  
t, TIME (s)  
1.0E+01  
1.0E+02  
1.0E+03  
Figure 11. FET Thermal Response  
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the  
total design. The footprint for the semiconductor packages  
must be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.15  
3.8  
0.079  
2.0  
0.248  
6.3  
0.091  
2.3  
0.091  
2.3  
0.079  
2.0  
inches  
0.059  
1.5  
0.059  
1.5  
0.059  
mm  
1.5  
http://onsemi.com  
5
NTF6P02T3  
TYPICAL SOLDER HEATING PROFILE  
For any given circuit board, there will be a group of  
temperature versus time. The line on the graph shows the  
actual temperature that might be experienced on the surface  
of a test board at or near a central solder joint. The two  
profiles are based on a high density and a low density  
board. The Vitronics SMD310 convection/infrared reflow  
soldering system was used to generate this profile. The type  
of solder used was 62/36/2 Tin Lead Silver with a melting  
point between 177–189°C. When this type of furnace is  
used for solder reflow work, the circuit boards and solder  
joints tend to heat first. The components on the board are  
then heated by conduction. The circuit board, because it has  
a large surface area, absorbs the thermal energy more  
efficiently, then distributes this energy to the components.  
Because of this effect, the main body of a component may  
be up to 30 degrees cooler than the adjacent solder joints.  
control settings that will give the desired heat pattern. The  
operator must set temperatures for several heating zones  
and a figure for belt speed. Taken together, these control  
settings make up a heating “profile” for that particular  
circuit board. On machines controlled by a computer, the  
computer remembers these profiles from one operating  
session to the next. Figure 12 shows a typical heating  
profile for use when soldering a surface mount device to a  
printed circuit board. This profile will vary among  
soldering systems, but it is a good starting point. Factors  
that can affect the profile include the type of soldering  
system in use, density and types of components on the  
board, type of solder used, and the type of board or  
substrate material being used. This profile shows  
STEP 1  
PREHEAT  
ZONE 1  
“RAMP”  
STEP 2  
VENT  
“SOAK” ZONES 2 & 5  
“RAMP”  
STEP 3  
HEATING  
STEP 4  
HEATING  
ZONES 3 & 6  
“SOAK”  
STEP 5  
HEATING  
ZONES 4 & 7  
“SPIKE”  
STEP 6  
VENT  
STEP 7  
COOLING  
205° TO 219°C  
PEAK AT  
SOLDER  
JOINT  
170°C  
DESIRED CURVE FOR HIGH  
MASS ASSEMBLIES  
200°C  
150°C  
100°C  
5°C  
160°C  
150°C  
SOLDER IS LIQUID FOR  
40 TO 80 SECONDS  
(DEPENDING ON  
100°C  
140°C  
MASS OF ASSEMBLY)  
DESIRED CURVE FOR LOW  
MASS ASSEMBLIES  
TIME (3 TO 7 MINUTES TOTAL)  
T
MAX  
Figure 12. Typical Solder Heating Profile  
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6
NTF6P02T3  
PACKAGE DIMENSIONS  
SOT–223 (TO–261)  
CASE 318E–04  
ISSUE K  
A
F
NOTES:  
ąă1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
ąă2. CONTROLLING DIMENSION: INCH.  
4
2
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
B
MIN  
6.30  
3.30  
1.50  
0.60  
2.90  
2.20  
MAX  
6.70  
3.70  
1.75  
0.89  
3.20  
2.40  
0.100  
0.35  
2.00  
1.05  
10  
1
3
A
B
C
D
F
0.249  
0.130  
0.060  
0.024  
0.115  
0.087  
0.263  
0.145  
0.068  
0.035  
0.126  
0.094  
D
G
H
J
L
0.0008 0.0040 0.020  
G
0.009  
0.060  
0.033  
0
0.014  
0.078  
0.041  
10  
0.24  
1.50  
0.85  
0
J
K
L
C
M
S
_
_
_
_
0.08 (0003)  
0.264  
0.287  
6.70  
7.30  
M
H
K
STYLE 3:  
PIN 1. GATE  
2. DRAIN  
3. SOURCE  
4. DRAIN  
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7
NTF6P02T3  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all  
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
2–9–1 Kamimeguro, Meguro–ku, Tokyo, Japan 153–0051  
Phone: 81–3–5773–3850  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
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ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
NTF6P02T3/D  

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