NTMFS4925NET1G [ONSEMI]
Power MOSFET 30 V, 48 A, Single NâChannel, SOâ8 FL; 功率MOSFET的30 V , 48 A单娜????通道, SOA ???? 8 FL型号: | NTMFS4925NET1G |
厂家: | ONSEMI |
描述: | Power MOSFET 30 V, 48 A, Single NâChannel, SOâ8 FL |
文件: | 总7页 (文件大小:131K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTMFS4925NE
Power MOSFET
30 V, 48 A, Single N−Channel, SO−8 FL
Features
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Dual Sided Cooling Capability
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• Optimized for 5 V, 12 V Gate Drives
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
6.0 mW @ 10 V
10 mW @ 4.5 V
Compliant
Applications
30 V
48 A
• CPU Power Delivery
• DC−DC Converters
D (5,6)
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
V
30
20
V
V
A
DSS
G (4)
V
GS
Continuous Drain
Current R
I
D
T = 25°C
16.7
A
q
JA
S (1,2,3)
N−CHANNEL MOSFET
T = 100°C
A
10.5
2.70
(Note 1)
Power Dissipation
T = 25°C
A
P
W
A
D
D
D
D
R
(Note 1)
q
JA
MARKING
DIAGRAM
Continuous Drain
I
D
T = 25°C
A
25.2
15.9
6.16
Current R
(Note 1)
≤ 10 s
q
JA
T = 100°C
A
D
Power Dissipation
≤ 10 s (Note 1)
T = 25°C
A
P
I
W
A
1
S
S
S
G
D
D
R
q
JA
Steady
State
4925NE
AYWWG
G
Continuous Drain
Current R
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
T = 25°C
A
9.7
6.2
D
q
JA
T = 100°C
A
(Note 2)
D
Power Dissipation
T = 25°C
A
P
I
0.92
W
A
R
(Note 2)
q
JA
A
Y
= Assembly Location
= Year
= Work Week
Continuous Drain
Current R
T
= 25°C
=100°C
= 25°C
48
30
D
C
q
JC
WW
G
T
C
(Note 1)
= Pb−Free Package
Power Dissipation
T
C
P
23.2
W
A
(Note: Microdot may be in either location)
R
(Note 1)
q
JC
Pulsed Drain
Current
T = 25°C, t = 10 ms
A
I
DM
195
100
p
ORDERING INFORMATION
Current Limited by Package
T = 25°C
A
I
A
Dmax
†
Operating Junction and Storage
Temperature
T ,
STG
−55 to
°C
Device
Package
Shipping
J
T
+150
NTMFS4925NET1G
SO−8 FL
(Pb−Free)
1500 /
Source Current (Body Diode)
Drain to Source DV/DT
I
S
21
6.0
34
A
Tape & Reel
dV/d
V/ns
mJ
t
NTMFS4925NET3G
SO−8 FL
(Pb−Free)
5000 /
Single Pulse Drain−to−Source Avalanche
Energy (T = 25°C, V = 24 V, V = 10 V,
E
AS
Tape & Reel
J
DD
GS
I = 26 A , L = 0.1 mH, R = 25 W)
L
pk
G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
September, 2011 − Rev. 0
NTMFS4925NE/D
NTMFS4925NE
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
5.4
Unit
Junction−to−Case (Drain)
R
q
JC
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – Steady State (Note 4)
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
Junction−to−To p
R
46.3
136.2
20.3
10.2
q
JA
R
°C/W
q
JA
R
q
JA
R
q
JT
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
21
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
= 24 V
T = 25°C
1.0
10
DSS
GS
DS
J
V
mA
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V
=
GS
20 V
100
nA
GSS
DS
V
V
= V , I = 250 mA
1.2
1.7
3.9
4.0
4.0
6.4
6.3
52
2.2
6.0
10
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/°C
GS(TH)
R
V
= 10 V
I
D
I
D
I
D
I
D
= 30 A
= 15 A
= 30 A
= 15 A
DS(on)
GS
GS
mW
V
= 4.5 V
Forward Transconductance
g
FS
V
= 1.5 V, I = 15 A
S
DS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
1264
483
143
10.8
2.0
ISS
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
C
OSS
C
RSS
V
= 0 V, f = 1 MHz, V = 15 V
pF
GS
DS
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
G(TH)
V
GS
= 4.5 V, V = 15 V; I = 30 A
nC
nC
DS
D
Q
3.8
GS
Q
4.2
GD
Q
V
GS
= 10 V, V = 15 V; I = 30 A
21.5
G(TOT)
DS
D
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
t
9.5
32.7
16.4
6.2
d(ON)
t
r
V
= 4.5 V, V = 15 V,
DS
GS
D
ns
I
= 15 A, R = 3.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTMFS4925NE
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Symbol
Test Condition
Min
Typ
Max
Unit
t
7.4
27.5
20.3
4.1
d(ON)
Rise Time
t
r
V
= 10 V, V = 15 V,
DS
GS
D
ns
I
= 15 A, R = 3.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.86
0.75
25.8
12.4
13.4
13.6
1.1
SD
J
V
S
= 0 V,
GS
V
I
= 30 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
ns
a
V
= 0 V, dIS/dt = 100 A/ms,
GS
I
S
= 30 A
Discharge Time
t
b
Reverse Recovery Charge
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
Q
nC
RR
L
L
1.00
0.005
1.84
0.8
nH
nH
nH
W
S
D
G
T = 25°C
A
Gate Inductance
L
Gate Resistance
R
2.2
G
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
NTMFS4925NE
TYPICAL CHARACTERISTICS
120
110
120
10 V
4.5 V
T = 25°C
J
T = −55°C
J
110
100
90
80
70
60
50
40
30
20
4.0 V
3.5 V
100
90
80
70
60
50
40
30
20
T = 25°C
T = 125°C
J
J
V
DS
= 10 V
3.0 V
V
= 2.5 V
10
0
10
0
GS
0
1
2
3
4
5
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.011
0.010
0.009
0.008
0.007
0.006
0.005
I
D
= 30 A
T = 25°C
V
V
= 4.5 V
= 10 V
GS
GS
0.004
0.003
0.002
0
3
4
5
6
7
8
9
10
10 20 30 40 50 60 70 80 90 100 110 120
V
GS
(V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
10,000
1,000
I
V
= 30 A
D
T = 150°C
J
= 10 V
GS
T = 125°C
J
100
10
T = 85°C
J
0.7
0.6
−50 −25
V
GS
= 0 V
25
0
25
50
75
100 125
150
5
10
15
20
30
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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4
NTMFS4925NE
TYPICAL CHARACTERISTICS
1600
1400
1200
1000
800
11
QT
10
9
T = 25°C
J
C
iss
V
GS
= 0 V
8
7
6
C
C
oss
5
Qgs
Qgd
600
T = 25°C
J
4
3
400
V
V
= 10 V
= 15 V
= 30 A
GS
DD
2
rss
200
0
1
0
I
D
0
5
10
15
20
25
30
0
2
4
6
8
10 12 14 16 18 20 22
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
100
30
25
20
15
10
V
GS
= 0 V
V
V
= 10 V
= 15 V
= 15 A
GS
DD
t
t
d(off)
I
D
t
f
r
10
1
t
d(on)
T = 125°C
T = 25°C
J
J
5
0
1
10
R , GATE RESISTANCE (W)
100
0.3
0.4
0.5
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
40
36
32
28
24
20
16
12
8
1000
100
10
0 V < V < 10 V
Single Pulse
GS
I
= 26 A
D
T
C
= 25°C
10 ms
100 ms
1 ms
1
10 ms
R
Limit
DS(on)
0.1
dc
Thermal Limit
Package Limit
4
0
0.01
0.01
0.1
1
10
100
25
50
75
100
125
150
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
T , STARTING JUNCTION TEMPERATURE (°C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
NTMFS4925NE
TYPICAL CHARACTERISTICS
100
10
D = 0.5
0.2
0.1
0.05
0.02
1
0.01
0.1
0.01
SINGLE PULSE
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (ms)
Figure 13. Thermal Response
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6
NTMFS4925NE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8 FL)
CASE 488AA−01
ISSUE E
2 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
MIN
0.90
0.00
0.33
0.23
NOM
1.00
−−−
0.41
0.28
MAX
1.10
0.05
0.51
0.33
4 X
q
E1
2
D
5.15 BSC
4.90
−−−
6.15 BSC
5.80
−−−
1.27 BSC
0.61
−−−
0.61
0.17
D1
D2
E
E1
E2
e
G
K
L
L1
M
4.50
3.50
5.10
4.22
c
A1
5.50
3.45
6.10
4.30
1
2
3
4
0.51
0.51
0.51
0.05
3.00
0
0.71
−−−
0.71
0.20
3.80
TOP VIEW
C
3 X
e
SEATING
PLANE
0.10
0.10
C
C
3.40
−−−
DETAIL A
q
12
A
_
_
SOLDERING FOOTPRINT*
SIDE VIEW
DETAIL A
3X
4X
1.270
0.750
4X
1.000
b
8X
STYLE 1:
0.10
0.05
C
c
A
B
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
e/2
L
0.965
1
4
5. DRAIN
6. DRAIN
K
0.29X05
0.475
1.330
2X
0.495
E2
4.530
PIN 5
(EXPOSED PAD)
M
3.200
L1
D2
BOTTOM VIEW
2X
1.530
G
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Email: orderlit@onsemi.com
For additional information, please contact your local
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NTMFS4925NE/D
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