NTMTSC1D6N10MCTXG [ONSEMI]
Single N-Channel Power MOSFET 100V, 367A, 1.7mΩ;
| 型号： | NTMTSC1D6N10MCTXG |
| 厂家： | 
ONSEMI |
| 描述： | Single N-Channel Power MOSFET 100V, 367A, 1.7mΩ |
| 文件： | 总7页 (文件大小：420K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel
100 V, 1.7 mW, 267 A
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
100 V
1.7 mW @ 10 V
267 A
D (5−8)
NTMTSC1D6N10MC
Features
G (1)
• Small Footprint (8x8 mm) for Compact Design
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
S (2−4)
G
• New Power 88 Dual Cool Package
N−CHANNEL MOSFET
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
100
20
Unit
V
V
DSS
TDFNW8
Gate−to−Source Voltage
V
GS
V
CASE 507AS
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
267
189
291
145
30
A
C
D
q
JC
T
C
(Notes 1, 3)
Steady
State
MARKING DIAGRAM
Power Dissipation
T
C
P
W
A
D
R
(Note 1)
q
JC
T
C
= 100°C
Continuous Drain
Current R
T = 25°C
A
I
D
q
JA
T = 100°C
A
21
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25°C
A
P
3.9
W
D
R
(Notes 1, 2)
q
JA
1D6N10M AWLYW
T = 100°C
A
1.9
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
900
A
A
p
1D6N10M = Specific Device Code
= Assembly Location
WL = Wafer Lot Code
A
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
J
stg
Y
W
= Year Code
= Work Week Code
Source Current (Body Diode)
I
S
243
A
Single Pulse Drain−to−Source Avalanche
E
AS
1550
mJ
Energy (I
= 22.3 A)
L(pk)
Lead Temperature for Soldering Purposes
T
260
°C
L
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
0.5
Unit
Junction−to−Case − Bottom − Steady State
Junction−to−Case − Top − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JCB
R
0.8
q
JCT
R
38
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
November, 2022 − Rev. 2
NTMTSC1D6N10MC/D
NTMTSC1D6N10MC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
100
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
64.5
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25 °C
5
DSS
GS
J
V
= 100 V
mA
T = 125°C
J
10
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
100
nA
GSS
DS
GS
GS
V
V
= V , I = 650 mA
2.0
4.0
V
GS(TH)
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
−10
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 90 A
= 58 A
1.42
1.7
4.3
DS(on)
GS
D
mW
V
= 6 V
GS
D
Forward Transconductance
g
FS
V
DS
=5 V, I = 100 A
233
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
7630
4260
80
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0 V, f = 100 KHz, V = 50 V
pF
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
V
= 10 V, V = 50 V; I = 116 A
106
20
G(TOT)
GS
GS
DS
D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
G(TH)
nC
V
Q
35
GS
GD
GP
V
= 10 V, V = 50 V; I = 116 A
DS
D
Q
V
22
5
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
34
24
69
29
d(ON)
Rise Time
t
r
V
= 10 V, V = 50 V,
DS
GS
D
ns
V
I
= 116 A, R = 6 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.83
0.7
54
1.2
SD
RR
J
V
S
= 0 V,
GS
I
= 90 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
t
26
ns
a
V
= 0 V, dIS/dt = 100 A/ms,
GS
I
S
= 58 A
Discharge Time
t
28
b
Reverse Recovery Charge
Reverse Recovery Time
Charge Time
Q
52
nC
RR
t
43
RR
t
a
t
b
23
ns
V
GS
= 0 V, dIS/dt = 1000 A/ms,
I
= 58 A
S
Discharge Time
19
Reverse Recovery Charge
Q
385
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NTMTSC1D6N10MC
TYPICAL CHARACTERISTICS
250
200
150
100
250
5.5 V
V
GS
= 10 to 6 V
V
DS
= 5 V
200
150
100
5.0 V
T = 25°C
J
50
0
50
0
4.5 V
4.0 V
T = 125°C
T = −55°C
J
J
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
9
10
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
4
3
2
50
40
30
20
T = 25°C
J
I
D
= 90 A
V
= 6 V
GS
V
GS
= 10 V
1
0
10
0
T = 25°C
J
2
3
4
5
6
7
8
9
10
10
60
110
160
210
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current
Voltage
100K
10K
1K
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
T = 150°C
J
I
V
= 90 A
D
= 10 V
GS
T = 125°C
J
T = 85°C
J
100
10
T = 25°C
J
1
0.1
0.01
0.6
0.4
−50 −25
0.001
0
25
50
75 100 125 150 175
5
15
25
V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
35
45
55
65
75
85
95
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NTMTSC1D6N10MC
TYPICAL CHARACTERISTICS
10K
1K
12
C
ISS
10
8
C
OSS
Q
Q
GD
GS
6
100
10
4
V
I
= 50 V
= 116 A
DS
V
= 0 V
GS
2
0
D
T = 25°C
J
T = 25°C
J
C
f = 1 MHz
RSS
0
20
40
60
80
100
0
25
50
75
100
125
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
250
1000
V
GS
= 0 V
V
V
= 10 V
= 50 V
GS
DS
I
D
= 116 A
100
T = 175°C
J
t
d(off)
T = 150°C
J
t
d(on)
T = 125°C
J
t
f
10
1
t
r
T = 25°C
J
T = −55°C
J
25
1
10
R , GATE RESISTANCE (W)
100
0.1
0.3
0.5
0.7
0.9
1.1
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
1000
100
T
= 25°C
J(initial)
10 ms
T
= 25°C
C
Single Pulse
10
1
0.5 ms
1 ms
T
= 100°C
V
≤ 10 V
J(initial)
GS
1
R
Limit
10 ms
DS(on)
Thermal Limit
Package Limit
0.1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NTMTSC1D6N10MC
TYPICAL CHARACTERISTICS
1
50% Duty Cycle
20%
10%
5%
0.1
2%
1%
0.01
Single Pulse
0.000001
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t, PULSE TIME (sec)
Figure 13. Junction−to−Ambient Transient Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NTMTSC1D6N10MCTXG
1D6N10M
POWER 88 Dual Cool
3,000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 3
CASE 507AS
ISSUE B
DATE 29 MAR 2021
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A
= Assembly Location
WL = Wafer Lot Code
Y
= Year Code
W
= Work Week Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON95716G
TDFNW8 8.3x8.4, 2P, DUAL COOL, OPTION 3
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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