NTPF082N65S3F [ONSEMI]
Power MOSFET, N-Channel, SUPERFET® III, FRFET®, 650 V, 40 A, 82 mΩ, TO-220F;型号: | NTPF082N65S3F |
厂家: | ONSEMI |
描述: | Power MOSFET, N-Channel, SUPERFET® III, FRFET®, 650 V, 40 A, 82 mΩ, TO-220F |
文件: | 总10页 (文件大小:321K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTPF082N65S3F
MOSFET – Power, N-Channel,
SUPERFET III, FRFET
650 V, 40 A, 82 mW
Description
www.onsemi.com
SUPERFET III MOSFET is ON Semiconductor’s brand-new high
voltage super-junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on-resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
V
R
MAX
I MAX
D
DS
DS(ON)
650 V
82 mW @ 10 V
40 A
D
G
Features
• 700 V @ T = 150°C
J
S
• Typ. R
= 70 mW
DS(on)
• Ultra Low Gate Charge (Typ. Q = 70 nC)
g
• Low Effective Output Capacitance (Typ. C
• 100% Avalanche Tested
= 680 pF)
oss(eff.)
• These Devices are Pb−Free and are RoHS Compliant
Applications
G
D
S
• Telecom/Sever Power Supplies
• Industrial Power Supplies
• UPS/Solar
TO−220 FULLPAK
CASE 221D
MARKING DIAGAM
$Y&Z&3&K
NTPF
082N65S3F
$Y
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
&Z
&3
&K
NTPF082N65S3F = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
August, 2019 − Rev. 5
NTPF082N65S3F/D
NTPF082N65S3F
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise specified)
C
Symbol
Parameter
Value
650
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
DC
30
V
AC (f > 1 Hz)
30
V
I
D
Drain Current
Continuous (T = 25°C)
40*
A
C
Continuous (T = 100°C)
25.5*
100*
510
C
I
Drain Current
Pulsed (Note 1)
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 2)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
AS
AS
I
4.8
E
0.48
100
mJ
V/ns
AR
dv/dt
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
50
P
(T = 25°C)
48
W
W/°C
°C
D
C
Derate Above 25°C
0.38
−55 to +150
300
T , T
Operating and Storage Temperature Range
J
STG
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*Drain current limited by maximum junction temperature.
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. I = 4.8 A, R = 25 W, starting T = 25°C.
AS
G
J
3. I ≤ 20 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
2.62
Unit
R
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
_C/W
q
JC
JA
R
62.5
q
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Tube
Quantity
50 Units
NTPF082N65S3F
NTPF082N65S3F
TO−220 FULLPACK
(Pb−Free)
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2
NTPF082N65S3F
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
−
−
−
−
−
−
V
V
V
V
I
= 0 V, I = 1 mA, T = 25_C
DSS
GS
D
J
= 0 V, I = 1 mA, T = 150_C
GS
D
J
DBV
/DT
Breakdown Voltage Temperature
Coefficient
= 10 mA, Referenced to 25_C
0.67
V/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 650 V, V = 0 V
−
−
−
−
97
−
10
−
mA
DSS
GS
= 520 V, T = 125_C
C
I
Gate to Body Leakage Current
=
30 V, V = 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 0.97 mA
3.0
−
−
5.0
82
−
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 20 A
70
24
D
g
FS
= 20 V, I = 20 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 400 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
3240
70
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
Total Gate Charge at 10 V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
DS
V
DS
V
DS
= 0 V to 400 V, V = 0 V
680
125
70
oss(eff.)
GS
C
= 0 V to 400 V, V = 0 V
GS
oss(er.)
Q
= 400 V, I = 20 A, V = 10 V
D GS
g(tot)
(Note 4)
Q
24
gs
Q
27
gd
ESR
f = 1 MHz
2.3
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
V
= 400 V, I = 20 A,
−
−
−
−
30
27
64
3.7
−
−
−
−
ns
ns
ns
ns
d(on)
DD
GS
D
= 10 V, R = 3 W
g
t
r
(Note 4)
t
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Source to Drain Diode Forward Current
−
−
−
−
−
−
40
100
1.3
A
A
V
S
I
SM
V
SD
Source to Drain Diode Forward
Voltage
V
GS
= 0 V, I = 20 A
SD
t
Reverse Recovery Time
V
= 0 V, I = 20 A,
−
−
103
397
−
−
ns
rr
GS
F
SD
dI /dt = 100 A/ms
Q
Reverse Recovery Charge
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
NTPF082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
200
100
200
V
=
10.0V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
GS
* Notes:
1. V = 20 V
DS
100
10
2. 250 ms Pulse Test
10
150°C
25°C
1
* Notes:
1. 250 ms Pulse Test
−55°C
2. T = 25°C
C
0.1
0.2
1
1
10
3
4
5
6
7
8
9
V , Drain-Source Voltage [V]
DS
V , Gate-Source Voltage [V]
GS
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.20
0.15
0.10
1000
100
10
* Note: T = 25°C
* Notes:
C
1. V = 0 V
GS
2. 250 ms Pulse Test
150°C
25°C
1
V
= 10 V
GS
−55°C
0.1
V
= 20 V
GS
0.05
0.00
0.01
0.001
0
20
40
60
80
100
0.0
0.5
1.0
1.5
2.0
I , Drain Current [A]
D
V
SD
, Body Diode Forward Voltage [V]
Figure 3. On-Resistance Variation vs. Drain
Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
100000
10
* Note: I = 20 A
D
10000
1000
100
C
iss
8
6
4
2
0
V
= 130 V
DS
V
= 400 V
DS
C
oss
* Notes:
1. V = 0 V
10
1
GS
2. f = 1 MHz
C
C
C
C
= C (C = shorted)
gd ds
= C + C
= C
rss
iss
oss
rss
ds
gd
gd
0.01
0.1
1
10
100
1000
0
20
40
60
80
V , Drain-Source Voltage [V]
DS
Q , Total Gate Charge [nC]
g
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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4
NTPF082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
1.2
1.1
3.0
* Notes:
* Notes:
1. V = 0 V
GS
1. V = 10 V
GS
2. I = 10 mA
D
2.5
2.0
1.5
2. I = 20 A
D
1.0
0.9
0.8
1.0
0.5
0.0
−50
0
50
100
150
−50
0
50
100
150
T , Junction Temperature [5C]
J
T , Junction Temperature [5C]
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variant vs. Temperature
200
50
40
100
10
10 ms
100 ms
1 ms
10 ms
30
20
1
DC
Operation in This Area
is Limited by R
DS(on)
* Notes:
0.1
0.01
1. T = 25°C
J
10
0
2. T = 150°C
J
3. Single Pulse
1
10
100
1000
25
50
75
100
125
150
V , Drain-Source Voltage [V]
DS
T , Case Temperature [5C]
C
Figure 9. Maximum Safe Operation Area
Figure 10. Maximum Drain Current
vs. Case Temperature
20
16
12
8
4
0
0
130
260
390
520
650
V , Drain to Source Voltage [V]
DS
Figure 11. EOSS vs. Drain to Source Voltage
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5
NTPF082N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
P
DM
0.1
0.02
0.01
t
1
t
2
Notes:
(t) = r(t) × R
0.01
Z
q
q
JC
JC
R
q
= 2.62°C/W
JC
SINGLE PULSE
Peak T = P
× Z (t) + T
q
JC C
J
DM
Duty Cycle, D = t / t
1
2
0.001
−4
−3
−2
−1
0
1
2
10
10
10
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 12. Transient Thermal Response Curve
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6
NTPF082N65S3F
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
r
t
f
t
t
d(off)
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
NTPF082N65S3F
+
DUT
V
SD
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPAK
CASE 221D−03
ISSUE K
DATE 27 FEB 2009
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
−T−
PLANE
−B−
C
2. CONTROLLING DIMENSION: INCH
3. 221D-01 THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
F
S
Q
INCHES
DIM MIN MAX
MILLIMETERS
U
SCALE 1:1
MIN
15.67
9.96
4.50
0.60
2.95
MAX
16.12
10.63
4.90
A
B
C
D
F
0.617
0.392
0.177
0.024
0.116
0.635
0.419
0.193
0.039
0.129
A
1
2 3
1.00
3.28
H
G
H
J
0.100 BSC
2.54 BSC
−Y−
K
0.118
0.018
0.503
0.048
0.135
0.025
0.541
0.058
3.00
0.45
3.43
0.63
K
L
12.78
1.23
13.73
1.47
G
N
J
N
Q
R
S
U
0.200 BSC
5.08 BSC
R
0.122
0.099
0.092
0.239
0.138
0.117
0.113
0.271
3.10
2.51
2.34
6.06
3.50
2.96
2.87
6.88
L
D 3 PL
M
M
0.25 (0.010)
B
Y
MARKING
DIAGRAMS
STYLE 1:
PIN 1. GATE
2. DRAIN
STYLE 2:
PIN 1. BASE
STYLE 3:
PIN 1. ANODE
2. COLLECTOR
3. EMITTER
2. CATHODE
3. ANODE
3. SOURCE
AYWW
xxxxxxG
AKA
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. MT 1
2. MT 2
xxxxxxG
AYWW
PIN 1. CATHODE
2. ANODE
3. CATHODE
PIN 1. CATHODE
2. ANODE
3. GATE
3. GATE
Bipolar
Rectifier
A
Y
WW
= Assembly Location
= Year
= Work Week
xxxxxx = Specific Device Code
G
= Pb−Free Package
= Assembly Location
= Year
A
Y
xxxxxx = Device Code
G
AKA
= Pb−Free Package
= Polarity Designator
WW
= Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42514B
TO−220 FULLPAK
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
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