NTTFS2D1N04HLTWG [ONSEMI]
N-Channel Shielded Gate PowerTrench® MOSFET 40 V, 150 A, 2.1 mΩ;型号: | NTTFS2D1N04HLTWG |
厂家: | ONSEMI |
描述: | N-Channel Shielded Gate PowerTrench® MOSFET 40 V, 150 A, 2.1 mΩ 栅 |
文件: | 总7页 (文件大小:503K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET - Single N-Channel
40 V, 2.1 mW, 150 A
NTTFS2D1N04HL
Features
• Max R
• Max R
= 2.1 mW at V = 10 V, I = 23 A
GS D
DS(on)
= 3.3 mW at V = 4.5 V, I = 18 A
DS(on)
GS
D
• High Performance Technology for Extremely Low R
DS(on)
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• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
Typical Applications
• DC−DC Buck Converters
• Point of Load
• High Efficiency Load Switch and Low Side Switching
• Oring FET
2.1 mW @ 10 V
3.3 mW @ 4.5 V
40 V
150 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
V
DSS
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
T
= 25°C
I
150
A
C
D
N−CHANNEL MOSFET
Current R
(Note 1)
q
JC
Steady
State
Power Dissipation
(Note 1)
P
83
24
W
A
D
R
q
JC
Continuous Drain
Current R
T = 25°C
A
I
D
q
JA
Steady
State
(Notes 1, 2)
Power Dissipation
P
2.2
W
D
R
(Notes 1, 2)
q
JA
WDFN8
3.3X3.3, 0.65P
CASE 483AW
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
958
A
A
p
Operating Junction and Storage Temperature
Range
T , T
−55 to
+150
°C
J
stg
Source Current (Body Diode)
I
S
69
A
MARKING DIAGRAM
Single Pulse Drain−to−Source Avalanche
E
AS
126
mJ
Energy (I = 29 A, L = 0.3 mH) (Note 3)
AV
S2D1
AYWWZZ
Lead Temperature Soldering Reflow for Sol-
dering Purposes (1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
S2D1 = Specific Device Code
A
Y
= Assembly Plant Code
= Numeric Year Code
THERMAL RESISTANCE RATINGS
WW = Work Week Code
ZZ = Assembly Lot Code
Parameter
Symbol
Value
1.5
Unit
Junction−to−Case − Steady State (Note 1)
Junction−to−Ambient − Steady State (Note 1)
R
°C/W
q
JC
ORDERING INFORMATION
R
54.8
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
Device
NTTFS2D1N04HLTWG
Package
Shipping†
2
PQFN8
(Pb−Free) Tape & Reel
3000 /
2. Surface−mounted on FR4 board using 1 in pad size, 1 oz. Cu pad.
3. E of 126 mJ is based on started T = 25°C, I = 29 A, V = 32 V, V =
AS
J
AS
DD
GS
10 V. 100% test at I = 29 A.
AS
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
May, 2020 − Rev. 1
NTTFS2D1N04HL/D
NTTFS2D1N04HL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
40
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
I
D
= 250 mA, ref to 25°C
21.80
mV/°C
(BR)DSS
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25°C
10
mA
DSS
GS
DS
J
V
= 40 V
T = 125°C
J
100
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
GS
V
V
= V , I = 120 mA
1.2
2.0
V
GS(TH)
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
I = 120 mA, ref to 25°C
D
−4.63
1.7
2.5
256
1
mV/°C
mW
GS(TH)
J
R
V
= 10 V, I = 23 A
2.1
3.3
DS(on)
GS
GS
D
V
= 4.5 V, I = 18 A
D
Forward Transconductance
Gate−Resistance
g
FS
V
DS
= 15 V, I = 23 A
S
D
R
T = 25°C
A
W
G
CHARGES & CAPACITANCES
Input Capacitance
C
V
= 0 V, f = 1 MHz, V = 20 V
2745
645
38
pF
ISS
GS
DS
Output Capacitance
C
OSS
RSS
Reverse Transfer Capacitance
Total Gate Charge
C
Q
V
GS
= 10 V, V = 32 V, I = 11.5 A
43.6
20.7
6.1
nC
nC
G(TOT)
G(TOT)
DS
D
Total Gate Charge
Q
V
GS
= 4.5 V, V = 32 V, I = 11.5 A
DS D
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
Q
GS
GD
GP
6.2
V
2.5
V
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
t
V
D
= 4.5 V, V = 32 V,
17
12
32
9
ns
d(ON)
GS
DD
I
= 11.5 A, R = 2.5 W
G
Rise Time
t
r
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
S
= 0 V,
T = 25°C
0.79
0.64
22
1.2
V
SD
GS
J
I
= 23 A
T = 125°C
J
Reverse Recovery Time
Reverse Recovery Charge
Charge Time
t
V
= 0 V, dI /dt = 100 A/ms,
ns
nC
ns
ns
RR
GS
GS
S
I
S
= 11.5 A
Q
17
RR
t
V
= 0 V, dI /dt = 100 A/ms,
22
a
S
I
S
= 11.5 A
Discharge Time
t
b
13
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Switching characteristics are independent of operating junction temperatures
5. As an N−ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
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2
NTTFS2D1N04HL
TYPICAL CHARACTERISTICS
22
20
18
16
14
12
10
8
3.0 V
2.8 V
2.6 V
22
20
18
16
14
12
10
8
V
DS
= 5 V
10 V to 4 V
V
GS
= 2.4 V
T = 25°C
J
6
6
4
4
2
0
2.2 V
2.0 V
2
0
T = 125°C
J
T = −55°C
J
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
40
35
30
25
20
15
10
4
3
2
T = 25°C
T = 25°C
D
J
J
I
= 23 A
V
= 4.5 V
= 10 V
GS
V
GS
1
0
5
0
2
3
4
5
6
7
8
9
10
0
15 30 45 60 75 90 105 120 135 150
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
100K
10K
1K
V
I
= 10 V
= 23 A
2.0
1.8
1.6
1.4
1.2
1.0
GS
T = 150°C
D
J
T = 125°C
J
T = 85°C
J
100
10
0.8
0.6
−50 −25
0
25
50
75
100
125 150
0
5
10
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (°C)
J
V
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NTTFS2D1N04HL
TYPICAL CHARACTERISTICS
10
10K
1K
C
ISS
9
8
7
6
5
4
3
C
OSS
100
C
RSS
Q
Q
GD
GS
10
1
T = 25°C
V
= 0 V
J
GS
2
1
0
I
= 11.5 A
= 32 V
T = 25°C
D
J
V
DS
f = 1 MHz
0
5
10
15
20
25
30
35
40
45
0
5
10
15
20
25
30
35
40
Q , TOTAL GATE CHARGE (nC)
G
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1000
100
100
10
V
GS
= 0 V
V
V
= 4.5 V
= 32 V
= 11.5 A
GS
DS
I
D
t
d(off)
t
d(on)
t
r
1
10
1
t
f
T = 150°C
J
T = 25°C T = −55°C
J
J
0.1
1
10
R , GATE RESISTANCE (W)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
10
1000
100
10
T
= 25°C
J(initial)
10 ms
T
= 25°C
C
Single Pulse
≤ 10 V
100 ms
1
V
GS
T
= 125°C
J(initial)
1 ms
R
Limit
1
DS(on)
10 ms
100 ms
1 s
Thermal Limit
Package Limit
0.1
0.1
0.1
1
10
100
0.001 0.01
0.1
1
10
100
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (ms)
AV
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NTTFS2D1N04HL
TYPICAL CHARACTERISTICS
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
0.01
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
PULSE TIME (sec)
Figure 13. Transient Thermal Impedance
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3X3.3, 0.65P
CASE 483AW
ISSUE A
DATE 10 SEP 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
XXXX
AYWW
WW = Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13672G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
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