NUP2114UCMR6 [ONSEMI]
Transient Voltage Suppressors Low Capacitance ESD Protection for High Speed Data; 瞬态电压抑制器低电容ESD保护高速数据
| 型号： | NUP2114UCMR6 |
| 厂家： | 
ONSEMI |
| 描述： | Transient Voltage Suppressors Low Capacitance ESD Protection for High Speed Data |
| 文件： | 总5页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NUP2114UCMR6
Transient Voltage
Suppressors
Low Capacitance ESD Protection for
High Speed Data
http://onsemi.com
The NUP2114UCMR6 transient voltage suppressor is designed to
protect high speed data lines from ESD. Ultra−low capacitance and
high level of ESD protection makes this device well suited for use in
USB 2.0 high speed applications.
V
P
I/O
Features
• Low Capacitance 0.8 pF
• Low Clamping Voltage
• Stand Off Voltage: 5 V
• Low Leakage
I/O
• ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model
and Class C (Exceeding 400 V) per Machine Model
• IEC61000−4−2 Level 4
MARKING
DIAGRAM
• UL Flammability Rating of 94 V−0
• This is a Pb−Free Device
1
P2M MG
TSOP−6
CASE 318G
G
Typical Applications
1
• High Speed Communication Line Protection
• USB 2.0 High Speed Data Line and Power Line Protection
• Gigabit Ethernet
P2M = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
• Notebook Computers
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
PIN CONNECTIONS
Rating
Symbol
Value
−40 to +125
−55 to +150
260
Unit
°C
Operating Junction Temperature Range
Storage Temperature Range
T
J
I/O
I/O
1
2
3
6
5
4
T
stg
°C
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
°C
V
N
V
P
Human Body Model (HBM)
Machine Model (MM)
IEC61000−4−2 Contact
IEC61000−4−2 Air
ESD
16000
400
13000
15000
V
NC
NC
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See Application Note AND8308/D for further description of
survivability specs.
Device
Package
Shipping
NUP2114UCMR6T1G TSOP−6
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
January, 2010 − Rev. 4
NUP2114UCMR6/D
NUP2114UCMR6
ELECTRICAL CHARACTERISTICS
A
I
(T = 25°C unless otherwise noted)
I
F
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
PP
V
C
PP
V
Working Peak Reverse Voltage
RWM
V
C
V
V
BR RWM
V
I
R
Maximum Reverse Leakage Current @ V
RWM
I
V
F
R
T
I
V
Breakdown Voltage @ I
Test Current
BR
T
I
T
F
I
Forward Current
V
Forward Voltage @ I
F
F
I
PP
P
pk
Peak Power Dissipation
Max. Capacitance @ V = 0 and f = 1.0 MHz
C
R
Uni−Directional TVS
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T =25°C unless otherwise specified)
J
Parameter
Reverse Working Voltage
Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
V
RWM
(Note 1)
I = 1 mA, (Note 2)
5.0
V
BR
6.0
7.5
V
T
I
R
V
RWM
= 5 V
1.0
mA
V
V
C
I
PP
I
PP
= 5 A (Note 3)
= 8 A (Note 3)
9.0
10
Clamping Voltage
V
C
V
Maximum Peak Pulse Current
Junction Capacitance
Junction Capacitance
Clamping Voltage
I
8x20 ms Waveform
12
1.0
0.5
12
A
PP
C
C
V
= 0 V, f = 1 MHz between I/O Pins and GND
= 0 V, f = 1 MHz between I/O Pins
0.8
pF
pF
V
J
J
R
R
V
V
V
@ I = 1 A (Note 4)
C
C
PP
Clamping Voltage
Per IEC 61000−4−2 (Note 5)
Figures 1 and 2
V
1. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
), which should be equal or greater than the DC
RWM
2. V is measured at pulse test current I .
BR
T
3. Nonrepetitive current pulse (Pin 5 to Pin 2)
4. Surge current waveform per Figure 5.
5. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
http://onsemi.com
2
NUP2114UCMR6
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
Test
Voltage
(kV)
First Peak
Current
(A)
100%
90%
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 5. 8 X 20 ms Pulse Waveform
http://onsemi.com
3
NUP2114UCMR6
Figure 6. 500 MHz Data Pattern
http://onsemi.com
4
NUP2114UCMR6
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE U
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
H
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
6
1
5
4
L2
GAUGE
PLANE
E1
E
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
2
3
L
MILLIMETERS
SEATING
PLANE
M
C
NOTE 5
DIM
A
A1
b
c
D
E
E1
e
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
NOM
1.00
MAX
1.10
0.10
0.50
0.26
3.10
3.00
1.70
1.05
0.60
b
DETAIL Z
e
0.06
0.38
0.18
3.00
c
2.75
A
0.05
1.50
0.95
L
0.40
A1
L2
M
0.25 BSC
−
DETAIL Z
0°
10°
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
6X
0.95
3.20
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NUP2114UCMR6/D
相关型号：
NUP2114UCMR6T1G
Transient Voltage Suppressors Low Capacitance ESD Protection for High Speed Data
ONSEMI
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