NVCR8LS4D1N15MCA [ONSEMI]
Power MOSFET, N-Channel, 150 V, 4.1 mΩ, Bare Die;
| 型号： | NVCR8LS4D1N15MCA |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET, N-Channel, 150 V, 4.1 mΩ, Bare Die |
| 文件： | 总6页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – Power, N-Channel
150 V, 4.1 mW
NVCR8LS4D1N15MCA
Features
• Typical R
• Typical Q
= 2.9 mꢀ at V = 10 V
GS
DS(on)
= 90.4 nC at V = 10 V
g(tot)
GS
• AEC−Q101 Qualified
• RoHS Compliant
ORDERING INFORMATION
DIMENSION (mm)
Die Size
Device
Package
6604 × 4445
NVCR8LS4D1N15MCA
Wafer
Sawn on Foil
Die Size (Sawn)
Source Attach Area
Gate Attach Area
Die Thickness
6584 15 × 4425 15
(6023.6 × 2057.5) × 2
330 × 600
RECOMMENDED STORAGE CONDITIONS
Temperature
RH
22 to 28°C
203.2 25.4
40 to 66%
Gate and Source: AlSiCu
Drain: Ti−NiV−Ag (back side of die)
Passivation: Polyimide
Wafer Diameter: 8 inch
Wafer Sawn on UV Tape
Bad Dice Identified in Inking
Gross Die Counts: 840
The Chip is 100% Probed to Meet the Conditions and Limits
Specified at T = 25°C.
J
Symbol
BV
Parameter
Condition
I = 250 ꢁ A, V = 0 V
D
Min
150
−
Typ
−
Max
−
Unit
V
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Bare Die Drain to Source On Resistance
Source to Drain Diode Voltage
DSS
GS
I
V
DS
V
GS
V
GS
= 120 V, V = 0 V
−
1
ꢁ A
nA
V
DSS
GS
I
=
20 V, V = 0 V
−
−
100
4.5
4.1
1.2
−
GSS
DS
V
GS(th)
= V , I = 584 ꢁ A
2.5
−
−
DS
D
*R
I
I
= 20 A, V = 10 V
2.9
−
mꢀ
DS(on)
D
GS
V
E
= 20 A, V = 0 V
−
V
SD
SD
GS
Single Pulse Drain−to−Source
Avalanche Energy
L = 0.1 mH, I = 83 A
344
−
mJ
AS
AS
*Accurate R
test at die level is not feasible for this thin die as limited by the test contact precision attainable in a die form. The max R
DS(on)
DS(on)
DS(on)
specification is defined from the historical performance of the die in package but is not guaranteed by test in production. The die R
performance depends on the Source wire/ribbon bonding layout.
© Semiconductor Components Industries, LLC, 2022
1
Publication Order Number:
NVCR8LS4D1N15MCA−DIE/D
June, 2022 − Rev. 0
NVCR8LS4D1N15MCA
MOSFET MAXIMUM RATINGS in Reference to the NVBLS4D0N15MC electrical data in TOLL
(T = 25°C unless otherwise noted)
J
Symbol
Parameter
Ratings
150
Unit
V
DSS
Drain to Source Voltage
Gate to Source Voltage
Continuous Drain Current R
V
V
A
V
GS
20
I
D
(V = 10) (Note 1)
GS
ꢂ
J
C
T
C
T
C
= 25°C
171
121
= 100°C
E
Single Pulse Avalanche Energy (I
= 15.9 A)
LPEAK
2300
mJ
W
AS
P
Power Dissipation R
300
D
ꢂ
JC
Derate Above 25°C
2
−55 to +175
0.5
W/°C
°C
T , T
Operating and Storage Temperature
Thermal Resistance, Junction to Case
J
STG
R
°C/W
°C/W
ꢂ
JC
JA
R
Maximum Thermal Resistance, Junction to Ambient (Note 2)
35.8
ꢂ
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by silicon.
2. R
is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
ꢂ
JA
mounting surface of the drain pins. R
is guaranteed by design, while R
is determined by the board design. The maximum rating
ꢂ
ꢂ
JC
JA
2
presented here is based on mounting on a 1 in pad of 2oz copper.
ELECTRICAL CHARACTERISTICS in Reference to the NVBLS4D0N15MC electrical data in TOLL
(T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
I
= 250 ꢁ A, V = 0 V
150
−
−
−
V
DSS
D
GS
I
V
V
= 120 V,
= 0 V
T = 25°C
J
−
1
ꢁ
A
DSS
DS
GS
I
Gate to Source Leakage Current
V
GS
=
20 V
−
−
100
nA
GSS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
Drain to Source on Resistance
V
= V , I = 584 ꢁ A
2.5
−
4.5
4.4
V
GS(th)
DS(on)
GS
GS
DS
D
R
I
D
= 80 A,
T = 25°C
J
−
3.1
mꢀ
V
= 10 V
DYNAMIC CHARACTERISTICS
V
= 75 V, V = 0 V, f = 1 MHz
C
Input Capacitance
−
−
−
−
−
−
−
−
7490
2055
27.2
1.3
−
−
−
−
−
−
−
−
pF
DS
GS
iss
C
Output Capacitance
pF
pF
ꢀ
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
f = 1 MHz
g
V
GS
= 10 V, V = 75 V, I = 80 A
DS D
Q
Total Gate Charge
90.4
24.7
40.2
12.6
nC
nC
nC
nC
g(ToT)
Q
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
g(th)
Q
gs
Q
gd
SWITCHING CHARACTERISTICS
V
DD
V
GS
= 75 V, I = 80 A,
t
Turn−On Delay
Rise Time
−
−
−
−
47
115
58
−
−
−
−
ns
ns
ns
ns
D
d(on)
= 10 V, R
= 6 ꢀ
GEN
t
r
t
Turn−Off Delay
Fall Time
d(off)
t
f
11
DRAIN−SOURCE DIODE CHARACTERISTIC
V
Source to Drain Diode Voltage
Reverse Recovery Time
I
= 80 A, V = 0 V
−
−
−
−
1.2
−
V
SD
SD
GS
I = 80 A, dI /dt = 100 A/ꢁ s
F
t
84
ns
nC
SD
rr
Q
Reverse Recovery Charge
180
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
NVCR8LS4D1N15MCA
TYPICAL CHARACTERISTICS
180
165
150
135
120
105
90
180
10 V to 6.5 V
V
DS
= 5 V
165
150
135
120
105
90
V
GS
= 6.0 V
75
75
T = 25°C
J
60
60
5.5 V
5.0 V
45
30
15
0
45
30
15
0
T = 125°C
J
T = −55°C
J
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 5.5 6.0
, DRAIN−TO−SOURCE VOLTAGE (V)
0
1
2
3
4
5
6
7
8
9
10
V
, GATE−TO−SOURCE VOLTAGE (V)
V
DS
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
20
4.5
4.0
T = 25°C
D
T = 25°C
J
J
18
16
14
12
10
8
I
= 80 A
3.5
3.0
V
GS
= 10 V
6
2.5
2.0
4
2
0
5.5 6.0 6.5 7.0
7.5 8.0 8.5 9.0
9.5 10
0
31
62
93
124
155
186
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.5
2.0
1M
V
= 10 V
= 80 A
GS
I
D
100K
10K
T = 175°C
J
T = 150°C
J
1.5
1.0
0.5
T = 125°C
J
1K
V
GS
= 0 V
100
−50 −25
0
25
50
75 100 125 150 175
0
30
60
90
120
150
T , JUNCTION TEMPERATURE (°C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVCR8LS4D1N15MCA
TYPICAL CHARACTERISTICS (continued)
10
10K
1K
Q
T
C
iss
9
8
7
6
5
4
3
2
1
0
C
oss
Q
Q
GD
GS
100
C
rss
10
1
V = 75 V
DS
V
= 0 V
GS
I
D
= 80 A
T = 25°C
J
T = 25°C
J
f = 1 MHz
0
25
50
75
100
125
150
0
10
20
30
40
50
60
70
80
90
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Gate Charge
1000
100
10
1000
100
V
V
= 10 V
= 75 V
= 80 A
V
GS
= 0 V
GS
DS
I
D
t
r
t
d(off)
t
d(on)
10
1
t
f
1
T = 175°C
J
T = 150°C
T = 25°C T = −55°C
J J
J
0.1
1
10
R , GATE RESISTANCE (ꢀ)
100
0.2 0.3
0.4
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.5
0.6
0.7
0.8
0.9
1.0
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
1000
100
T
= 25°C
J(initial)
10 ꢁ s
Single Pulse
= 25°C
0.5 ms
1 ms
T
C
10
1
V
GS
≤ 10 V
1
T
= 100°C
J(initial)
R
Limit
DS(on)
Thermal Limit
Package Limit
10 ms
0.1
0.1
1
10
100
1000
0.0001
0.001
TIME IN AVALANCHE (s)
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
NVCR8LS4D1N15MCA
TYPICAL CHARACTERISTICS (continued)
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (s)
Figure 13. Thermal Characteristics (Junction−to−Ambient)
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5
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