NVD4809NT4G [ONSEMI]
功率 MOSFET,30V,58A,9mΩ,单 N 沟道,DPAK,逻辑电平;型号: | NVD4809NT4G |
厂家: | ONSEMI |
描述: | 功率 MOSFET,30V,58A,9mΩ,单 N 沟道,DPAK,逻辑电平 晶体管 功率场效应晶体管 |
文件: | 总8页 (文件大小:271K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTD4809N
Power MOSFET
30 V, 58 A, Single N--Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb--Free Devices
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V
R
DS(on)
MAX
I MAX
D
(BR)DSS
Applications
9.0 mΩ @ 10 V
14 mΩ @ 4.5 V
• CPU Power Delivery
• DC--DC Converters
• Low Side Switching
30 V
58 A
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain--to--Source Voltage
Gate--to--Source Voltage
Continuous Drain
Symbol
Value
30
Unit
V
N--Channel
V
DSS
G
V
20
11.5
9.0
V
GS
I
A
T
= 25°C
= 85°C
= 25°C
D
A
S
4
Current (R ) (Note 1)
θ
JA
T
A
4
Power Dissipation
(R ) (Note 1)
T
A
P
2.0
W
A
D
θ
JA
4
Continuous Drain
Current (R ) (Note 2)
I
T
A
= 25°C
= 85°C
= 25°C
9.0
7.0
1.3
D
θ
JA
T
A
2
1
Steady
State
1
2
3
1
2
3
CASE 369D
IPAK
(Straight Lead
DPAK)
3
Power Dissipation
(R ) (Note 2)
T
A
P
I
W
A
D
θ
JA
CASE 369AD
IPAK
(Straight Lead)
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
Continuous Drain
T
C
T
C
T
C
= 25°C
= 85°C
= 25°C
58
45
52
D
Current (R
(Note 1)
)
θ
JC
Power Dissipation
P
W
D
(R ) (Note 1)
θ
JC
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Pulsed Drain Current
t =10ms
p
T
A
= 25°C
= 25°C
I
130
45
A
A
DM
I
DmaxPkg
4
Drain
Current Limited by Package
T
A
4
4
Drain
Drain
Operating Junction and Storage Temperature
T , T
-- 5 5 t o
175
°C
J
stg
Source Current (Body Diode)
Drain to Source dV/dt
I
43
6.0
A
S
dV/dt
V/ns
mJ
Single Pulse Drain--to--Source Avalanche
E
91.0
AS
2
Energy (V = 24 V, V = 10 V,
DD
GS
1
2
3
Drain
1
3
L = 1.0 mH, I
= 13.5 A, R = 25 Ω)
Gate Drain Source
L(pk)
G
Gate Source
1
2
3
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Gate Drain Source
Y
WW
= Year
= Work Week
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
4809N = Device Code
= Pb--Free Package
G
ORDERING INFORMATION
Seedetailedorderingandshippinginformationinthepackage
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
June, 2010 -- Rev. 11
NTD4809N/D
NTD4809N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction--to--Case (Drain)
R
2.9
3.5
74
°C/W
θ
JC
Junction--to--TAB (Drain)
R
θ
JC--TAB
Junction--to--Ambient -- Steady State (Note 1)
Junction--to--Ambient -- Steady State (Note 2)
R
R
θ
JA
JA
116
θ
1. Surface--mounted on FR4 board using 1 in sq pad size, 1 oz Cu.
2. Surface--mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain--to--Source Breakdown Voltage
V
V
= 0 V, I = 250 mA
30
V
(BR)DSS
GS
D
Drain--to--Source Breakdown Voltage
Temperature Coefficient
V
/T
J
25
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
T = 25°C
1.0
10
mA
DSS
J
V
V
= 0 V,
= 24 V
GS
DS
T = 125°C
J
Gate--to--Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
100
nA
GSS
DS
GS
V
V
= V , I = 250 mA
1.5
2.5
9.0
14
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain--to--Source On Resistance
V
/T
J
5.7
7.0
7.0
12
mV/°C
mΩ
GS(TH)
R
DS(on)
V
= 10 to
11.5 V
I
I
I
I
= 30 A
= 15 A
= 30 A
= 15 A
GS
D
D
D
D
V
= 4.5 V
GS
11
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
gFS
V
= 15 V, I = 15 A
9.0
S
DS
D
C
iss
1456
315
200
11
pF
V
= 0 V, f = 1.0 MHz,
GS
Output Capacitance
C
oss
V
= 12 V
DS
Reverse Transfer Capacitance
Total Gate Charge
C
rss
Q
13
nC
G(TOT)
Threshold Gate Charge
Gate--to--Source Charge
Gate--to--Drain Charge
Total Gate Charge
Q
2.5
4.8
5.0
25
G(TH)
V
= 4.5 V, V = 15 V,
DS
GS
I
= 30 A
D
Q
GS
Q
GD
Q
V
= 11.5 V, V = 15 V,
nC
ns
G(TOT)
GS
DS
I
= 30 A
D
SWITCHING CHARACTERISTICS (Note 4)
Turn--On Delay Time
Rise Time
t
12.3
21.3
15.1
5.3
d(on)
t
r
V
= 4.5 V, V = 15 V,
DS
GS
I
= 15 A, R = 3.0 Ω
D
G
Turn--Off Delay Time
Fall Time
t
d(off)
t
f
Turn--On Delay Time
Rise Time
t
t
7.0
ns
d(on)
t
22.7
25.3
2.8
r
V
= 11.5 V, V = 15 V,
DS
GS
I
= 15 A, R = 3.0 Ω
D
G
Turn--Off Delay Time
Fall Time
d(off)
t
f
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD4809N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
V
DRAIN--SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
J
0.95
0.83
19.5
10.7
8.8
1.2
SD
V
= 0 V,
GS
I
= 30 A
S
T = 125°C
J
Reverse Recovery Time
Charge Time
t
ns
RR
ta
V
= 0 V, dIs/dt = 100 A/ms,
GS
I
= 30 A
S
Discharge Time
tb
Reverse Recovery Time
PACKAGE PARASITIC VALUES
Source Inductance
Q
9.2
nC
nH
RR
L
2.49
0.0164
1.88
S
D
D
G
Drain Inductance, DPAK
Drain Inductance, IPAK
Gate Inductance
L
L
L
T
A
= 25°C
3.46
Gate Resistance
R
G
2.4
Ω
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3
NTD4809N
TYPICAL PERFORMANCE CURVES
120
110
120
6 V
7 V
T = 25°C
V
≥ 10 V
J
DS
6.5 V
5.5 V
5 V
100
90
80
70
60
50
40
30
20
10
0
100
80
4.5 V
4.2 V
60
4 V
3.8 V
3.6 V
3.4 V
3.2 V
40
T = 125°C
J
T = 25°C
J
20
0
T = --55°C
J
0
1
2
3
4
5
0
1
2
3
4
5
6
V
, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
V
, GATE--TO--SOURCE VOLTAGE (VOLTS)
GS
DS
Figure 1. On--Region Characteristics
Figure 2. Transfer Characteristics
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
T = 25°C
J
I
= 30 A
D
T = 25°C
J
V
= 4.5 V
GS
0.020
0.015
0.010
V
= 11.5 V
GS
0.005
0
0.005
0
3
4
5
6
7
8
9
10
10 15
20 25 30
35 40 45 50 55 60
V
, GATE--TO--SOURCE VOLTAGE (VOLTS)
I , DRAIN CURRENT (AMPS)
D
GS
Figure 3. On--Resistance vs. Gate--to--Source
Voltage
Figure 4. On--Resistance vs. Drain Current and
Gate Voltage
100,000
10,000
2.0
1.5
1.0
0.5
V
= 0 V
GS
I
V
= 30 A
D
= 10 V
GS
T = 175°C
J
1000
T = 125°C
J
100
10
--50 --25
0
25
50
75 100 125 150 175
5
10
15
20
25
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
DS
Figure 5. On--Resistance Variation with
Temperature
Figure 6. Drain--to--Source Leakage Current
vs. Drain Voltage
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4
NTD4809N
TYPICAL PERFORMANCE CURVES
2500
2000
1500
1000
12
V
= 0 V
V
= 0 V
GS
Q
DS
T
T = 25°C
J
11
10
9
C
C
iss
8
C
iss
7
6
5
rss
Q
Q
2
1
4
3
2
500
0
I
= 30 A
D
C
oss
0 V < V < 11.5 V
T = 25°C
GS
1
0
C
J
rss
10
5
0
5
10
15
20
25
0 1 2 3 4 5 6 7 8 9 1011121314151617181920212223242526
V
V
DS
GS
Q , TOTAL GATE CHARGE (nC)
G
GATE--TO--SOURCE OR DRAIN--TO--SOURCE VOLTAGE (VOLTS)
Figure 8. Gate--To--Source and Drain--To--Source
Voltage vs. Total Charge
Figure 7. Capacitance Variation
30
25
20
15
10
1000
V
= 15 V
= 30 A
= 11.5 V
V
= 0 V
DD
GS
GS
I
D
T = 25°C
J
V
100
t
d(off)
t
r
10
1
t
d(on)
t
f
5
0
1
10
100
0.5
0.6
0.7
0.8
0.9
1.0
R , GATE RESISTANCE (OHMS)
G
V
, SOURCE--TO--DRAIN VOLTAGE (VOLTS)
SD
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
120
100
80
I
= 15 A
D
10 ms
100 ms
1 ms
60
V
= 20 V
10 ms
GS
1
SINGLE PULSE
40
T
A
= 25°C
0.1
R
LIMIT
dc
DS(on)
20
0
THERMAL LIMIT
PACKAGE LIMIT
0.01
0.01
0.1
1
10
100
25
50
75
100
125
150
175
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
DS
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
NTD4809N
TYPICAL PERFORMANCE CURVES
100
10
25°C
100°C
125°C
1
0.1
1
10
100
1000
PULSE WIDTH (ms)
Figure 13. Avalanche Characteristics
100
10
D = 0.5
0.2
0.1
0.05
0.02
0.01
1
0.1
0.01
SINGLE PULSE
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 14. Thermal Response
ORDERING INFORMATION
Order Number
†
Package
Shipping
NTD4809NT4G
DPAK
2500 Tape & Reel
75 Units/Rail
(Pb--Free)
NTD4809N--1G
NTD4809N--35G
IPAK
(Pb--Free)
IPAK Trimmed Lead
(3.5 0.15 mm)
(Pb--Free)
75 Units/Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NTD4809N
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA--01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2 0.030 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 90° CW
L4
Z
-- -- -- 0 . 0 4 0
0.155 ------
-- -- --
3.93
1 . 0 1
------
STYLE 2:
PIN 1. GATE
2. DRAIN
SOLDERING FOOTPRINT*
3. SOURCE
4. DRAIN
6.20
3.00
0.244
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
SCALE 3:1
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
NTD4809N
PACKAGE DIMENSIONS
3.5 MM IPAK, STRAIGHT LEAD
CASE 369AD--01
ISSUE O
NOTES:
E
A
1.. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
E3
E2
A1
2.. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM TERMINAL TIP.
L2
L1
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD GATE OR MOLD FLASH.
D2
D
L
MILLIMETERS
DIM MIN
MAX
2.38
0.60
1.10
0.89
1.10
6.22
-- -- --
A
A1
A2
b
b1
D
D2
E
E2
E3
e
2.19
0.46
0.87
0.69
0.77
5.97
4 . 8 0
6.35
4 . 7 0
4.45
T
SEATING
PLANE
A1
b1
e
2X
A2
E2
6.73
-- -- --
5.46
3X b
M
0.13
T
2.28 BSC
D2
L
L1
L2
3.40
-- -- --
0.89
3.60
2 . 1 0
1.27
OPTIONAL
CONSTRUCTION
IPAK (STRAIGHT LEAD DPAK)
CASE 369D--01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
C
B
R
2. CONTROLLING DIMENSION: INCH.
V
E
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
4
2
Z
A
K
S
1
3
2.29 BSC
-- T --
SEATING
PLANE
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
------
K
R
S
V
Z
J
0.155
------
F
H
STYLE 2:
PIN 1. GATE
2. DRAIN
D 3 PL
G
M
0.13 (0.005)
T
3. SOURCE
4. DRAIN
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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For additional information, please contact your local
Sales Representative
NTD4809N/D
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SI9137LG
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SI9122E
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