NVDS015N15MCT4G [ONSEMI]
N-Channel Shielded Gate PowerTrench 150 V, 15 mΩ, 61.3 A;
| 型号： | NVDS015N15MCT4G |
| 厂家： | 
ONSEMI |
| 描述： | N-Channel Shielded Gate PowerTrench 150 V, 15 mΩ, 61.3 A 栅 |
| 文件： | 总7页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - N-Channel
Shielded Gate PowerTrench[
150 V, 15 mW, 61.3 A
NVDS015N15MC
Features
• Shielded Gate MOSFET Technology
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• Max R
• Low R
= 15 mW at V = 10 V, I = 29 A
GS D
DS(on)
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
150 V
15 mW @ 10 V
61.3 A
D
Typical Applications
• Primary Side for 48 V Isolated Bus
• SR for MV Secondary Applications
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
S
Parameter
Drain−to−Source Voltage
Symbol
Value
150
20
Unit
V
N−CHANNEL MOSFET
V
DSS
Gate−to−Source Voltage
V
GS
V
MARKING
DIAGRAM
Continuous Drain
T
= 25°C
= 100°C
= 25°C
I
61.3
43.4
107.1
53.6
10.5
7.4
A
C
D
Current R
(Note 2)
q
JC
T
C
Steady
State
4
Power Dissipation
(Note 2)
T
C
P
W
A
Drain
D
4
R
q
JC
T
C
= 100°C
AYWW
015
N15MCG
Continuous Drain
Current R
T = 25°C
A
I
D
2
1
3
q
JA
T = 100°C
A
(Notes 1, 2)
Steady
State
DPAK
CASE 369C
1
Gate
3
Power Dissipation
T = 25°C
A
P
3.1
W
D
Source
R
(Notes 1, 2)
q
JA
2
T = 100°C
A
1.6
Drain
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
382
A
A
p
015N15MCG = Specific Device Code
A
Y
WW
= Assembly Location
= Year
= Work Week
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
J
stg
+175
Source Current (Body Diode)
I
S
89.3
A
Single Pulse Drain−to−Source Avalanche
E
AS
1301
mJ
Energy (I
= 4.4 A)
L(pk)
ORDERING INFORMATION
Lead Temperature for Soldering Purposes
T
260
°C
L
†
Device
NVDS015N15MCT4G
Package
Shipping
(1/8″ from case for 10 s)
DPAK
2500 / Tube
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
(Pb−Free)
2
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
May, 2020 − Rev. 1
NVDS015N15MC/D
NVDS015N15MC
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.4
Unit
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Notes 1, 2)
R
°C/W
q
JC
R
47.9
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
150
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
I
D
= 250 mA, ref to 25°C
83
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25°C
1.0
100
4.5
15
DSS
GS
J
V
= 120 V
mA
T = 125°C
J
1.1
Gate−to−Source Leakage Current
ON CHARACTERISTICS
I
V
= 0 V, V
=
20 V
nA
GSS
DS
GS
Gate Threshold Voltage
V
V
= V , I = 162 mA
2.5
V
mV/°C
mW
S
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
V
/T
J
I = 162 mA, ref to 25°C
D
−8.2
11.8
58
GS(TH)
R
V
= 10 V, I = 29 A
D
DS(on)
GS
DS
g
FS
V
= 10 V, I = 29 A
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
2120
595
10.5
27
ISS
Output Capacitance
C
OSS
C
RSS
V
V
= 0 V, f = 1 MHz, V = 75 V
pF
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
7
G(TH)
nC
V
Q
11
= 10 V, V = 75 V; I = 29 A
GS
GD
GP
GS
DS
D
Q
V
4
5.5
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
t
16
5
d(ON)
Rise Time
t
r
V
= 10 V, V = 75 V,
DD
GS
D
ns
I
= 29 A, R = 6 W
G
Turn−Off Delay Time
t
21
4
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
V
V
GS
= 0 V, I = 29 A
T = 25°C
0.89
49
1.2
V
SD
S
J
t
ns
nC
ns
nC
RR
V
S
= 0 V, V = 75 V
DD
GS
dI /dt = 300 A/ms, I = 29 A
S
Q
197
34
RR
RR
t
RR
V
S
= 0 V, V = 75 V
DD
GS
dI /dt = 1000 A/ms, I = 29 A
S
Q
345
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching characteristics are independent of operating junction temperatures.
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2
NVDS015N15MC
TYPICAL CHARACTERISTICS
120
90
120
10 V
7.0 V
8.0 V
V
DS
= 10 V
90
60
6.0 V
60
V
GS
= 5.5 V
T = 25°C
J
30
0
30
0
T = 175°C
T = −55°C
J
J
0
1
2
3
4
5
6
7
8
9
10
2
3
4
5
6
7
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
60
45
30
16
14
I
= 29 A
D
V
GS
= 10 V
T = 150°C
J
12
10
15
0
T = 25°C
J
4
5
6
7
8
9
10
0
30
60
I , DRAIN CURRENT (A)
90
120
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1E−04
1E−05
1E−06
1E−07
1E−08
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
T = 175°C
I
V
= 29 A
J
D
= 10 V
GS
T = 150°C
J
T = 125°C
J
T = 100°C
J
T = 85°C
J
T = 55°C
J
1E−09
1E−10
T = 25°C
0.8
0.6
J
−75 −50 −25
0
25 50 75 100 125 150 175
10
30
V
50
70
90
110
130 150
T , JUNCTION TEMPERATURE (°C)
J
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. Normalized On−Resistance vs.
Figure 6. Drain−to−Source Leakage Current
Junction Temperature
vs. Voltage
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3
NVDS015N15MC
TYPICAL CHARACTERISTICS
10
10K
1K
V
DD
= 25 V
I
D
= 29 A
C
ISS
V
DD
= 75 V
8
6
4
V
DD
= 50 V
C
OSS
100
C
RSS
10
1
2
0
f = 1 MHz
= 0 V
V
GS
0.1
1
10
100 150
0
6
12
18
24
30
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 8. Gate Charge Characteristics
Figure 7. Capacitance vs. Drain−to−Source
Voltage
100
200
100
V
GS
= 0 V
10
1
t
d(off)
t
d(on)
10
0.1
t
r
T = 175°C
J
V
V
I
= 10 V
= 75 V
= 29 A
0.01
GS
t
f
DS
T = 25°C
T = −55°C
J
J
D
0.001
1
0
0.2
0.4
0.6
0.8
1.0
1.2
0
10
20
30
40
50
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
R , GATE RESISTANCE (W)
G
Figure 10. Source−to−Drain Diode Forward
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Voltage vs. Source Current
1000
100
10
100
T
= 25°C
J(initial)
10 ms
10
T
C
= 25°C
Single Pulse
≤ 10 V
T
= 100°C
J(initial)
V
GS
1
0.5 ms
1 ms
10 ms
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
0.1
1
10
100
1000
0.00001
0.0001
0.001
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Unclamped Inductive Switching
Capability
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4
NVDS015N15MC
TYPICAL CHARACTERISTICS
100
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Transient Thermal Impedance
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
4
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE G
2
1
DATE 31 MAY 2023
3
SCALE 1:1
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
XXXXXX = Device Code
A
= Assembly Location
L
= Wafer Lot
STYLE 1:
STYLE 2:
PIN 1. GATE
2. DRAIN
STYLE 3:
STYLE 4:
STYLE 5:
Y
WW
G
= Year
= Work Week
= Pb−Free Package
PIN 1. BASE
PIN 1. ANODE
2. CATHODE
3. ANODE
PIN 1. CATHODE
2. ANODE
3. GATE
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
2. COLLECTOR
3. EMITTER
3. SOURCE
4. DRAIN
4. COLLECTOR
4. CATHODE
4. ANODE
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 6:
PIN 1. MT1
2. MT2
STYLE 7:
PIN 1. GATE
STYLE 8:
PIN 1. N/C
STYLE 9:
PIN 1. ANODE
2. CATHODE
STYLE 10:
PIN 1. CATHODE
2. ANODE
2. COLLECTOR
2. CATHODE
3. GATE
4. MT2
3. EMITTER
4. COLLECTOR
3. ANODE
4. CATHODE
3. RESISTOR ADJUST
4. CATHODE
3. CATHODE
4. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
PAGE 1 OF 1
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