NVMFD6H840NLWFT1G [ONSEMI]
Dual N-Channel Power MOSFET 80 V, 74 A, 6.9 mΩ;
| 型号： | NVMFD6H840NLWFT1G |
| 厂家： | 
ONSEMI |
| 描述： | Dual N-Channel Power MOSFET 80 V, 74 A, 6.9 mΩ |
| 文件： | 总8页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
NVMFD6H840NL
Power MOSFET
80 V, 6.9 mW, 74 A, Dual N−Channel
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
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G
• NVMFD6H840NLWF − Wettable Flank Option for Enhanced
Optical Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
6.9 mꢂ @ 10 V
8.8 mꢂ @ 4.5 V
80 V
74 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
Dual N−Channel
V
DSS
D1
D2
Gate−to−Source Voltage
V
GS
20
V
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
74
A
C
D
ꢀ
JC
T
C
52
(Notes 1, 2, 3)
Steady
State
G1
G2
Power Dissipation
T
C
P
90
W
A
D
R
(Notes 1, 2)
ꢀ
JC
T
C
= 100°C
45
S1
S2
Continuous Drain
Current R
T = 25°C
A
I
D
14
ꢀ
JA
T = 100°C
A
10
(Notes 1, 2, 3)
Steady
State
MARKING
DIAGRAM
Power Dissipation
T = 25°C
A
P
3.1
1.5
336
W
D
R
(Notes 1, 2)
ꢀ
JA
T = 100°C
A
D1 D1
S1
G1
S2
G2
D1
Pulsed Drain Current
T = 25°C, t = 10 ꢁ s
I
DM
A
A
p
1
D1
D2
D2
XXXXXX
AYWZZ
DFN8 5x6
(SO8FL)
CASE 506BT
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
J
stg
+175
Source Current (Body Diode)
I
S
75
A
D2 D2
Single Pulse Drain−to−Source Avalanche
E
AS
297
mJ
A
Y
= Assembly Location
= Year
Energy (T = 25°C, I
= 4.7 A)
J
L(pk)
W
ZZ
= Work Week
= Lot Traceability
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.67
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
ꢀ
JC
R
48.7
ꢀ
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
April, 2019 − Rev. 0
NVMFD6H840NL/D
NVMFD6H840NL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 ꢁ A
80
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
45.9
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25 °C
10
DSS
GS
DS
J
V
= 80 V
ꢁ
A
T = 125°C
J
250
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 96 ꢁ A
1.2
2.0
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
−4.9
5.7
7.0
99
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 20 A
= 20 A
6.9
8.8
DS(on)
GS
D
mꢂ
V
GS
= 4.5 V
D
Forward Transconductance
g
FS
V
= 5 V, I = 20 A
S
DS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
2002
249
11
ISS
Output Capacitance
C
OSS
C
RSS
V
= 0 V, f = 1 MHz, V = 40 V
pF
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
Q
V
GS
= 10 V, V = 40 V; I = 20 A
32
G(TOT)
G(TOT)
DS
D
Total Gate Charge
15
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
3.0
5.1
5.3
2.8
nC
V
G(TH)
Q
V
GS
= 4.5 V, V = 40 V; I = 20 A
GS
GD
GP
DS
D
Q
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
15
34
52
22
d(ON)
Rise Time
t
r
V
= 4.5 V, V = 64 V,
DS
GS
D
ns
V
I
= 20 A, R = 2.5 ꢂ
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.8
0.7
45
24
22
50
1.2
SD
J
V
S
= 0 V,
GS
I
= 20 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
ns
a
V
= 0 V, dIS/dt = 100 A/ꢁ s,
GS
I
S
= 20 A
Discharge Time
t
b
Reverse Recovery Charge
Q
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ꢁ s, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
2
NVMFD6H840NL
TYPICAL CHARACTERISTICS
80
70
80
3.2 V
10 to 3.4 V
3.0 V
70
60
50
40
30
20
V
DS
= 10 V
60
50
40
30
20
2.8 V
2.6 V
T = 25°C
J
V
GS
= 2.4 V
7
10
0
10
0
T = 125°C
J
T = −55°C
J
0
1
2
3
4
5
6
8
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5 4.0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
8
7
6
10
8
T = 25°C
J
I
= 20 A
D
T = 25°C
J
V
= 4.5 V
= 10 V
GS
6
V
GS
5
4
4
2
3
4
5
6
7
8
9
10
10
20
30
40
50
60
70
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
2.5
2.0
1.5
1000
100
10
I
V
= 20 A
D
T = 175°C
J
= 10 V
GS
T = 150°C
J
T = 125°C
J
T = 85°C
J
1
0.1
T = 25°C
J
1.0
0.5
0.01
0.001
−50 −25
0
25
50
75 100 125 150 175
5
15
V
25
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
35
45
55
65
75
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NVMFD6H840NL
TYPICAL CHARACTERISTICS
10
10K
1K
V
DS
= 40 V
9
8
7
6
5
4
3
2
C
iss
I
D
= 20 A
T = 25°C
J
C
oss
100
Q
Q
GS
GD
C
rss
10
1
T = 25°C
GS
f = 1 MHz
J
V
= 0 V
1
0
0
10
20
30
40
50
60
70
80
0
5
10
15
20
25
30
Q , TOTAL GATE CHARGE (nC)
G
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1000
100
V
V
I
= 4.5 V
= 64 V
= 20 A
V
GS
= 0 V
GS
DS
t
d(off)
D
10
t
t
f
r
t
d(on)
10
1
T = 125°C
T = 25°C
T = −55°C
J
J
J
1
1
10
R , GATE RESISTANCE (ꢂ)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
100
T
= 25°C
J(initial)
10
10
T
V
= 25°C
C
≤ 10 V
GS
Single Pulse
10 ꢁ s
T
= 100°C
J(initial)
0.5 ms
1 ms
10 ms
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
0.1
1
10
100
1000
0.00001
0.0001
T , TIME IN AVALANCHE (s)
AV
0.001
0.01
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVMFD6H840NL
TYPICAL CHARACTERISTICS
100
10
1
50% Duty Cycle
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVMFD6H840NLT1G
6H840L
DFN8
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVMFD6H840NLWFT1G
840LWF
DFN8
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE E
1
DATE 26 FEB 2013
SCALE 2:1
2X
NOTES:
0.20
C
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
A
B
E
2X
D1
0.20
C
8
7
6
5
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
PIN ONE
IDENTIFIER
E1
4X
h
MILLIMETERS
GENERIC
MARKING DIAGRAM*
DIM
A
A1
b
b1
c
D
D1
D2
D3
E
E1
E2
e
G
h
K
K1
L
M
N
MIN
0.90
−−−
0.33
0.33
0.20
MAX
−−−
−−−
0.42
0.42
MAX
1.10
0.05
0.51
0.51
0.33
NOTE 7
c
A1
1
1
2
3
4
XXXXXX
AYWZZ
−−−
TOP VIEW
5.15 BSC
4.90
4.10
1.70
4.70
3.90
1.50
5.10
4.30
1.90
0.10
0.10
C
C
DETAIL A
A
6.15 BSC
5.90
4.15
XXXXXX= Specific Device Code
5.70
3.90
6.10
4.40
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
SEATING
PLANE
NOTE 6
C
NOTE 4
SIDE VIEW
1.27 BSC
0.55
DETAIL A
0.45
−−−
0.65
−−−
12
−−−
−−−
_
D2
D3
0.51
0.56
0.48
3.25
1.80
−−−
−−−
0.61
3.50
*This information is generic. Please refer
to device data sheet for actual part
marking.
0.71
3.75
2.20
4X L
K
e
2.00
1
4
DETAIL B
ALTERNATE
DETAIL B
CONSTRUCTION
4X
b1
N
SOLDERING FOOTPRINT*
E2
M
4.56
2X
2.08
2X
0.56
8X
0.75
8
5
4X
G
b
8X
0.10
0.05
C
C
A B
K1
NOTE 3
BOTTOM VIEW
4X
1.40
6.59
4.84
2.30
3.70
0.70
4X
1.27
PITCH
1.00
5.55
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON50417E
DFN8 5X6, 1.27P DUAL FLAG (SO8FL−DUAL)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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