NVTFWS010N10MCLTAG [ONSEMI]
单 N 沟道功率 MOSFET 100V,53A,10.3mΩ;型号: | NVTFWS010N10MCLTAG |
厂家: | ONSEMI |
描述: | 单 N 沟道功率 MOSFET 100V,53A,10.3mΩ 开关 脉冲 光电二极管 晶体管 |
文件: | 总8页 (文件大小:373K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
10.6 mW @ 10 V
15.9 mW @ 4.5 V
100 V
57.8 A
100 V, 10.6 mW, 57.8 A
N−Channel
D (5 − 8)
NVTFS010N10MCL
Features
Small Footprint (3.3 x 3.3 mm) for Compact Design
G (4)
Low R
to Minimize Conduction Losses
DS(on)
Low Capacitance to Minimize Driver Losses
NVTFWS010N10MCLTAG − Wettable Flanks Product
AEC−Q101 Qualified and PPAP Capable
S (1, 2, 3)
These Devices are Pb−Free and are RoHS Compliant
8 7 6 5
D D D D
MAXIMUM RATINGS (T = 25C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
100
20
57.8
40.8
77.8
38.9
11.7
8.3
Unit
V
Pin 1
1 2 3 4
Top
G S S S
Bottom
V
DSS
Pin 1
Gate−to−Source Voltage
V
GS
V
WDFN8
Continuous Drain
Current R
T
= 25C
= 100C
= 25C
I
D
A
C
(3.3x3.3, 0.65 P)
CASE 511DY
q
JC
T
C
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T
C
P
W
A
D
D
R
(Notes 1, 2)
q
JC
T
C
= 100C
Continuous Drain
Current R
T = 25C
A
I
D
q
JA
WDFNW8
T = 100C
A
(Notes 1, 2, 3)
Steady
State
(Full−Cut m8FL Fused WF)
Power Dissipation
T = 25C
A
P
3.2
W
CASE 515AP
R
(Notes 1, 2)
q
JA
T = 100C
A
1.6
MARKING DIAGRAM
Pulsed Drain Current
Source Current
T
C
= 25C, t = 10 ms
I
DM
232
64.8
A
A
p
I
S
N10x
AYWW
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
C
J
stg
Single Pulse Drain−to−Source Avalanche
E
526
260
mJ
AS
Energy (I
= 2.9 A)
L(pk)
N10x = Specific Device Code
x = L or W
Lead Temperature for Soldering Purposes
(1/8 from case for 10 s)
T
C
L
A
Y
= Assembly Location
= Year Code
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
WW = Work Week Code
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
Parameter
Symbol
Value
1.93
Unit
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Note 2)
R
C/W
q
JC
R
46.6
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
September, 2022 − Rev. 1
NVTFS010N10MCL/D
NVTFS010N10MCL
ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
100
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
64
(BR)DSS
mV/C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25C
1.0
250
100
DSS
GS
DS
J
V
= 80 V
mA
T = 125C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 85 mA
1.0
1.5
−5.3
9.1
3.0
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
mV/C
GS(TH)
R
V
GS
= 10 V
I
I
= 15 A
= 12 A
10.6
15.9
DS(on)
D
mW
V
GS
= 4.5 V
13.5
54
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
DS
=5 V, I = 15 A
S
D
C
1530
625
10
2150
875
18
ISS
Output Capacitance
C
C
V
= 0 V, f = 1 MHz, V = 50 V
pF
OSS
RSS
GS
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
V
= 4.5 V, V = 50 V; I = 15 A
10
G(TOT)
G(TOT)
GS
DS
D
nC
nC
Total Gate Charge
Q
V
= 10 V, V = 50 V; I = 15 A
22
30
GS
DS
D
Gate−to−Source Charge
Gate−to−Drain Charge
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Q
Q
4.0
3.0
GS
V
= 10 V, V = 50 V; I = 15 A
GS
DS
D
GD
t
9.0
3.0
28
d(ON)
Rise Time
t
r
V
= 10 V, V = 50 V,
DS
= 15 A, R = 6 W
GS
D
ns
I
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
5.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
V
V
= 0 V, I = 15 A
0.8
22
35
17
79
1.3
36
V
SD
GS
S
t
ns
nC
ns
nC
RR
I = 8 A, di/dt = 300 A/ms
F
Q
56
RR
RR
t
30
I = 8 A, di/dt = 1000 A/ms
F
Q
126
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVTFS010N10MCL
TYPICAL CHARACTERISTICS (T = 25C UNLESS OTHERWISE NOTED)
J
80
150
120
90
60
30
0
VGS = 10 V
VGS = 8 V
VDS = 5 V
V
GS = 6 V
60
40
20
0
V
GS = 4.5 V
VGS = 3.5 V
TJ = 150 o
C
TJ = 25 o
C
VGS = 3 V
TJ = −55oC
1
2
3
4
5
6
0
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
V
DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. Transfer Characteristics
80
60
40
20
0
40
ID = 15 A
30
20
10
0
VGS = 4.5 V
VGS = 10 V
TJ = 25 o
C
2
3
4
5
6
7
8
9
10
0
30
60
90
120
150
V
GS, GATE TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance
Figure 4. On−Resistance vs. Drain
vs. Gate to Source Voltage
Current and Gate Voltage
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
1.0E−01
1.0E−02
TJ = 175 o
C
ID = 15 A
VGS = 10 V
TJ = 150 o
C
C
TJ = 125 o
1.0E−03
1.0E−04
1.0E−05
1.0E−06
1.0E−07
1.0E−08
TJ = 85 o
C
TJ = 25 o
C
−75 −50 −25
0
25 50 75 100 125 150 175
10
20
30
40
50
60
70
80
TJ, JUNCTION TEMPERATUREo(C)
V
DS , DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. Normalized On Resistance
vs. Junction Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVTFS010N10MCL
TYPICAL CHARACTERISTICS (T = 25C UNLESS OTHERWISE NOTED)
J
10000
1000
100
10
10
Q
TOT
Ciss
8
6
4
2
0
Coss
Q
Q
GS
GD
Crss
VDS = 50 V
ID = 15 A
f = 1 MHz
GS = 0 V
V
1
0.1
1
10
100
0
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Capacitance vs. Drain
to Source Voltage
Figure 8. Gate Charge
Characteristics
150
100
200
100
Td(off)
Tf
ID = 15 A
VGS = 0 V
VGS = 10 V
VDS = 50 V
10
1
Tr
TJ = 150 o
C
10
1
Td(on)
TJ = 25 o
C
0.1
0.01
0.001
TJ = −55oC
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0
5
10 15 20 25 30 35 40 45 50
RG , GATE RESISTANCE (
VSD, BODY DIODE FORWARD VOLTAGE (V)
W
)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Source to Drain Diode
Forward Voltage vs. Source Current
300
100
100
10
1
10 ms
TJ (initial)= 25 oC
10
THIS AREA IS
LIMITED BY r DS(on)
100 ms
TJ (initial)= 100oC
1
1 ms
CURVE BENT TO
MEASURED DATA
10 ms
100 ms/DC
0.1
0.1
0.00001
0.1
1
10
100
300
0.0001
0.001
0.01
tAV, TIME IN AVALANCHE (s)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Unclamped Inductive
Switching Capability
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4
NVTFS010N10MCL
TYPICAL CHARACTERISTICS (CONTINUED)
100
10
D = 0.5
0.2
0.1
0.05
0.02
0.01
1
0.1
0.01
SINGLE PULSE
10−5
10−6
10−4
10−3
10−2
10−1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
DEVICE ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NVTFS010N10MCLTAG
N10L
WDFN8
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVTFWS010N10MCLTAG
N10W
WDFNW8
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511DY
ISSUE A
DATE 21 AUG 2018
GENERIC
MARKING DIAGRAM*
XXXX
AYWW
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year Code
WW = Work Week Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON90827G
WDFN8 3.3x3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL Fused WF)
CASE 515AP
ISSUE O
DATE 25 AUG 2020
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
*This information is generic. Please refer to
A
Y
= Assembly Location
= Year
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX
AYWWG
G
WW = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON24557H
WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL Fused WF)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
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