P1708C [ONSEMI]
Notebook LCD Panel EMI Reduction IC; 笔记本电脑液晶面板降低EMI IC
| 型号： | P1708C |
| 厂家： | 
ONSEMI |
| 描述： | Notebook LCD Panel EMI Reduction IC |
| 文件： | 总7页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P1708C
Notebook LCD Panel EMI
Reduction IC
Features
• FCC approved method of EMI attenuation.
Product Description
The P1708C is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1708C reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
down stream clock and data dependent signals. The
P1708C allows significant system cost savings by reducing
the number of circuit board layers, ferrite beads, shielding,
and other passive components that are traditionally
required to pass EMI regulations.
• Generates a low EMI spread spectrum clock of the
input frequency.
• Optimized for frequency range from 50 to 110MHz.
• Internal loop filter minimizes external components and
board space.
• Four selectable spread ranges.
• Low inherent cycle-to-cycle jitter.
• 3.3V operating voltage range.
• TTL or CMOS compatible inputs and outputs.
• CMOS design.
The P1708C modulates the output of a single PLL in order
to “spread” the bandwidth of a synthesized clock, and more
importantly, decreases the peak amplitudes of its
harmonics. This result in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
o 8.46mA @ 3.3V, 54MHz
o 9.79mA @ 3.3V, 65MHz
o 12.06mA @ 3.3V, 81MHz
o 16.51mA @ 3.3V, 108MHz
• Supports notebook VGA and other LCD timing
controller applications.
The P1708C uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
• Pinout compatible to ICS MK1708 and Cypress
CY25560.
• SSON / SBM pin for Spread Spectrum On/Off and
Standby Mode controls.
Applications
• Available in 8-pin SOIC and TSSOP.
The P1708C is targeted towards notebook LCD displays,
and other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
VDD
SR0
SSON
SR1
Block Diagram
PLL
Modulation
CLKIN
Frequency
Divider
Output
Divider
Phase
Detector
Loop
Filter
VCO
Feedback
Divider
ModOUT
VSS
©2010 SCILLC. All rights reserved.
FEBRUARY 2010 – Rev. 2
Publication Order Number:
P1708/D
P1708C
Pin Configuration
CLKIN
VDD
NC
1
2
3
4
8
7
6
5
SR0
P1708C
VSS
SR1
ModOUT
SSON/SBM
Pin Description
Pin#
Pin Name
Type
Description
Connect to externally generated clock signal. To put the part into standby mode,
disable the input clock signal to this pin and pull SSON / SBM (pin 5) low. Refer to
Standby Mode Selection Table.
1
CLKIN
I
2
3
4
VDD
VSS
P
P
O
Connect to +3.3V.
Ground Connection. Connect to system ground.
Spread spectrum clock output.
ModOUT
Spread Spectrum On/Off and standby mode control. Refer to Standby Mode
Selection Table. This pin has an internal pull-up resistor.
5
6
SSON / SBM
SR1
I
I
Digital logic input used to select Spreading Range. Refer to Spread Spectrum
Selection Table. This pin has an internal pull-up resistor.
Digital logic input used to select Spreading Range. Refer to Spread Spectrum
Selection Table. This pin has an internal pull-up resistor.
7
8
SR0
NC
I
-
No connect.
Standby Mode Selection
Spread
Spectrum
CLKIN
SSON / SBM
ModOUT
PLL
Mode
Disabled
Disabled
Enabled
Enabled
0
1
0
1
N/A
Disabled
Disabled
Reference
Normal
Disabled
Free Running
Disabled
Standby
Free Running
Buffer out
Normal
N/A
Off
On
Normal
Rev. 2 | Page 2 of 7 | www.onsemi.com
P1708C
Spread Range Selection
SR1
SR0
Spreading Range
±1.00%
Modulation Rate
0
0
1
1
0
1
0
1
(FIN/40) * 62.49KHz
(FIN/40) * 62.49KHz
(FIN/40) * 62.49KHz
(FIN/40) * 62.49KHz
±2.00%
±0.25%
±0.75%
Schematic for Notebook VGA Application
P1708C
50MHz to 110MHz pixel clock input
from VGA chip.
Pin 8 can be tied either high or low,
or it can be left unconnected.
NC
8
7
6
5
1
2
3
4
CLKIN
0.1µF
FB
VDD
VSS
Tie SR0 and SR1 high / low
according to spread range desired.
External resistors are not needed to
pull these pins high.
SR0
SR1
VDD
Pin 5 SSON should be left unconnected to turn on
spread spectrum. Pull this pin low to turn spread
spectrum OFF and enable stand-by mode.
ModOUT
SSON
50MHz to 110MHz Pixel Clock
Input from VGA Chip.
Note: To set the P1708C to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low. Refer to Standby Mode
Selection Table.
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
Parameter
Voltage on any pin with respect to Ground
Storage temperature
Rating
-0.5 to +7.0
-65 to +125
260
Unit
V
°C
Ts
Max. Soldering Temperature (10 sec)
Junction Temperature
°C
TJ
150
°C
TDV
2
KV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
Description
Min
2.7
Max
3.7
+85
15
Unit
V
VDD
TA
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance
-40
°C
CL
pF
pF
CIN
Input Capacitance
7
Rev. 2 | Page 3 of 7 | www.onsemi.com
P1708C
DC Electrical Characteristics
Symbol
Parameter
Min
GND-0.3
2.0
Typ
Max
Unit
V
VIL
VIH
IIL
Input low voltage
Input high voltage
0.8
VDD+0.3
-35
V
Input low current (pull-up resistors on inputs SR0, SR1 and
SSON/SBM)
µA
IIH
Input high current
35
µA
mA
mA
V
IXOL
IXOH
VOL
VOH
ICC
XOUT output low current @ 0.4V, VDD = 3.3V
XOUT output high current @ 2.5V, VDD = 3.3V
Output low voltage VDD = 3.3V, IOL = 20mA
Output high voltage VDD = 3.3V, IOH = 20mA
3
3
0.4
2.5
V
Dynamic supply current normal mode
3.3V and 10pF loading
17.53
fIN -max
7.90
9.79
mA
IDD
VDD
tON
Static supply current standby mode
Operating voltage
0.6
3.3
mA
V
2.7
3.7
Power up time (first locked clock cycle after power up)
Clock output impedance
0.18
50
mS
ꢀ
ZOUT
AC Electrical Characteristics
Symbol
Parameter
Min
50
Typ
Max
Unit
fIN
Input frequency
Output frequency
110
110
MHz
MHz
fOUT
50
Output rise time
Measured at 0.8V to 2.0V
1
tLH
0.7
0.6
0.9
0.8
1.1
1.0
ns
ns
Output fall time
Measured at 0.8V to 2.0V
1
tH
tJC
tD
Jitter (cycle-to-cycle)
360
55
ps
%
Output duty cycle
45
50
Note: 1. tLH and tHL are measured into a capacitive load of 15pF.
Rev. 2 | Page 4 of 7 | www.onsemi.com
P1708C
Package Information
8-Pin SOIC Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
0.010
0.069
0.059
0.020
0.010
Min
0.10
1.35
1.25
0.31
0.18
Max
0.25
1.75
1.50
0.51
0.25
A1
A
0.004
0.053
0.049
0.012
0.007
A2
B
C
D
E
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
e
H
L
0.016
0°
0.050
8°
0.41
0°
1.27
8°
θ
Note: Controlling dimensions are millimeters.
SOIC: 0.074 grams unit weight.
Rev. 2 | Page 5 of 7 | www.onsemi.com
P1708C
8-Pin TSSOP
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
A1
A2
B
0.043
0.006
0.037
0.012
0.008
0.122
0.177
1.10
0.002
0.033
0.008
0.004
0.114
0.169
0.05
0.85
0.19
0.09
2.90
4.30
0.15
0.95
0.30
0.20
3.10
4.50
C
D
E
e
0.026 BSC
0.252 BSC
0.65 BSC
6.40 BSC
H
L
0.020
0°
0.028
8°
0.50
0°
0.70
8°
θ
Rev. 2 | Page 6 of 7 | www.onsemi.com
P1708C
Ordering Codes
Part number
Marking
AAY
Package Type
Temperature
P1708CF-08SR
P1708CF-08TR
8-Pin SOIC, Tape and Reel, Pb Free
8-Pin TSSOP, Tape and Reel, Pb Free
0°C to +70°C
0°C to +70°C
AAY
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free
Licensed under US Patent #5,488,627 and #5,631,921
Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003.
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