PACUSB-D2Y5R [ONSEMI]
USB Downstream Port Terminator; USB下行端口终结者
| 型号： | PACUSB-D2Y5R |
| 厂家： | 
ONSEMI |
| 描述： | USB Downstream Port Terminator |
| 文件： | 总10页 (文件大小：239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
USB Downstream Port Terminator
PACUSB-D1/D2/D3
Features
Product Description
•
A low-capacitance USB downstream port
terminator, EMI filter, and transient over-voltage
The PACUSB-D1/D2/D3 is a single-channel USB
downstream-port termination network. It integrates
EMI/RFI filter components R1 and C1, as
recommended by the USB specification as well as
the required 15kW pull-down resistors (R2) to GND.
In addition, PACUSB-D1/D2/D3 provides a very high
level of protection for sensitive electronic components
that may be subjected to electrostatic discharge
(ESD). The device pins will safely dissipate ESD
strikes of +15kV, exceeding the maximum
requirements of the IEC 61000-4-2 international
standard. Using the MIL-STD-883D (Method 3015)
specification for Human Body Model (HBM) ESD, all
pins are protected from contact discharges to +20kV.
(ESD) protector in a single surface-mounted
package
ESD protection to +20kV contact discharge, per
MIL-STD-883D, Method 3015
ESD protection to +15kV contact discharge, per
IEC 61000-4-2 International Standard
Compact SOT23-5 and SC70-5 package options
save board space and lower manufacturing costs
compared to discrete solutions
Capacitors matched to a precision exceeding the
USB specification
Pin-compatible with ST Microelectronics
USBDFxxW5 USB Downstream Port Terminator
Lead-free versions available
•
•
•
•
•
•
There are three options for the value of the series
Applications
resistor R1: 15Ω, 22Ω, and 33Ω.
This series
resistance, plus the USB driver output resistance,
must be close to the USB cable’s characteristic
impedance of 45Ω (each side) to minimize
transmission line reflections.
•
ESD protection and termination of USB
downstream ports
Desktop PCs
•
•
•
•
Notebooks
Set-top boxes
USB hubs
The PACUSB-D1/D2/D3 is manufactured in a 5-pin
SC70 or a 5-pin SOT23 package and is available with
optional lead-free finishing..
©2010 SCILLC. All rights reserved.
June 2010 – Rev. 2
Publication Order Number:
PACUSB-D1/D2/D3/D
PACUSB-D1/D2/D3
Electrical•Schematic
PIN DESCRIPTIONS
PINS
NAME
DESCRIPTION
1
D+ CNTR
D+ Data to the USB controller circuitry
2
3
4
5
GND
Ground Pin
D- CNTR
D- CONN
D+ CONN
D- Data to the USB controller circuitry
D- Data to the USB connector
D+ Data to the USB connector
Rev. 2 | Page 2 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Lead-free Finish
Ordering Part
Number1
Ordering Part
Number1
Pins
R1 Value
15 Ω
Package
Part Marking
Part Marking
5
SOT23-5
PACUSB-D2Y5
PACUSB-D3Y5
PACUSB-D1Y5
PACUSB-D2YB5
PACUSB-D3YB5
PACUSB-D1YB5
UDF2
PACUSB-D2Y5R
PACUSB-D3Y5R
PACUSB-D1Y5R
PACUSB-D2YB5R
PACUSB-D3YB5R
PACUSB-D1YB5R
DF2R
22 Ω
UDF3
UDF1
DF2
DF3R
DF1R
F2R
33 Ω
5
15 Ω
SC70-5
22 Ω
DF3
F3R
33 Ω
DF1
F1R
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
Storage Temperature Range
-65 to +150
°C
mW
mW
V
Power Dissipation per Resistor
Package Power Dissipation
Voltage on any pin (DC)
100
200
6
STANDARD OPERATING CONDITIONS
PARAMETER
RATING
UNITS
Operating Temperature
-40 to +85
°C
Rev. 2 | Page 3 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
R1
R1
R1
Resistance of R1 Resistor
(PACUSB-D2Y5/Y5R, -D2YB5/YB5R)
TA = 25°C
12
15
18
Ω
Resistance of R1 Resistor
(PACUSB-D3Y5/Y5R, -D3YB5/YB5R)
TA = 25°C
TA = 25°C
17.6
26.4
22
33
26.4
39.6
Ω
Resistance of R1 Resistor
Ω
(PACUSB-D1Y5/Y5R, -D1YB5/YB5R)
R2
Resistance of R2 Resistor
TA = 25°C
Note 1
15
kΩ
TCR
Temperature Coefficient of
Resistance
+1300
ppm/°
C
C1
Capacitance of C1 Capacitor
0 VDC; 30 mVAC; 1MHz; 25°C
2.5 VDC; 30 mVAC; 1MHz; 25°C
37.6
25.6
47
32
56.4
38.4
+2
pF
pF
%
TOLCM
ILEAK
Matching Tolerance of C1 Capacitors 1MHz; 25°C
Diode Leakage Current to GND
Diode Reverse Bias Voltage
Signal Voltage:
Measured at 3.3 VDC, 25°C
1
100
nA
V
VRB
ILOAD = 10μA; TA = 25°C
5.5
VSIG
ILOAD = 10mA; TA = 25°C
ILOAD = 10mA; TA = 25°C
Positive Clamp
Negative Clamp
5.6
-0.4
6.8
-0.8
9.0
-1.5
V
V
VESD
In-system ESD Withstand Voltage
MIL-STD-883D, Method 3015
(HBM)
+4
+20
kV
kV
Pins 1, 3; Notes 2 and 3
Pins 4, 5; Note 2
IEC 61000-4-2 Contact Discharge
+15
kV
Pins 4, 5; Notes 2
VCL
Clamping voltage under ESD
discharge
MIL-STD-883D, Method 3015
+8kV; Note 4
12
-7
V
MIL-STD-883D, Method 3015 -
8kV; Note 4
V
Note 1: Electrical operating characteristics guaranteed over standard operating conditions unless specified otherwise.
Note 2: ESD voltage applied to pins with respect to GND, one at a time; unused pins are left open.
Note 3: Pins 1 and 3 are not connected to the USB port connector, and therefore are not exposed to external ESD hazards.
Thus, they do not require the high ESD protection levels provided for pins 4 and 5.
Note 4: ESD Clamping Voltage is measured at the opposite end of R1 from the pin to which the ESD discharge is applied (e.g., if
ESD is applied to pin 6, then the clamping voltage is measured at pin 1).
Rev. 2 | Page 4 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Performance Information
Capacitance vs. Voltage
The C1 capacitance value as a function of DC voltage across it is presented in Figure 1. The curve is
normalized to a capacitance of 1.0 capacitance units at 2.5 VDC.
Figure 1. Diode Capacitance vs. DC Voltage (Normalized)
Insertion Loss vs. Frequency Characteristics
Figure 2. Insertion Loss vs. Frequency Performance Curve, PACUSB-D1(SOT23-6)
Rev. 2 | Page 5 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Performance Information (cont’d)
Figure 3. Insertion Loss vs. Frequency Performance Curve, PACUSB-D2(SOT23-
6)
Figure 4. Insertion Loss vs. Frequency Performance Curve, PACUSB-D3(SOT23-6)
Rev. 2 | Page 6 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Application Information
The PACUSB-D1/D2/D3 provides a complete interface for a single downstream USB port typically found in
computers and USB hubs. It integrates the series resistors (R1) and the 15kΩ pull-down resistors (R2) for both
USB data lines (D+ and D-) as well as the capacitors to ground for EMI suppression. Zener diodes provide ESD
protection up to 15kV contact discharge per the IEC 61000-4-2 standard and protect the USB controller on both
data lines.
The PACUSB-D1/D2/D3 should be placed on the PCB between the USB controller and the USB connector, as
shown on the Connection Diagram, Figure 5.
Figure 5. Connection Diagram for PACUSB-D1/D2/D3 Devices
To guarantee the best ESD and filtering performance, it is recommended to physically locate the PACUSB-
D1/D2/D3 close to the USB connector. Also, the trace lengths between the PACUSB-D1/D2/D3 and the USB
controller should be kept as short as possible.
Rev. 2 | Page 7 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Mechanical Details
PACUSB-D1/D2/D3 devices are packaged in SOT23-5 and SC70-5 packages.
SOT23-5 Mechanical Specifications:
Dimensions for PACUSB-D1/D2/D3 devices packaged in a 5-pin SOT23 package are presented below.
For complete information on the SOT23-5 package, see the California Micro Devices SOT23 Package
Information document.
PACKAGE DIMENSIONS
TOP VIEW
SOT23-5 (JEDEC name is MO-178)
5
Package
Pins
e1
e
Millimeters
Inches
Max
Dimensions
5
1
4
3
Min
Max
Min
E1
E
2
--
1.45
--
0.057
0.006
0.020
0.009
0.120
0.118
0.069
A
A1
b
0.00
0.30
0.08
2.75
2.60
1.45
0.15
0.50
0.22
3.05
3.00
1.75
0.000
0.012
0.003
0.108
0.102
0.057
b
SIDE VIEW
c
D
D
E
A
E1
e
0.95 BSC
1.90 BSC
0.30 0.60
0.60 REF
3000 pieces*
0.0374 BSC
0.0748 BSC
0.0236 0.024
0.024 REF
A1
END VIEW
e1
L
c
L1
# per tape
and reel
L1
L
Controlling dimension: millimeters
* This is an approximate amount which may vary.
Package Dimensions for SOT23-5.
Rev. 2 | Page 8 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
Mechanical Details (continued)
SC70-5 Mechanical Specifications:
Dimensions for PACUSB-D1/D2/D3 devices packaged in a 5-pin SC70 package are presented below.
For complete information on the SC70-5 package, see the California Micro Devices SC70 Package Information
document.
PACKAGE DIMENSIONS
TOP VIEW
SC70-5
e
e
Package
Pins
(JEDEC name is MO-203 Issue A)
5
5
1
4
3
E
HE
Millimeters
Dimensions
2
Min
Max
0.80
1.10
A
B
0.00
0.70
0.15
0.08
1.85
1.15
0.10
1.00
0.30
0.25
2.25
1.35
A1
SIDE VIEW
A2
D
B
c
A2
A1
A
D
E
0.65 BSC
e
END VIEW
2.00
0.26
2.40
0.46
HE
L
c
1000 pieces*
3000 pieces*
# / bag
L
# / tape and reel
Package Dimensions for SC70-5.
* This is an approximate amount which may vary.
Rev. 2 | Page 9 of 10 | www.onsemi.com
PACUSB-D1/D2/D3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising
out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical”
parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the
rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or
use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action
Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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Rev. 2 | Page 10 of 10 | www.onsemi.com
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