SMUN5114DW1T1G [ONSEMI]
Dual PNP Bias Resistor Transistors R1 = 10 k, R2 = 47 k; 双PNP偏置电阻晶体管R1 = 10千欧， R2 = 47 K·
| 型号： | SMUN5114DW1T1G |
| 厂家： | 
ONSEMI |
| 描述： | Dual PNP Bias Resistor Transistors R1 = 10 k, R2 = 47 k |
| 文件： | 总8页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MUN5114DW1,
NSBA114YDXV6,
NSBA114YDP6
Dual PNP Bias Resistor
Transistors
R1 = 10 kW, R2 = 47 kW
http://onsemi.com
PIN CONNECTIONS
(2)
PNP Transistors with Monolithic Bias
Resistor Network
(3)
(1)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
R
1
R
2
Q
1
Q
2
R
2
R
1
(4)
(5)
(6)
Features
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
MARKING DIAGRAMS
• Simplifies Circuit Design
• Reduces Board Space
6
SOT−363
CASE 419B
0D M G
• Reduces Component Count
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
1
1
Compliant
MAXIMUM RATINGS
SOT−563
CASE 463A
(T = 25°C, common for Q1 and Q2, unless otherwise noted)
0D M G
A
G
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Symbol
Max
50
Unit
Vdc
V
CBO
CEO
V
50
Vdc
SOT−963
CASE 527AD
M G
I
C
100
40
mAdc
Vdc
Q
G
V
IN(fwd)
1
Input Reverse Voltage
V
6
Vdc
IN(rev)
0D/Q
M
G
=
=
=
Specific Device Code
Date Code*
Pb−Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
†
Device
Package
Shipping
MUN5114DW1T1G,
SMUN5114DW1T1G
SOT−363
3,000 / Tape & Reel
NSBA114YDXV6T1G
NSBA114YDP6T5G
SOT−563
SOT−963
4,000 / Tape & Reel
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 0
DTA114YD/D
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
MUN5114DW1 (SOT−363) One Junction Heated
Total Device Dissipation
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
187
256
1.5
2.0
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
670
490
°C/W
q
JA
MUN5114DW1 (SOT−363) Both Junction Heated (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
250
385
2.0
3.0
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
493
325
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
R
188
208
q
JL
Junction and Storage Temperature Range
NSBA114YDXV6 (SOT−563) One Junction Heated
Total Device Dissipation
T , T
J
−55 to +150
stg
P
D
T = 25°C
(Note 1)
(Note 1)
357
2.9
mW
mW/°C
A
Derate above 25°C
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
D
(Note 1)
350
NSBA114YDXV6 (SOT−563) Both Junction Heated (Note 3)
Total Device Dissipation
P
T = 25°C
(Note 1)
(Note 1)
500
4.0
mW
mW/°C
A
Derate above 25°C
Thermal Resistance,
Junction to Ambient
R
°C/W
q
JA
(Note 1)
250
Junction and Storage Temperature Range
NSBA114YDP6 (SOT−963) One Junction Heated
Total Device Dissipation
T , T
−55 to +150
°C
J
stg
P
D
T = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
231
269
1.9
2.2
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
R
540
464
°C/W
q
JA
NSBA114YDP6 (SOT−963) Both Junction Heated (Note 3)
Total Device Dissipation
P
D
T = 25°C
(Note 4)
(Note 5)
(Note 4)
(Note 5)
339
408
2.7
3.3
mW
A
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 4)
(Note 5)
R
369
306
°C/W
°C
q
JA
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
2
2
4. FR−4 @ 100 mm , 1 oz. copper traces, still air.
5. FR−4 @ 500 mm , 1 oz. copper traces, still air.
http://onsemi.com
2
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
ELECTRICAL CHARACTERISTICS (T = 25°C, common for Q and Q , unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.2
−
CB
E
Collector−Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector−Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector−Emitter Breakdown Voltage (Note 6)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 6)
h
FE
(I = 5.0 mA, V = 10 V)
80
−
140
−
−
0.25
−
C
CE
Collector−Emitter Saturation Voltage (Note 6)
(I = 10 mA, I = 0.3 mA)
V
Vdc
Vdc
Vdc
Vdc
Vdc
kW
CE(sat)
C
B
Input Voltage (off)
(V = 5.0 V, I = 100 mA)
V
V
i(off)
−
0.7
0.9
−
CE
C
Input Voltage (on)
(V = 0.2 V, I = 1.0 mA)
i(on)
−
−
CE
C
Output Voltage (on)
(V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
−
0.2
CC
B
L
Output Voltage (off)
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
7.0
−
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
10
13
0.17
0.21
0.25
1
2
6. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
400
350
300
250
(1) SOT−363; 1.0 x 1.0 inch Pad
(2) SOT−563; Minimum Pad
2
(3) SOT−963; 100 mm , 1 oz. copper trace
200
(1) (2) (3)
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
http://onsemi.com
3
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
TYPICAL CHARACTERISTICS
MUN5114DW1, NSBA114YDXV6
1
1000
I /I = 10
C
B
V
CE
= 10 V
150°C
−55°C
25°C
25°C
100
150°C
0.1
10
1
−55°C
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
10
9
8
7
6
5
4
3
2
1
0
100
10
f = 10 kHz
= 0 A
T = 25°C
A
−55°C
I
E
1
25°C
0.1
150°C
0.01
V
O
= 5 V
6
0.001
0
10
20
30
40
50
0
1
2
3
4
5
7
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
10
25°C
−55°C
1
150°C
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
http://onsemi.com
4
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
TYPICAL CHARACTERISTICS
NSBA114YDP6
1
1000
I /I = 10
C
B
V
CE
= 10 V
150°C
−55°C
25°C
25°C
100
150°C
0.1
10
1
−55°C
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
7
6
5
4
3
2
1
0
100
10
f = 10 kHz
= 0 A
T = 25°C
A
I
E
−55°C
1
25°C
0.1
0.01
150°C
V
= 5 V
O
0.001
0
10
20
30
40
50
0
1
2
3
4
5
6
7
12 11 10 11
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
10
25°C
−55°C
1
150°C
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
http://onsemi.com
5
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
D
e
MILLIMETERS
DIM MIN NOM MAX
0.80
INCHES
NOM MAX
1.10 0.031 0.037 0.043
0.10 0.000 0.002 0.004
0.008 REF
MIN
A
0.95
0.05
A1 0.00
6
1
5
2
4
3
A3
0.20 REF
0.21
0.14
2.00
1.25
b
C
D
E
e
0.10
0.10
1.80
1.15
0.30 0.004 0.008 0.012
0.25 0.004 0.005 0.010
2.20 0.070 0.078 0.086
1.35 0.045 0.049 0.053
0.026 BSC
H
−E−
E
0.65 BSC
L
0.10
2.00
0.20
2.10
0.30 0.004 0.008 0.012
2.20 0.078 0.082 0.086
H
E
b 6 PL
M
M
E
0.2 (0.008)
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
SC−88/SC70−6/SOT−363
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
D
−X−
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
A
L
6
5
2
4
3
MILLIMETERS
DIM MIN NOM MAX
INCHES
NOM MAX
E
−Y−
MIN
H
E
A
b
C
D
E
e
0.50
0.17
0.08
1.50
1.10
0.55
0.22
0.12
1.60
1.20
0.5 BSC
0.20
0.60 0.020 0.021 0.023
0.27 0.007 0.009 0.011
0.18 0.003 0.005 0.007
1.70 0.059 0.062 0.066
1.30 0.043 0.047 0.051
0.02 BSC
1
b 56 PL
C
e
M
0.08 (0.003)
X Y
L
0.10
1.50
0.30 0.004 0.008 0.012
1.70 0.059 0.062 0.066
H
1.60
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MUN5114DW1, NSBA114YDXV6, NSBA114YDP6
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
NOTES:
D
X
Y
1. DIMENSIONING AND TOLERANCING PER ASME
A
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
6
5
4
3
H
E
E
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
0.80
0.35 BSC
1.00
0.19 REF
0.10
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
C
D
E
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
6X
L
e
HE
0.95
0.05
1.05
0.15
L
L2
6X
b
6X
L2
0.08
X Y
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT
6X
6X
0.35
0.20
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
DTA114YD/D
相关型号：
©2020 ICPDF网 联系我们和版权申明