STK531U394C-E [ONSEMI]
智能功率模块 (IPM)，600V，15A;
| 型号： | STK531U394C-E |
| 厂家： | 
ONSEMI |
| 描述： | 智能功率模块 (IPM)，600V，15A 局域网 电动机控制 |
| 文件： | 总14页 (文件大小：431K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Intelligent Power Module
(IPM)
600 V, 15 A
STK531U394C-E
The STK531U394C−E is a fully−integrated inverter power stage
consisting of a high−voltage driver, six IGBT’s and a thermistor,
suitable for driving permanent magnet synchronous (PMSM) motors,
brushless−DC (BLDC) motors and AC asynchronous motors. The
IGBT’s are configured in a 3−phase bridge with separate emitter
connections for the lower legs for maximum flexibility in the choice of
control algorithm.
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The power stage has a full range of protection functions including
cross−conduction protection, external shutdown and under−voltage
lockout functions. Output stage uses IGBT/FRD technology and
implements Under Voltage Protection (UVP) and Over Current
Protection (OCP: Shunt Resistor internal) with a Fault Detection
output flag. Internal Boost diodes are provided for high side gate boost
drive.
SIP29 44x26.5
CASE 127ET
MARKING DIAGRAM
Features
• Three−phase 15 A / 600 V IGBT Module with Integrated Drivers
• Typical Values (Upper Side at 15 A) : V (sat) = 1.8 V, V = 2.0 V
STK531U394C
ABCDD
CE
F
• 44.0 mm × 26.5 mm Single In−line Package with Vertical LF Type
• Cross−conduction Protection
• Adjustable Over−current Protection Level
• Integrated Bootstrap Diodes and Resistors
• These Devices are Pb−Free and are RoHS Compliant
STK531U394C = Specific Device Code
A
B
= Year
= Month
Certification
C
DD
= Production Site
= Factory Lot code
• UL1557 (File number : E339285)
Device marking is on package underside
Typical Applications
• Industrial Pumps
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
• Industrial Fans
• Industrial Automation
• Heat Pumps, Home Appliances
HS1
HS2
HS3
HS1
LS1
HS2
LS2
HS3
LS3
HIN1
LIN1
HIN2
LIN2
HIN3
LIN3
IC Driver
Pre driver
+
Level Shifter
LS1
LS2
LS3
with
protection
Circuits
Figure 1. Functional Diagram
1
© Semiconductor Components Industries, LLC, 2018
Publication Order Number:
June, 2021 − Rev. 3
STK531U394C−E/D
STK531U394C−E
STK531U394C
VB1 (9)
VCC
+
+
+
CB
CB
CB
P(13)
VS1(10)
VB2 (5)
CS1
CS2
+
V2 (6)
VB3 (1)
N(16)
VS3 (2)
RCIN(28)
HIN1(17)
HIN2(18)
HIN3(19)
LIN1(20)
LIN2(21)
LIN3(22)
U, VS1(10)
V, VS2(6)
W, VS3(2)
Control
Circuit
(5V)
ISO(24)
FAULT(23)
Motor
RP
CD
RP
TH(29)
VDD=15V
From external regulator
VDD(25)
+
VSS(26)
ISD(27)
LV Ground
RSD
Figure 2. Application Schematic
Usage Precaution
4. Pull down resistor of 33 kW is provided internally
at the signal input terminals. An external resistor
of 2.2 k to 3.3 kW should be added to reduce the
influence of external wiring noise.
1. It is essential that wiring length between terminals
in the snubber circuit be kept as short as possible
to reduce the effect of surge voltages.
Recommended value of “CS” is in the range of 0.1
to 10 mF.
2. “ISO” (pin24) is terminal for current monitor.
High current may flow into that course when
short−circuiting the “ISO” terminal and “VSS”
terminal. Please do not connect them.
5. The level of the over current protection might be
changed from IPM design value when “ISD”
terminal and “VSS” terminal are shorted at
external. Be confirm with actual application (“N”
terminal and “VSS” terminal are shorted at
internal).
3. Inside the IPM, a thermistor used as the
temperature monitor for internal substrate is
connected between VSS terminal and TH terminal
therefore, an external pull up resistor connected
between the TH terminal and an external power
supply should be used.
6. The level of the over current protection is
adjustable with the external resistor “RSD”
between “ISD” terminal and “VSS” terminal.
This data shows the example of the application circuit,
does not guarantee a design as the mass production set.
The temperature monitor example application is as
follows, please refer the Fig.5, and Fig.6 below.
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2
STK531U394C−E
P (13 )
VB3 (1)
W,VS3 (2)
VB2 (5)
V,VS2 (6)
VB1 (9)
U,VS1 (10 )
BD
BD BD
RB
Shunt
Resistor
N (16 )
Level
Level
Level
Shifter
Shifter
Shifter
HIN1 (17 )
HIN2 (18 )
HIN3 (19 )
LIN1 (20 )
LIN2 (21 )
LIN3 (22 )
Logic
Logic
Logic
Latch time
Thermistor
RCIN (28 )
TH (29 )
FAULT (23 )
ISO (24 )
Latch
Latch time is 18ms to 80ms.
(Automatic Reset)
Over−Current
VDD (25 )
VDD−UnderVoltage
VSS (26 )
ISD (27 )
Figure 3. Simplified Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin
1
Name
Description
VB3
High Side Floating Supply Voltage 3
2
W, VS3
VB2
Output 3 − High Side Floating Supply Offset Voltage
High Side Floating Supply voltage 2
5
6
V,VS2
Output 2 − High Side Floating Supply Offset Voltage
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3
STK531U394C−E
Table 1. PIN FUNCTION DESCRIPTION (continued)
Pin
9
Name
Description
VB1
U,VS1
P
High Side Floating Supply voltage 1
10
13
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Output 1 − High Side Floating Supply Offset Voltage
Positive Bus Input Voltage
N
Negative Bus Input Voltage
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
Logic Input High Side Gate Driver − Phase U
Logic Input High Side Gate Driver − Phase V
Logic Input High Side Gate Driver − Phase W
Logic Input Low Side Gate Driver − Phase U
Logic Input Low Side Gate Driver − Phase V
Logic Input Low Side Gate Driver − Phase W
Fault output
FAULT
ISO
Current monitor output
VDD
VSS
ISD
+15V Main Supply
Negative Main Supply
Over current detection and setting
Fault clear time setting output
RCIN
TH
Thermistor output
NOTE: Pins 3, 4, 7, 8, 11, 12, 14, 15 are not present.
Table 2. ABSOLUTE MAXIMUM RATINGS at T = 25°C (Note 1)
C
Rating
Supply voltage
Symbol
Conditions
P to N, surge < 500 V (Note 2)
P to U,V,W or U, V, W, to N
Value
450
Unit
V
V
V
CC
CE
Collector−emitter voltage
Output current
600
V
Io
P, N, U, V, W terminal current
15
A
P, N, U, V, W terminal current at Tc = 100_C
P, N, U, V, W terminal current, PW=1ms
7
A
Output peak current
Iop
30
A
Pre−driver supply voltages
Input signal voltage
VD1,2,3,4
VIN
VB1 to U, VB2 to V, VB3 to W, V to V
(Note 3)
+20
V
DD
SS
HIN1, 2, 3, LIN1, 2, 3
FAULT terminal
IGBT per 1 channel
IGBT, FRD
−0.3 to V
−0.3 to V
35
V
DD
FAULT terminal voltage
Maximum power dissipation
Junction temperature
Storage temperature
VFAULT
Pd
V
DD
W
Tj
150
_C
_C
_C
Nm
Vrms
Tstg
Tc
−40 to +125
−20 to +100
0.9
Operating case temperature
Package mounting torque
Isolation voltage
IPM case temperature
Case mounting screw
Vis
50 Hz sine wave AC 1 minute (Note 4)
2000
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters
2. This surge voltage developed by the switching operation due to the wiring inductance between P and N terminals.
3. VD1=VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = VDD to VSS terminal voltage.
4. Test conditions: AC 2500 V, 1 s.
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STK531U394C−E
Table 3. RECOMMENDED OPERATING RANGES (Note 5)
Rating Symbol
Supply voltage
Conditions
Min
0
Typ
280
15
15
−
Max
450
17.5
16.5
20
Unit
V
V
CC
P to N
VB1 to U, VB2 to V, VB3 to W
to V (Note 5)
Pre−driver supply voltage
VD1, 2, 3
VD4
12.5
13.5
1
V
V
DD
V
SS
PWM frequency
f
kHz
ms
PWM
Dead time
DT
Turn−off to turn−on (external)
ON and OFF
2
−
−
Allowable input pulse width
Package mounting torque
PWIN
1
−
−
ms
‘M3’ type screw
0.6
−
0.9
Nm
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. Pre−drive power supply (VD4 = 15 1.5 V) must have the capacity of Io = 20 mA (DC), 0.5 A (Peak).
Table 4. ELECTRICAL CHARACTERISTICS at Tc = 25_C, VD1, VD2, VD3, VD4 = 15 V
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Power Output Section
Collector−emitter leakage current
Bootstrap diode reverse current
Collector to emitter saturation voltage
V
= 600 V
I
−
−
−
−
−
−
−
−
−
−
−
−
100
100
2.3
2.7
−
mA
mA
V
CE
CE
VR(BD) = 600 V
IR(BD)
(sat)
−
Ic = 15 A, Tj = 25_C Upper side
V
1.8
2.2
1.5
1.7
2.0
2.2
1.6
1.8
−
CE
Lower side (Note 6)
V
Ic = 7 A, Tj = 100_C Upper side
V
Lower side (Note 6)
−
V
Diode forward voltage
IF = 15 A,
Upper side
VF
3.2
3.4
−
V
Tj = 25_C
IF = 7 A,
Lower side (Note 6)
Upper side
V
V
Tj = 100_C
IGBT
Lower side (Note 6)
−
V
Junction to case thermal resistance
Switching time
3.8
6.0
1.2
1.5
−
_C/W
qj−c(T)
qj−c(D)
FRD
−
−
Io = 15 A, V = 300 V, L = 3.9 mH,
t
0.3
−
0.5
0.6
160
200
360
200
250
450
25
ms
ms
mJ
mJ
mJ
mJ
mJ
mJ
mJ
ns
CC
ON
t
OFF
Turn−on switching loss
Turn−off switching loss
Total switching loss
Io = 7 A, V = 300 V, L = 3.9 mH
E
−
CC
ON
E
−
−
OFF
E
−
−
TOT
Turn−on switching loss
Turn−off switching loss
Total switching loss
Io = 7 A, V = 300 V, Tc = 100_C
E
−
−
CC
ON
E
−
−
OFF
E
−
−
TOT
Diode reverse recovery energy
Diode reverse recovery time
Reverse bias safe operating area
Short circuit safe operating area
Driver Section
Io = 7 A, V = 400 V, TC = 100_C
E
−
−
CC
REC
(di/dt set by internal driver)
trr
−
80
−
Io = 30 A, V = 450 V
RBSOA
SCSOA
Full Square
CE
V
CE
= 400 V, Tc = 100_C
4
−
−
ms
Pre−driver consumption current
VD1,2,3 = 15 V (Note 3)
VD4 = 15 V
ID
−
−
0.08
1.6
−
0.4
4.0
−
mA
mA
V
High level Input voltage
HIN1, HIN2, HIN3,
Vin H
2.5
−
LIN1, LIN2, LIN3 to VSS
Low level Input voltage
Vin L
−
0.8
−
V
Input threshold voltage hysteresis (Note 7)
Vinth(hys)
0.5
0.8
V
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5
STK531U394C−E
Table 4. ELECTRICAL CHARACTERISTICS at Tc = 25_C, VD1, VD2, VD3, VD4 = 15 V (continued)
Parameter
Test Conditions
Symbol
Min
Typ
100
−
Max
143
2
Unit
mA
mA
mA
ms
V
Logic 1 input current
VIN = +3.3 V
VIN = 0 V
I
I
−
IN+
IN−
Logic 0 input current
−
FAULT terminal sink current
FAULT clearance delay time
FAULT : ON / VFAULT = 0.1 V
Fault output latch time
IoSD
−
2
−
FLTCLR
18
10.5
−
80
VCC and VS undervoltage positive going
threshold
V
V
11.1
11.7
CCUV+
SUV+
VCC and VS undervoltage negative going
threshold
V
V
10.3
0.14
10.9
0.2
11.5
−
V
V
CCUV−
SUV−
VCC and VS undervoltage hysteresis
V
V
CCUVH
SUVH−
Over current protection level
PW=100 ms, RSD = 0 W
ISD
ISO
22.0
0.36
−
27.8
0.40
A
V
Electric current output signal level
Io = 15 A
0.38
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. The lower side’s VCE(SAT) and VF include a loss by the shunt resistance.
7. Input threshold voltage hysteresis indicates a reference value based on the design value of built−in pre−driver IC.
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6
STK531U394C−E
APPLICATIONS INFORMATION
Input / Output Timing Chart
VBS under voltage protection reset signal
ON
HIN1, 2, 3
OFF
LIN1, 2, 3
VDD under voltage protection reset signal (Note 2)
VDD
VBS under voltage protection reset signal (Note 3)
(Note 4)
VB1, 2, 3
N terminal
ISD operation current level
(BUS line )
current
FAULT terminal
voltage
(at pulled −up)
Cross−conduction prevention period (Note 1)
Cross−conduction prevention period (Note 1)
ON
U pper
U, V, W
OFF
L pper
U, V, W
Utmatically reset after protection
(18msec to 80msec)
Figure 4. Input / Output Timing Chart
Notes:
output is turned off.
1. Diagram shows the prevention of shoot−through
via control logic. More dead time to account for
switching delay needs to be added externally.
2. When VDD decreases all gate output signals will
go low and cut off all of 6 IGBT outputs. When
VDD rises the operation will resume immediately.
3. When the upper side gate voltage at VB1, VB2
and VB3 drops only, the corresponding upper side
The outputs return to normal operation
immediately after the upper side gate voltage rises.
4. In case of over current detection, all IGBT’s are
turned off and the FAULT output is asserted.
Normal operation resumes in 18 to 80 ms after the
over current condition is removed.
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STK531U394C−E
Table 5. INPUT / OUTPUT LOGIC TABLE
INPUT
OUTPUT
HIN
H
LIN
L
OCP
OFF
OFF
OFF
OFF
ON
Upper side IGBT
Lower side IGBT
U,V,W
P
FAULT
OFF
OFF
OFF
OFF
ON
ON
OFF
ON
L
H
OFF
OFF
OFF
OFF
N
L
L
OFF
OFF
OFF
High Impedance
High Impedance
High Impedance
H
H
X
X
Table 6. THERMISTOR CHARACTERISTICS
Parameter
Resistance
Symbol
Condition
Tc = 25°C
Tc = 100°C
Min
99
Typ
100
5.38
4250
−
Max
101
Unit
R
kW
kW
K
25
R
5.18
4208
−40
5.60
4293
+125
100
B−Constant (25 to 50°C)
B
Temperature Range
°C
Figure 5. Thermistor Resistance versus Case Temperature
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STK531U394C−E
Conditions: RTH = 39 kW, pull−up voltage 5.0 V
Figure 6. Thermistor Voltage versus Case Temperature
FAULT Output
Capacitors on High Voltage and VDD Supplies
The FAULT terminal is an open drain output requiring a
pull−up resistor. If the pull−up voltage is 5 V, use a pull−up
resistor with a value of 6.8 kW or higher. If the pull−up
voltage is 15 V, use a pull−up resistor with a value of 20 kW
Both the high voltage and V
electrolytic capacitor and an additional high frequency
capacitor.
supplies require an
DD
Minimum Input Pulse Width
When input pulse width is less than 1.0 ms, an output may
not react to the pulse. (Both ON signal and OFF signal)
or higher. The FAULT output is triggered if there is a V
undervoltage or an overcurrent condition.
DD
The terminal has a function of enable output, this pin is
used to enable or shut down the built−in driver. If the voltage
on the FAULT pin rises above the ENABLE ON−state
voltage, the output drivers are enabled. If the voltage on the
ELTEN pin falls below the ENABLE OFF−state voltage, the
drivers are disabled.
Calculation of Bootstrap Capacitor Value
The bootstrap capacitor value CB is calculated using the
following approach. The following parameters influence the
choice of bootstrap capacitor:
• VBS: Bootstrap power supply.
15 V is recommended.
Undervoltage Lockout Protection
• QG: Total gate charge of IGBT at VBS = 15 V.
132 nC
If V goes below the V supply undervoltage lockout
DD
DD
falling threshold, the FAULT output is switched on. The
FAULT output stays on until V rises above the V
DD
DD
• UVLO: Falling threshold for UVLO.
Specified as 12 V.
supply undervoltage lockout rising threshold.After V has
DD
risen above the threshold to enable normal operation, the
driver waits to receive an input signal on the LIN input
before enabling the driver for the HIN signal.
• ID
: High side drive consumption current.
Specified as 0.4 mA
MAX
• t
: Maximum ON pulse width of high side IGBT.
ONMAX
Overcurrent protection
Capacitance calculation formula:
The over current protection feature is not intended to
protect in exceptional fault condition. An external fuse is
recommended for safety.
CB = (QG + ID
* t ) / (VBS − UVLO)
ONMAX
MAX
CB is recommended to be approximately 3 times the value
calculated above. The recommended value of CB is in the
An additional fuse is recommended to protect against
system level or abnormal over−current fault conditions.
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9
STK531U394C−E
100
range of 1 to 47 mF, however, the value needs to be verified
prior to production. When not using the bootstrap circuit,
each high side driver power supply requires an external
independent power supply.
The internal bootstrap circuit uses a MOSFET. The turn
on time of this MOSFET is synchronized with the turn on of
the low side IGBT. The bootstrap capacitor is charged by
turning on the low side IGBT.
If the low side IGBT is held on for a long period of time
(more than one second for example), the bootstrap voltage
on the high side MOSFET will slowly discharge.
10
1
0.1
0.01
0.1
1
10
tONMAX [ms]
100
1000
Figure 7. Bootstrap Capacitance versus tONMAX
Table 7. MOUNTING INSTRUCTIONS
Item
Recommended Condition
Pitch
40.6 0.1 mm (Please refer to Package Outline Diagram)
Diameter: M3
Screw
Screw head types: pan head, truss head, binding head
Plane washer
Washer
The size is D = 7 mm, d = 3.2 mm and t = 0.5 mm JIS B 1256
Material: Aluminum or Copper
Warpage (the surface that contacts IPM ): −50 to 100 mm
Screw holes must be countersunk.
Heat sink
No contamination on the heat sink surface that contacts IPM.
Temporary tightening: 20 to 30 % of final tightening on first screw
Temporary tightening: 20 to 30 % of final tightening on second screw
Final tightening: 0.6 to 0.9 Nm on first screw
Torque
Grease
Final tightening: 0.6 to 0.9 Nm on second screw
Silicone grease.
Thickness: 100 to 200 mm
Uniformly apply silicone grease to whole back.
Thermal foils are only recommended after careful evaluation.
Thickness, stiffness and compressibility parameters have a strong influence on performance.
Figure 8. Module Mounting Details: Components; Washer Drawing; Need for Even Spreading of Thermal Grease
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10
STK531U394C−E
TEST CIRCUITS
ICE
• I
CE
M
9
A
VS1=15 V
U+
13
10
V+
13
6
W+
13
2
U−
10
16
V−
6
W−
2
10
5
M
N
VS2=15 V
VS3=15 V
VDD=15 V
16
16
VCE=15 V
6
1
U(DB)
9
V(DB)
W(DB)
2
M
N
5
1
25
26
26
26
N
26 ,N
NOTE: U+,V+,W+ : High side phase
U−, V−, W− : Low side phase
Figure 9. Test Circuit for ICE
• V (sat) (Test by pulse)
CE
M
9
VS1=15 V
VS2=15 V
U+
13
10
17
V+
13
6
W+
13
2
U−
10
16
20
V−
6
W−
2
10
5
M
N
16
21
16
22
6
1
V
VCE
(sat)
m
18
19
IC
VS3=15 V
2
m
5V
25
VDD=15 V
N
26 , N
27
Figure 10. Test Circuit for VCE(sat)
• V (Test by pulse)
F
M
U+
V+
13
6
W+
13
2
U−
10
16
V−
6
W−
2
M
N
13
10
16
16
V
IF
VF
N
Figure 11. Test Circuit for VF
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STK531U394C−E
ID
• ID
M
A
VD1
9
VD2
5
VD3
1
VD4
25
M
N
10
6
2
26
VD
N
Figure 12. Test Circuit for ID
• ISD
M
9
VS1=15 V
VS2=15 V
10
5
Input signal
(0 to 5V)
IO
6
1
VS3=15 V
Input signal
VDD=15 V
2
20
25
ISD
IO
26
27
N
Figure 13. Test Circuit for ISD
100usec
• Switching time
(The circuit is a representative example of the low side U phase.)
13
10
9
VS1=15 V
VS2=15 V
Input signal
(0 to 5V)
10
5
VCC
6
1
90%
CS
VS3=15 V
Input signal
VDD=15 V
2
IO
25
10%
20
IC
26
27
16
tOFF
tON
A
Figure 14. Switching Time Test Circuit
ORDERING INFORMATION
Device
Marking
STK531U394C
Package
Shipping
STK531U394C−E
SIP29 44x26.5
(Pb−Free)
11 Units / Tube
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12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP29 44x26.5
CASE 127ET
ISSUE O
DATE 18 AUG 2017
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DOCUMENT NUMBER:
DESCRIPTION:
98AON73701G
SIP29 44X26.5
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