STK984-091A-E [ONSEMI]

3-phase Brush-less DC Motor Driver IC; 3相无刷直流电动机驱动器IC
STK984-091A-E
型号: STK984-091A-E
厂家: ONSEMI    ONSEMI
描述:

3-phase Brush-less DC Motor Driver IC
3相无刷直流电动机驱动器IC

驱动器
文件: 总7页 (文件大小:69K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Ordering number : ENA2117A  
STK984-091A-E  
Thick-Film Hybrid IC  
3-phase Brush-less DC  
http://onsemi.com  
Motor Driver IC  
Overview  
The STK984-091A-E is a hybrid IC designed to be used in Brush-less DC Motor.  
Application  
Industrial – Motor Drive  
Features  
FET can be driven (built-in pre-driver IC) by microcontroller output ( logic system).  
Various protections (Overcurrent Protection, Over Temperature Protection, Low Voltage Protection, Over Voltage  
Protection) are incorporated.  
Intelligent DIAG Function that externally outputs each protection status, such as Overcurrent Protection, Over  
Temperature Protection.  
Protection functions can be reset by external inputs.  
Series model  
STK984-091A-E  
40V  
STK984-090A-E  
40V  
VB max  
Id max  
IOC  
20A  
20A  
91-170A  
48-90A  
68-160A  
22-65A  
ISD  
TSD  
135-145C  
126-136C  
Specifications  
Absolute Maximum Ratings at Ta = 25C, Tc = 25C  
Parameter  
Symbol  
V+B1  
V+B2  
max  
Conditions  
Ratings  
-0.3 to 40  
Unit  
V
Supply voltage  
+B1 to PG  
+B2 to SG  
Control input voltage  
DIAG terminal voltage  
Drain current  
V
UT, VT, WT, UB, VB, WB to SG  
DIAG1, DIAG2 to SG  
DC  
-0.3 to 6  
-0.3 to 6  
20  
V
V
IN  
VDIAG  
Id max  
A
Pulse (Single-Shot within 10s)  
Semiconductor device  
180  
A
Junction temperature  
Storage temperature  
Tj max  
Tstg  
150  
C  
C  
-40 to +125  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating  
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 7 of this data sheet.  
Semiconductor Components Industries, LLC, 2013  
April, 2013  
91212HK/82912HKPC 018-12-0023 No.A2117-1/7  
STK984-091A-E  
Recommended Operating Conditions at -40C Tc 125C  
Parameter  
Symbol  
V+B1  
V+B2  
Test Conditions  
min  
typ  
13.5  
max  
Unit  
V
Supply voltage  
+B1 to PG  
+B2 to SG  
8
18  
20  
Output current  
I
I
ON duty, ON duty100%  
O
O
A
120deg excitation method  
Operating substrate  
temperature  
Tc  
Thick film IC substrate temperature  
-40  
125  
20  
C  
Drive PWM frequency  
FO  
ONDuty: 10 to 90%, 100%  
kHz  
Thermal Resistance  
Parameter  
Symbol  
jc  
Test Conditions  
min  
typ  
max  
Unit  
Chip-case resistance  
Junction -to- backside of the substrate  
MOSFET/ch  
4.5  
C/W  
Electrical Characteristics at Ta = 25C, V+B1 (V+B2) = 13.5V unless otherwise specifed  
Parameter  
Symbol  
Test Conditions  
min  
typ  
max  
Unit  
mA  
Current consumption  
(Control system)  
I
V+B1=V+B2=16V  
CC  
10  
15  
Output saturation voltage  
V
(sat)  
I
=20A  
+B1 to U, V, W  
0.3  
0.2  
0.5  
0.4  
DS  
O
V
U, V, W to PG  
Current sensing resistor  
Time delay (ON)  
Rs  
2.91  
3.00  
1.8  
1.9  
0.3  
2.9  
2.2  
0.3  
3.09  
2.8  
m  
td(on)  
20A  
U, V, W  
0.9  
0.9  
s  
s  
-
-
-
-
U , V , W  
3.0  
Rise time  
tr  
20A  
20A  
Time delay (OFF)  
td(off)  
U, V, W  
1.3  
0.8  
4.5  
3.5  
s  
s  
-
-
U , V , W  
Fall time  
tf  
20A  
Motor Control Input Terminal at 8V V+B1 (V+B2) 18V, -40C Ta 125C  
Parameter  
Input ON voltage  
Input OFF voltage  
Symbol  
Test Conditions  
min  
typ  
max  
Unit  
V
V
V
(on)  
Output on UT, VT, WT, UB, VB, WB to SG  
Output off UT, VT, WT, UB, VB, WB to SG  
3.5  
3.5  
IN  
(off)  
IN  
1.5  
1.5  
V
Reset Input Terminal at 8V V+B1 (V+B2) 18V, -40C Ta 125C  
Parameter  
Reset high voltage  
Reset low voltage  
Output delay time (ON)  
Symbol  
Vreset(Hi)  
Vreset(Lo)  
treset(on)  
Test Conditions  
min  
typ  
max  
Unit  
V
Output ON  
Output OFF  
V
From reset input terminal  
(RESET=Hi) to output ON  
From reset input terminal  
(RESET=Lo) to output OFF  
0.25  
ms  
Output delay time (OFF)  
treset(off)  
2
s  
No.A2117-2/7  
STK984-091A-E  
Protective Function at Ta = 25C, V+B1 (V+B2) = 13.5V unless otherwise specified  
Parameter  
Symbol  
Test Conditions  
min  
typ  
4.75  
max  
Unit  
V
Low voltage protection  
threshold  
Vuv  
4.45  
5.1  
0.3  
Low voltage protection  
hysteresis  
Vuv(hy)  
Tuvoff  
0.07  
48  
0.2  
V
Low voltage shutdown  
output delay  
1.0  
68  
s  
A
Over current threshold  
ISD  
Automatic recovery  
90  
Over current DIAG  
output delay time  
Over current shutdown  
interval  
Tocdgoff  
4.3  
s  
tint  
1
4.3  
ms  
s  
A
Over current shutdown  
output delay  
Tocoff  
IOC  
Ground fault short-circuit  
protection  
Power-cycle  
91  
134  
170  
Ground fault short-circuit  
detection DIAG  
Tspdgoff  
3.0  
3.0  
ms  
ms  
output delay time  
Ground fault short-circuit  
shutdown output delay  
time  
Tspoff  
Temperature protection  
shutdown  
Tst  
Thick film IC substrate temperature, automatic  
restoration  
135  
115  
140  
120  
3.4  
3.4  
145  
125  
C  
C  
ms  
Temperature protection  
recovery  
Tst(hy)  
Tthdgoff  
Tthoff  
Thick film IC substrate temperature  
Over temperature DIAG  
output delay time  
Over temperature  
shutdown output delay  
Over voltage threshold  
s  
V
Vov  
24  
Over voltage protection  
hysteresis width  
Vov(hy)  
0.5  
1.0  
V
Over voltage shutdown  
output delay  
Tovoff  
s  
No.A2117-3/7  
STK984-091A-E  
Package Dimensions  
unit : mm (typ)  
56.0  
R1.7  
1
23  
2.6  
0.75  
2.0  
6.8  
22 2.0=44.0  
(50.0)  
59.8  
Internal Block Diagram  
+B2(1)  
S2(23)  
S1(22)  
+B(20)  
+B(21)  
OVSD  
/UVSD  
Charge  
Pump  
5V Reg.  
UT(4)  
VT(5)  
WT(6)  
UB(7)  
High side  
Gate Drive  
High side  
Circuit  
ISD  
Logic/  
Protection  
Control  
U(12)  
U(13)  
VB(8)  
WB(9)  
V(14)  
V(15)  
W(16)  
W(17)  
Reset  
RESET(3)  
Low side  
Low side  
ISD  
Gate Drive  
Circuit  
DIAG1(10)  
DIAG2(11)  
DIAG  
output  
TSD  
PG(18)  
PG(19)  
Temperature  
Compensation  
SG(2)  
SUB  
No.A2117-4/7  
STK984-091A-E  
Application Circuit  
U: 12, 13  
V: 14, 15  
W: 16, 17  
+B1: 20, 21  
+
+
8 to 18V(DC)  
2.2F  
M
PG: 18, 19  
+B2: 1  
5V(DC)  
SG: 2  
DIAG1: 10  
DIAG2: 11  
4.7k  
4.7k  
STK984-091A-E  
UT: 4  
VT: 5  
WT: 6  
UB: 7  
VB: 8  
WB: 9  
RESET: 3  
S1: 22  
S2: 23  
NOTE  
1. A voltage overshoot with vibration will be occurred during a switching operation due to floating inductance of the  
power source wiring connected between terminal +B1 and PG. In order that the voltage overshoot between +B1 and  
PG, +B1 and each –UBW, each UVW and PG will not exceed its rating, please minimize wiring inductance by  
shortening the wiring, also connect a snubber circuit close to between +B1 and PG terminals.  
2. With the object of the overcurrent protection circuit fail-safe design, inserting a fuse in +B1 line is recommended.  
3. There is a 100k(Typ) pull-down resister connected inside of the signal input terminal. However, in the case of  
mounting a resister externally to reduce noise due to wiring, please satisfy the input voltage threshold of this  
Hybrid-IC.  
4. Terminal DIAG 1 and DIAG 2 are the open drain output configuration. Please pull up with 4.7kresister to 5V  
power supply.  
5. There is a 100k(Typ) pull-up resister connected inside of the RESET terminal. It operates normally in the open-  
state. When the short-circuit protection operates and latches the output OFF, the latched output OFF can be released  
by making RESET terminal Low and re-opened.  
No.A2117-5/7  
STK984-091A-E  
Pin Function Description  
Pin No.  
Pin Name  
Description  
Pin*  
S
1
2
3
+B2  
Control System Power  
Control System GND  
RESET Terminal  
SG  
S
RESET  
Normal operating in RESET = H or Open-State  
S
The Gate Output will be Lo-state for both Hi/Lo sides with RESET = L (Output OFF)  
Output OFF Latch Release terminal of Short-circuit Protection  
Driving Signal Input Upper U-phase  
4
5
UT  
VT  
S
S
S
S
S
S
Driving Signal Input Upper V-phase  
Driving Signal Input Upper W-phase  
Driving Signal Input Lower U-phase  
Driving Signal Input Lower V-phase  
Driving Signal Input Lower W-phase  
6
WT  
7
UB  
8
VB  
9
WB  
DIAG1  
10  
Fault Diagnosis Output 1 (Overcurrent)  
Normal Operation: Lo  
S
S
Abnormal Operation: Hi  
11  
DIAG2  
Fault Diagnosis Output 2 (Over Temperature)  
Normal Operation: Lo  
Abnormal Operation: Hi  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
U
U
U-phase Output  
P
P
P
P
P
P
P
P
P
P
S
S
U-phase Output  
V
V-phase Output  
V
V-phase Output  
W
W-phase Output  
W
W-phase Output  
PG  
PG  
+B1  
+B1  
S1  
S2  
Power System GND  
Power System GND  
Power System Supply  
Power System Supply  
Current Sense Resistor Sensing (+) terminal  
Current Sense Resistor Sensing (-) terminal  
*
S: Signal terminal  
P: Power terminal  
No.A2117-6/7  
STK984-091A-E  
I
- Tc  
I
- VB  
CCO  
CCO  
12  
10  
8
12  
10  
8
VB=16V  
Tc=25C  
6
6
4
4
2
0
2
0
0
20  
40  
60  
80  
100  
120  
140  
0
5
10  
15  
20  
25  
30  
Tc - C  
VB - V  
Vsat - Tc  
Vsat - I  
D
450  
400  
350  
300  
250  
200  
150  
100  
300  
250  
I =20A  
D
VB=16V,  
Tc=25C  
200  
150  
100  
50  
0
50  
0
0
20  
40  
60  
80  
100  
120  
140  
0
5
10  
15  
20  
25  
I
D
- A  
Tc - C  
ORDERING INFORMATION  
Device  
Package  
Shipping (Qty / Packing)  
9 / Fan-Fold  
SIP-23  
(Pb-Free)  
STK984-091A-E  
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number  
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at  
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no  
warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the  
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual  
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical  
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use  
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in  
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for  
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors  
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or  
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the  
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PS No.A2117-7/7  

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