SZESD8551MXWT5G [ONSEMI]
低电容 ESD 保护二极管，用于高速数据线;
| 型号： | SZESD8551MXWT5G |
| 厂家： | 
ONSEMI |
| 描述： | 低电容 ESD 保护二极管，用于高速数据线 二极管 |
| 文件： | 总8页 (文件大小：503K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ESD Protection Diodes
Low Capacitance ESD Protection Diode
for High Speed Data Line
ESD8551, SZESD8551
The ESD8551 ESD protection diodes are designed to protect high
speed data lines from ESD. Ultra−low capacitance and low ESD
clamping voltage make this device an ideal solution for protecting
voltage sensitive high speed data lines.
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MARKING
Features
DIAGRAMS
• Low Capacitance (0.30 pF Max, I/O to GND)
• Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4) & ISO 10605
X2DFN2
CASE 714AB
A M
• Low ESD Clamping Voltage
• SZESD8551MXWT5G − Wettable Flank Package for Optimal
Automated Optical Inspection (AOI)
A
M
= Specific Device Code
= Date Code
• SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
X2DFNW2
CASE 711BG
K M
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
K
M
= Specific Device Code
= Date Code
Typical Applications
• USB 3.0
• MHL 2.0
PIN CONFIGURATION
AND SCHEMATIC
• eSATA
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
1
2
Rating
Symbol
Value
−55 to +125
−55 to +150
260
Unit
°C
Operating Junction Temperature Range
Storage Temperature Range
T
J
T
stg
°C
=
Lead Solder Temperature −
T
L
°C
Maximum (10 Seconds)
IEC 61000−4−2 Contact
IEC 61000−4−2 Air
ISO 10605 150 pF/2 kW
ISO 10605 330 pF/2 kW
ISO 10605 330 pF/330 W
ESD
20
20
30
30
15
kV
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
July, 2021 − Rev. 5
ESD8551/D
ESD8551, SZESD8551
ORDERING INFORMATION
Device
†
Package
Shipping
ESD8551N2T5G
X2DFN2
8000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
(Pb−Free)
SZESD8551N2T5G*
X2DFN2
(Pb−Free)
SZESD8551MXWT5G*
X2DFNW2
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
ELECTRICAL CHARACTERISTICS
A
I
(T = 25°C unless otherwise noted)
I
PP
Symbol
Parameter
R
DYN
V
Working Peak Voltage
RWM
I
HOLD
I
R
Maximum Reverse Leakage Current @ V
RWM
I
I
T
R
V
V
Breakdown Voltage @ I
V
BR
V
V V
C RWM HOLD
BR
T
I
V
V
V
V
R
T
BR
HOLD RWM
C
I
Test Current
I
I
T
V
HOLD
HOLD
Holding Reverse Voltage
Holding Reverse Current
Dynamic Resistance
Maximum Peak Pulse Current
HOLD
I
R
DYN
R
DYN
−I
PP
I
PP
V
= V
+ (I * R
)
C
HOLD
PP
DYN
V
Clamping Voltage @ I
PP
C
V
C
= V
+ (I * R
)
HOLD
PP
DYN
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
A
Parameter
Symbol
Conditions
Min
Typ
Max
3.3
Unit
V
Reverse Working Voltage
Breakdown Voltage
V
RWM
I/O Pin to GND
I = 1 mA, I/O Pin to GND
V
BR
5.5
7.9
5
8.3
V
T
Reverse Leakage Current
Reverse Holding Voltage
Holding Reverse Current
Clamping Voltage (Note 1)
I
R
V
RWM
= 3.3 V, I/O Pin to GND
500
nA
V
V
I/O Pin to GND
2.05
17
HOLD
HOLD
I
I/O Pin to GND
mA
V
V
V
IEC61000−4−2, 8 KV Contact
C
Clamping Voltage
TLP (Note 2)
9.0
V
I
PP
= 8 A
IEC 61000−4−2 Level 2 equivalent
( 4 kV Contact, 4 kV Air)
C
I
PP
= 16 A
16.0
IEC 61000−4−2 Level 4 equivalent
( 8 kV Contact, 8 kV Air)
Dynamic Resistance
R
Pin1 to Pin2
Pin2 to Pin1
0.84
0.84
W
DYN
Junction Capacitance
Junction Capacitance
C
C
V
R
V
R
= 0 V, f = 1 MHz
0.20
0.19
0.30
0.25
pF
pF
J
J
= 0 V, f = 2.5 GHz
1. For test procedure see Figure 7 and application note AND8307/D.
2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z = 50 W, t = 100 ns, t = 4 ns, averaging window; t = 30 ns to t = 60 ns.
0
p
r
1
2
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2
ESD8551, SZESD8551
TYPICAL CHARACTERISTICS
2
0
1.0
0.9
m1
m2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
−2
−4
−6
−8
−10
−12
−14
0.1
0
−3.5 −2.5
1E7
1E8
1E9
1E10 3E10
−1.5
−0.5
0.5
(V)
1.5
2.5
3.5
FREQUENCY (Hz)
V
BIAS
Figure 2. S21 Insertion Loss
Figure 1. CV Characteristics
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (GHz)
Figure 3. Capacitance over Frequency
10
8
−20
−18
20
10
8
18
16
14
12
10
8
−16
−14
−12
−10
−8
6
6
4
4
−6
6
−4
2
0
4
2
0
−2
0
2
0
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
V , VOLTAGE (V)
C
V , VOLTAGE (V)
C
Figure 5. Negative TLP I−V Curve
Figure 4. Positive TLP I−V Curve
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3
ESD8551, SZESD8551
Latch−Up Considerations
stable operating point of the circuit and the system is
therefore latch−up free. In the non−latch up free load line
case, the IV characteristic of the snapback protection device
ON Semiconductor’s 8000 series of ESD protection
devices utilize a snap−back, SCR type structure. By using
this technology, the potential for a latch−up condition was
taken into account by performing load line analyses of
common high speed serial interfaces. Example load lines for
latch−up free applications and applications with the
potential for latch−up are shown below with a generic IV
characteristic of a snapback, SCR type structured device
overlaid on each. In the latch−up free load line case, the IV
characteristic of the snapback protection device intersects
intersects the load−line in two points (V
, I
OPA OPA
) and
(V , I ). Therefore in this case, the potential for
OPB OPB
latch−up exists if the system settles at (V
, I
) after a
OPB OPB
transient. Because of this, ESD8551 should not be used for
HDMI applications – ESD8104 or ESD8040 have been
designed to be acceptable for HDMI applications without
latch−up. Please refer to Application Note AND9116/D for
a more in−depth explanation of latch−up considerations
using ESD8000 series devices.
the load−line in one unique point (V , I ). This is the only
OP OP
ESD8551 Latch*up free:
USB 2.0 LS/FS, USB 2.0 HS,
USB 3.0 SS, DisplayPort
ESD8551 Potential Latch*up:
HDMI 1.4/1.3a TMDS
Figure 6. Example Load Lines for Latch−up Free Applications and Applications with the Potential for Latch−up
Table 1. SUMMARY OF SCR REQUIREMENTS FOR LATCH−UP FREE APPLICATIONS
VBR (min)
(V)
IH (min)
(mA)
VH (min)
(V)
ON Semiconductor ESD8000 Series
Recommended PN
Application
HDMI 1.4/1.3a TMDS
USB 2.0 LS/FS
USB 2.0 HS
3.465
3.301
0.482
2.800
3.600
54.78
1.76
N/A
1.0
1.0
1.0
1.0
1.0
ESD8104, ESD8040
ESD8004, ESD8551
ESD8004, ESD8551
USB 3.0 SS
N/A
ESD8004, ESD8006, ESD8551
ESD8004, ESD8006, ESD8551
DisplayPort
25.00
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4
ESD8551, SZESD8551
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
First Peak
Current
(A)
100%
90%
Test Volt-
age (kV)
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 7. IEC61000−4−2 Spec
50 W Coax
Cable
Transmission Line Pulse (TLP) Measurement
L
Attenuator
S
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 8. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 9 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
÷
50 W Coax
Cable
I
M
V
M
10 MW
DUT
V
C
Oscilloscope
Figure 8. Simplified Schematic of a Typical TLP
System
Figure 9. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
X2DFNW2 1.0x0.6, 0.65P
CASE 711BG
ISSUE C
SCALE 8:1
DATE 13 SEP 2019
GENERIC
MARKING DIAGRAM*
XXM
XX = Specific Device Code
M
= Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON15241G
X2DFNW2 1.0X0.6, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
X2DFN2 1.0x0.6, 0.65P
CASE 714AB
ISSUE B
DATE 21 NOV 2017
SCALE 8:1
NOTES:
0.10
C
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
A B
E
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
PIN 1
INDICATOR
MILLIMETERS
DIM MIN
NOM MAX
A
A1
b
D
E
e
L
0.34
−−−
0.45
0.95
0.55
0.37
0.03
0.50
1.00
0.60
0.65 BSC
0.25
0.40
0.05
0.55
1.05
0.65
0.05
C
TOP VIEW
NOTE 3
A
0.10
0.10
C
0.20
0.30
C
GENERIC
MARKING DIAGRAM*
A1
SEATING
PLANE
C
SIDE VIEW
XX M
e
b
XX = Specific Device Code
e/2
M
0.05
C A B
M
= Date Code
1
RECOMMENDED
2X
L
0.05
SOLDER FOOTPRINT*
M
C A B
1.20
2X
BOTTOM VIEW
2X
0.47
0.60
PIN 1
DIMENSIONS: MILLIMETERS
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON98172F
X2DFN2 1.0X0.6, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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