SZNUP1128WTT1G [ONSEMI]
IVN Bus Protector, Single Line LIN & Dual Line CAN;
| 型号： | SZNUP1128WTT1G |
| 厂家： | 
ONSEMI |
| 描述： | IVN Bus Protector, Single Line LIN & Dual Line CAN |
| 文件： | 总10页 (文件大小：452K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IVN Bus Protector, Single
Line LIN & Dual Line CAN
NUP1128, NUP2128
The NUP1128/NUP2128 are designed to protect both CAN and LIN
transceivers from ESD and other harmful transient voltage events.
These devices provide bidirectional protection for each data line with
a single compact SC−70 (SOT−323) or SOD−323 package, giving the
system designer a low cost option for improving system reliability and
meeting stringent EMI requirements.
www.onsemi.com
MARKING
DIAGRAMS
Features
• Low Reverse Leakage Current (< 100 nA)
SC−70
CASE 419
XX MG
• SZNUPH1128, SZNUP2128 175°C T
Devices
J(max)
G
♦ Rated for High Temperature, Mission Critical and Grade 0
Applications
1
• IEC Compatibility:
2
SOD−323
CASE 477
♦ IEC 61000−4−2 (ESD): Level 4
XX M
♦ IEC 61000−4−4 (EFT): 50 A (5/50 ns)
♦ IEC 61000−4−5 (Lighting) 3.0 A (8/20 ms)
• ISO 7637−1, Nonrepetitive EMI Surge Pulse 2, 8.0 A (1/50 ms)
• ISO 7637−3, Repetitive Electrical Fast Transient (EFT)
EMI Surge Pulses, 50 A (5/50 ns)
1
XX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
• Flammability Rating UL 94 V−0
• SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
PIN 1
PIN 1
PIN 3
PIN 2
NUP1128
(SC−70)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
NUP1128
(SOD−323)
Applications
• Automotive Networks
♦ CAN / CAN−FD
♦ Low and High−Speed CAN
♦ Fault Tolerant CAN
♦ LIN
PIN 1
PIN 2
PIN 3
NUP2128
CAN_H / Single Wire LIN
CAN / LIN
CAN / LIN
Transceiver
CAN_L
NUP1128
NUP2128
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
June, 2020 − Rev. 3
NUP1128/D
NUP1128, NUP2128
MAXIMUM RATINGS (T = 25°C, unless otherwise specified)
J
Symbol
Rating
Value
Unit
W
PPK
Peak Power Dissipation, 8/20 ms Double Exponential Waveform (Note 1)
165
T
Operating Junction Temperature Range
NUP1128HT1G, SZNUP1128HT1G
All other devices
°C
J
J
L
−55 to 150
−55 to 175
T
Storage Temperature Range
NUP1128HT1G, SZNUP1128HT1G
All other devices
°C
−55 to 150
−55 to 175
T
Lead Solder Temperature (10 s)
260
°C
ESD
Human Body Model (HBM)
IEC 61000−4−2 Contact
8.0
30
30
30
30
30
kV
kV
kV
kV
kV
kV
IEC 61000−4−2 Air
ISO 10605 Contact (330 pF / 330 W)
ISO 10605 Contact (330 pF / 2 kW)
ISO 10605 Contact (150 pF / 2 kW)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse per Figure 1.
ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise specified)
J
Symbol
Parameter
Reverse Working Voltage
Breakdown Voltage
Test Conditions
Min
Typ
Max
26.5
35.5
Unit
V
V
RWM
(Note 2)
I = 1 mA (Note 3)
V
BR
27.5
31
V
T
I
R
Reverse Leakage Current
V
= 26.5 V
1
150
100
750
nA
RWM
T = 150°C
A
V
C
Clamping Voltage
I
PP
I
PP
= 1 A (8/20 ms Waveform) (Note 4)
= 3 A
39
46
47
55
V
I
Maximum Peak Pulse Current
Capacitance
8/20 ms Waveform (Note 4)
3.0
A
pF
%
PP
C
V
R
V
R
= 0 V, f = 1 MHz (Line to GND)
= 0 V, f = 1 MHz (Note 5)
11
13
2
J
DC
Diode Capacitance Matching
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
), which should be equal or greater than the DC
RWM
3. V is measured at pulse test current I .
BR
T
4. Pulse waveform per Figure 1.
5. DC is the percentage difference between C of lines 1 and 2 measured according to the test conditions given in the electrical characteristics
J
table.
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2
NUP1128, NUP2128
TYPICAL PERFORMANCE CURVES
(T = 25°C unless otherwise noted)
J
1.E−02
1.E−03
1.E−04
1.E−05
1.E−06
1.E−07
1.E−08
1.E−09
1.E−10
12
10
8
6
4
2
0
1.E−11
1.E−12
−40 −30
−20
−10
0
10
20
30
40
−30 −25 −20 −15 −10 −5
0
5
10 15 20 25 30
V (V)
V
Bias
(V)
Figure 1. IV Characteristics
Figure 2. CV Characteristics
30
25
20
15
10
5
0
20
+25°C
−55°C
+55°C
+85°C
40
60
+150°C
80
0
100
−60 −40 −20
0
20 40 60 80 100 120 140 160 180
1E−12 1E−11 1E−10 1E−09 1E−08 1E−07 1E−06
I , LEAKAGE CURRENT (A)
L
TEMPERATURE (°C)
Figure 4. Temperature Power Dissipation Derating
Figure 3. IR vs Temperature Characteristics
60
50
110
100
90
WAVEFORM
PARAMETERS
t = 8 ms
r
80
t = 20 ms
d
40
c−t
IO−GND
70
60
50
30
20
t = I /2
d
PP
40
30
20
10
0
10
0
0
1
2
3
4
0
5
10
15
t, TIME (ms)
20
25
30
I
PP
(A)
Figure 5. Pulse Waveform (8/20 ms)
Figure 6. Clamping Voltage vs Peak Pulse Current
(8/20 ms)
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3
NUP1128, NUP2128
180
160
140
120
100
80
20
0
−20
−40
−60
−80
60
−100
−120
−140
−160
−180
40
20
0
−20
−20
0
20
40
60
80
100
120 140
−20
0
20
40
60
80
100
120
140
TIME (ns)
TIME (ns)
Figure 7. IEC61000−4−2 +8 kV Contact ESD
Figure 8. IEC61000−4−2 −8 kV Contact ESD
Clamping Voltage
Clamping Voltage
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4
NUP1128, NUP2128
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
First Peak
Current
(A)
100%
90%
Test Volt-
age (kV)
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 9. IEC61000−4−2 Spec
Device
Under
Test
Oscilloscope
ESD Gun
50 W
Cable
50 W
Figure 10. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
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5
NUP1128, NUP2128
20
18
16
14
12
10
8
10
8
10
8
−20
−18
−16
−14
−12
−10
−8
6
6
4
4
6
−6
4
2
−4
2
2
−2
0
0
0
0
0
50
0
50
10
20
30
40
10
20
30
40
VOLTAGE (V)
VOLTAGE (V)
Figure 11. Positive TLP IV Curve
Figure 12. Negative TLP IV Curve
NOTE: TLP parameter: Z = 50 W, t = 100 ns, t = 300 ps, averaging window: t = 30 ns to t = 60 ns.
0
p
r
1
2
50 W Coax
Cable
Transmission Line Pulse (TLP) Measurement
L
Attenuator
S
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 13. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 14 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
÷
50 W Coax
Cable
I
M
V
M
10 MW
DUT
V
C
Oscilloscope
Figure 13. Simplified Schematic of a Typical TLP
System
Figure 14. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
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6
NUP1128, NUP2128
ORDERING INFORMATION
Operating Junction
Temperature Range
†
Device
Marking
Package
Shipping
NUP1128WTT1G
SZNUP1128WTT1G*
NUP2128WTT1G
SZNUP2128WTT1G*
NUPH1128HT1G
SZNUPH1128HT1G*
NUP1128HT1G
7X
SC−70
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free)
7U
AL
7A
−55 to 175°C
SOD−323
(Pb−Free)
−55 to 150°C
SZNUP1128HT1G*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
Honeywell and SDS are registered trademarks of Honeywell International Inc.
DeviceNet is a trademark of Rockwell Automation.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
DATE 11 NOV 2008
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
D
e1
MILLIMETERS
INCHES
DIM
A
A1
A2
b
c
D
E
e
e1
L
MIN
0.80
0.00
NOM
0.90
0.05
0.70 REF
0.35
0.18
2.10
1.24
1.30
MAX
1.00
0.10
MIN
0.032
0.000
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
MAX
0.040
0.004
3
E
H
E
1
2
0.30
0.10
1.80
1.15
1.20
0.40
0.25
2.20
1.35
1.40
0.012
0.004
0.071
0.045
0.047
0.016
0.010
0.087
0.053
0.055
b
e
0.65 BSC
0.38
2.10
0.026 BSC
0.015
0.083
0.20
2.00
0.56
2.40
0.008
0.079
0.022
0.095
H
E
c
A
A2
GENERIC
MARKING DIAGRAM
0.05 (0.002)
L
A1
XX MG
SOLDERING FOOTPRINT*
G
0.65
1
0.025
0.65
0.025
XX
M
= Specific Device Code
= Date Code
G
= Pb−Free Package
1.9
0.075
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.9
0.035
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. N.C.
STYLE 3:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 4:
STYLE 5:
CANCELLED
PIN 1. CATHODE
2. CATHODE
3. ANODE
PIN 1. ANODE
2. ANODE
3. CATHODE
3. CATHODE
STYLE 6:
STYLE 7:
PIN 1. BASE
STYLE 8:
PIN 1. GATE
STYLE 9:
STYLE 10:
PIN 1. CATHODE
2. ANODE
STYLE 11:
PIN 1. CATHODE
PIN 1. EMITTER
2. BASE
3. COLLECTOR
PIN 1. ANODE
2. CATHODE
3. CATHODE-ANODE
2. EMITTER
3. COLLECTOR
2. SOURCE
3. DRAIN
2. CATHODE
3. CATHODE
3. ANODE-CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42819B
SC−70 (SOT−323)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOD−323
CASE 477−02
ISSUE H
2
2
DATE 13 MAR 2007
1
1
STYLE 1
STYLE 2
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS SPECIFIED PER L/F DRAWING
WITH SOLDER PLATING.
H
D
E
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
5. DIMENSION L IS MEASURED FROM END OF RADIUS.
1
E
b
2
MILLIMETERS
DIM MIN NOM MAX
0.80
INCHES
NOM MAX
1.00 0.031 0.035 0.040
0.10 0.000 0.002 0.004
0.006 REF
MIN
A
0.90
0.05
A1 0.00
A3
0.15 REF
0.32
A3
A
b
C
D
E
L
0.25
0.089
1.60
1.15
0.08
2.30
0.4 0.010 0.012 0.016
0.12 0.177 0.003 0.005 0.007
1.70
1.25
1.80 0.062 0.066 0.070
1.35 0.045 0.049 0.053
0.003
H
2.50
2.70 0.090 0.098 0.105
E
L
A1
C
NOTE 5
NOTE 3
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
XX M
XX M
0.63
0.025
STYLE 1
STYLE 2
0.83
0.033
XX = Specific Device Code
= Date Code
1.60
0.063
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
2.85
0.112
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
STYLE 2:
NO POLARITY
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB17533C
SOD−323
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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