Z0103MN_技术文档

Z0103MN, Z0107MN,

Z0109MN

Sensitive Gate Triac Series

Silicon Bidirectional Thyristors

Designed for use in solid state relays, MPU interface, TTL logic and

other light industrial or consumer applications. Supplied in surface

mount package for use in automated manufacturing.

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TRIAC

1.0 AMPERE RMS

600 VOLTS

Features

• Sensitive Gate Trigger Current in Four Trigger Modes

• Blocking Voltage to 600 V

• Glass Passivated Surface for Reliability and Uniformity

• Surface Mount Package

MT2

MT1

G

• These are Pb−Free Devices

MARKING

DIAGRAM

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

J

4

Rating

Symbol

Value

Unit

Peak Repetitive Off−State Voltage (Note 1)

V

600

V

DRM,

RRM

SOT−223

CASE 318E

STYLE 11

AYW

10XMN G

G

(Sine Wave, 50 to 60 Hz, Gate Open,

V

T = −40 to +125°C)

J

On−State Current RMS (T = 80°C)

I

1.0

8.0

0.4

A

C

T(RMS)

1

2

3

(Full Sine Wave 50 to 60 Hz)

A

Y

W

= Assembly Location

= Year

= Work Week

Peak Non−repetitive Surge Current (One Full

I

TSM

Cycle Sine Wave, 60 Hz, T = 25°C)

C

2

Circuit Fusing Considerations

(Pulse Width = 8.3 ms)

I t

A s

10XMN = Device Code

x = 3, 7, 9

G

= Pb−Free Package

(Note: Microdot may be in either location)

Average Gate Power (T = 80°C, t v 8.3 ms)

P

1.0

W

A

C

G(AV)

Peak Gate Current (t v 20 ms, T = +125°C)

I

GM

J

Operating Junction Temperature Range

T

−40 to

+125

°C

J

PIN ASSIGNMENT

Storage Temperature Range

T

−40 to

°C

stg

1

2

3

4

Main Terminal 1

Main Terminal 2

Gate

+150

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

Main Terminal 2

1. V

and V

for all types can be applied on a continuous basis. Blocking

DRM

RRM

voltages shall not be tested with a constant current source such that the

voltage ratings of the devices are exceeded.

ORDERING INFORMATION

THERMAL CHARACTERISTICS

†

Device

Package

Shipping

Characteristic

Symbol

Max

Unit

Z0103MNT1G

SOT−223

(Pb−Free)

1000/Tape & Reel

Thermal Resistance, Junction−to−Ambient PCB

R

156

°C/W

q

JA

Mounted per Figure 1

Z0107MNT1G

Z0109MNT1G

SOT−223

(Pb−Free)

Thermal Resistance, Junction−to−Tab Meas-

ured on MT2 Tab Adjacent to Epoxy

R

25

°C/W

°C

q

JT

SOT−223

(Pb−Free)

Maximum Device Temperature for

Soldering Purposes for 10 Secs Maximum

T

260

L

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

©

Semiconductor Components Industries, LLC, 2009

1

Publication Order Number:

June, 2009 − Rev. 3

Z0103MN/D

Z0103MN, Z0107MN, Z0109MN

ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted; Electricals apply in both directions)

C

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS

Peak Repetitive Blocking Current

T = 25°C

T = +125°C

I

, I

−

5.0

500

mA

J

DRM RRM

(V = Rated V

, V

; Gate Open)

D

DRM RRM

J

ON CHARACTERISTICS

Peak On−State Voltage

V

TM

−

1.56

V

(I = "1.4 A Peak; Pulse Width v 2.0 ms, Duty Cycle v 2.0%)

TM

Gate Trigger Current (Continuous dc)

Z0103MN

Z0107MN

Z0109MN

I

mA

GT

(V = 12 Vdc, R = 30 Ohms)

D

L

MT2(+), G(+)

0.15

0.25

−

3.0

5.0

MT2(+), G(−)

MT2(−), G(−)

MT2(−), G(+)

Gate Trigger Current (Continuous dc)

mA

GT

(V = 12 Vdc, R = 30 Ohms)

D

L

MT2(+), G(+)

0.15

0.25

−

5.0

7.0

MT2(+), G(−)

MT2(−), G(−)

MT2(−), G(+)

Gate Trigger Current (Continuous dc)

(V = 12 Vdc, R = 30 Ohms)

D

L

MT2(+), G(+)

0.15

0.25

−

10

MT2(+), G(−)

MT2(−), G(−)

MT2(−), G(+)

Latching Current (V = 12 V, I = 1.2 x I

MT2(+), G(+) All Types

MT2(+), G(−) All Types

MT2(−), G(−) All Types

MT2(−), G(+) All Types

)

GT

)

GT

)

GT

Z0103MN

Z0107MN

Z0109MN

I

L

I

L

I

L

mA

D

G

−

7.0

15

7.0

Latching Current (V = 12 V, I = 1.2 x I

D

G

MT2(+), G(+) All Types

−

10

20

10

MT2(+), G(−) All Types

MT2(−), G(−) All Types

MT2(−), G(+) All Types

Latching Current (V = 12 V, I = 1.2 x I

D

G

MT2(+), G(+) All Types

−

15

25

15

MT2(+), G(−) All Types

MT2(−), G(−) All Types

MT2(−), G(+) All Types

Gate Trigger Voltage (Continuous dc) (V = 12 Vdc, R = 30 Ohms)

V

−

1.3

V

D

L

GT

Gate Non−Trigger Voltage (V = 12 V, R = 30 Ohms, T = 125°C)

V

GD

0.2

−

D

L

J

All Four Quadrants

Holding Current

D

(Z0103MA)

(Z0107MA, Z0109MA)

I

H

−

7.0

10

mA

(V = 12 Vdc, Initiating Current = 50 mA, Gate Open)

DYNAMIC CHARACTERISTICS

Rate of Change of Commutating Current

di/dt(c)

dv/dt

1.6

−

A/ms

(V = 400 V, I = 0.84 A, Commutating dv/dt = 1.5 V/ms, Gate Open,

D

TM

T = 110°C, f = 250 Hz, with Snubber)

J

Critical Rate of Rise of Off−State Voltage (V = 67% Rated V

, Exponential

DRM

V/ms

D

Waveform, Gate Open, T = 110°C)

Z0103MN

Z0107MN

Z0109MN

10

20

50

30

60

75

−

J

Repetitive Critical Rate of Rise of On−State Current, T = 125°C

di/dt

−

20

A/ms

J

Pulse Width = 20 ms, IPKmax = 15 A, diG/dt = 1 A/ms, f = 60 Hz

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2

Z0103MN, Z0107MN, Z0109MN

Voltage Current Characteristic of Triacs

(Bidirectional Device)

+ Current

Quadrant 1

MainTerminal 2 +

Symbol

Parameter

V

TM

V

Peak Repetitive Forward Off State Voltage

Peak Forward Blocking Current

DRM

on state

I

H

I

at V

RRM

V

Peak Repetitive Reverse Off State Voltage

Peak Reverse Blocking Current

RRM

I

V

Maximum On State Voltage

Holding Current

+ Voltage

DRM

off state

TM

I

H

I

at V

DRM

I

H

Quadrant 3

MainTerminal 2 −

V

TM

Quadrant Definitions for a Triac

MT2 POSITIVE

(Positive Half Cycle)

+

(+) MT2

Quadrant II

Quadrant I

(−) I

(+) I

GT

GATE

MT1

REF

I

−

+ I

GT

(−) MT2

Quadrant III

Quadrant IV

(+) I

(−) I

GT

GATE

MT1

REF

MT1

REF

−

MT2 NEGATIVE

(Negative Half Cycle)

All polarities are referenced to MT1.

With in−phase signals (using standard AC lines) quadrants I and III are used.

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3

Z0103MN, Z0107MN, Z0109MN

0.15

3.8

0.079

2.0

0.244

6.2

0.091

2.3

0.091

2.3

0.079

2.0

inches

mm

BOARD MOUNTED VERTICALLY IN CINCH 8840 EDGE CONNECTOR.

BOARD THICKNESS = 65 MIL., FOIL THICKNESS = 2.5 MIL.

MATERIAL: G10 FIBERGLASS BASE EPOXY

0.059 0.059 0.059

1.5

0.984

25.0

0.096

2.44

0.096

2.44

0.096

2.44

0.059

1.5

0.059

1.5

0.472

12.0

Figure 1. PCB for Thermal Impedance and Power Testing of SOT-223

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4

Z0103MN, Z0107MN, Z0109MN

10

1.0

160

150

140

130

120

110

100

90

L

TYPICAL

MAXIMUM

DEVICE MOUNTED ON

2

L

FIGURE 1 AREA = L

PCB WITH TAB AREA

4

AS SHOWN

1

2

3

80

0.1

70

TYPICAL AT T = 110°C

60

J

MINIMUM

FOOTPRINT = 0.076 cm

MAX AT T = 110°C

50

J

2

MAX AT T = 25°C

J

40

0.01

30

0

1.0

2.0

3.0

4.0

5.0

0

2.0

4.0

6.0

2

8.0

10

v , INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS)

T

FOIL AREA (cm )

Figure 2. On-State Characteristics

Figure 3. Junction to Ambient Thermal

Resistance versus Copper Tab Area

110

100

90

80

70

60

50

40

30

20

110

100

90

80

70

60

50

40

30

20

α

30°

60°

30°

60°

α = CONDUCTION

ANGLE

90°

dc

α = 180°

120°

2

1.0 cm FOIL AREA

50 OR 60 Hz

α

MINIMUM FOOTPRINT

50 OR 60 Hz

α

α = CONDUCTION

ANGLE

0.4

0.5

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0

0.1

0.2

0.3

I

, RMS ON‐STATE CURRENT (AMPS)

I

T(RMS)

, RMS ON‐STATE CURRENT (AMPS)

T(RMS)

Figure 4. Current Derating, Minimum Pad Size

Reference: Ambient Temperature

Figure 5. Current Derating, 1.0 cm Square Pad

Reference: Ambient Temperature

110

100

90

110

105

30°

α

30°

60°

dc

60°

90°

α = CONDUCTION

ANGLE

100

95

dc

α = 180°

80

90°

120°

70

90

85

80

α

REFERENCE:

FIGURE 1

2

4.0 cm FOIL AREA

α

60

α = CONDUCTION

ANGLE

50

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

I

, RMS ON‐STATE CURRENT (AMPS)

I

T(RMS)

, ON‐STATE CURRENT (AMPS)

T(RMS)

Figure 6. Current Derating, 2.0 cm Square Pad

Reference: Ambient Temperature

Figure 7. Current Derating

Reference: MT2 Tab

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5

Z0103MN, Z0107MN, Z0109MN

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1.0

α

α = CONDUCTION

ANGLE

120°

0.1

30°

α = 180°

dc

60°

90°

0.01

0.0001

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.001

0.01

0.1

1.0

10

100

I

, RMS ON‐STATE CURRENT (AMPS)

t, TIME (SECONDS)

T(RMS)

Figure 8. Power Dissipation

Figure 9. Thermal Response, Device

Mounted on Figure 1 Printed Circuit Board

L

1N4007

200 V

RMS

ADJUST FOR

, 60 Hz V

MEASURE

I

R

S

I

TM

AC

CHARGE

CONTROL

-

+

TRIGGER

200 V

CHARGE

C

ADJUST FOR

dv/dt

S

(c)

MT2

51 W

G

1N914

MT1

NON‐POLAR

C

L

Note: Component values are for verification of rated (dv/dt) . See AN1048 for additional information.

c

Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Voltage (dv/dt)_c

10

60 Hz

180 Hz

60°

80°

400 Hz

300 Hz

110°

I

TM

100°

V

DRM

= 200 V

t

w

1

2 t

f =

6fꢀI

w

TM

1000

V

DRM

(dińdt) ꢀ +ꢀ

c

1.0

60

1.0

10

70

80

90

100

110

di/dt , RATE OF CHANGE OF COMMUTATING CURRENT (A/mS)

c

T , JUNCTION TEMPERATURE (°C)

J

Figure 11. Typical Commutating dv/dt versus

Current Crossing Rate and Junction Temperature

Figure 12. Typical Commutating dv/dt versus

Junction Temperature at 0.8 Amps RMS

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6

Z0103MN, Z0107MN, Z0109MN

60

50

40

30

20

10

600 V

I

GT3

pk

T = 110°C

J

MAIN TERMINAL #2

POSITIVE

I

GT2

I

GT4

I

GT1

1.0

MAIN TERMINAL #1

POSITIVE

0.1

-ꢀ40

10

100

1000

10,000

-ꢀ20

0

20

40

60

80

100

R , GATE - MAIN TERMINAL 1 RESISTANCE (OHMS)

G

T , JUNCTION TEMPERATURE (°C)

J

Figure 13. Exponential Static dv/dt versus

Figure 14. Typical Gate Trigger Current Variation

Gate − Main Terminal 1 Resistance

6.0

5.0

4.0

3.0

2.0

1.0

0

1.1

V

GT3

V

GT4

MAIN TERMINAL #2

POSITIVE

V

GT2

V

GT1

MAIN TERMINAL #1

POSITIVE

0.3

-ꢀ40

-ꢀ20

0

20

40

60

80

100

-ꢀ40

-ꢀ20

0

20

40

60

80

100

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 15. Typical Holding Current Variation

Figure 16. Gate Trigger Voltage Variation

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7

Z0103MN, Z0107MN, Z0109MN

PACKAGE DIMENSIONS

SOT−223 (TO−261)

CASE 318E−04

ISSUE L

NOTES:

ꢁꢂ1. DIMENSIONING AND TOLERANCING PER ANSI

D

Y14.5M, 1982.

ꢁꢂ2. CONTROLLING DIMENSION: INCH.

b1

MILLIMETERS

INCHES

NOM

0.064

0.002

0.030

0.121

0.012

0.256

0.138

0.091

0.037

0.069

0.276

−

DIM

A

A1

b

b1

c

D

E

e

e1

L1

MIN

1.50

0.02

0.60

2.90

0.24

6.30

3.30

2.20

0.85

1.50

6.70

0°

NOM

1.63

0.06

0.75

3.06

0.29

6.50

3.50

2.30

0.94

1.75

7.00

−

MAX

1.75

0.10

0.89

3.20

0.35

6.70

3.70

2.40

1.05

2.00

7.30

10°

MIN

0.060

0.001

0.024

0.115

0.009

0.249

0.130

0.087

0.033

0.060

0.264

0°

MAX

0.068

0.004

0.035

0.126

0.014

0.263

0.145

0.094

0.041

0.078

0.287

10°

4

2

H

E

1

3

b

e1

e

H

E

q

C

q

STYLE 11:

PIN 1. MT 1

A

2. MT 2

3. GATE

4. MT 2

0.08 (0003)

A1

L1

SOLDERING FOOTPRINT*

3.8

0.15

2.0

0.079

6.3

0.248

2.3

0.091

2.3

0.091

2.0

0.079

mm

inches

1.5

0.059

ǒ

Ǔ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

For additional information, please contact your local

Sales Representative

Z0103MN/D

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8


型号：	Z0103MN
厂家：	ONSEMI
描述：	Sensitive Gate Triac Series Silicon Bidirectional Thyristors 敏感的门双向可控硅系列硅双向晶闸管栅极可控硅三端双向交流开关光电二极管 PC
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Z0103MN [ONSEMI]

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