RS2051 [ORISTER]
Novel Low Cost Green-Mode PWM Controller with Soft Start & Mode; 新型低成本绿色模式PWM控制器，软启动和模式
| 型号： | RS2051 |
| 厂家： | 
ORISTER CORPORATION |
| 描述： | Novel Low Cost Green-Mode PWM Controller with Soft Start & Mode |
| 文件： | 总13页 (文件大小：525K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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RS2051
Novel Low Cost Green-Mode PWM Controller
with Soft Start & Latch Mode
Description
The RS2051 is a highly integrated low cost current mode PWM controller, which is ideal for small power current mode of offline
AC-DC fly-back converter applications. Making use of external resistors, the IC changes the operating frequency and
automatically enters the PFM/CRM (Cycle Reset Mode) under light-load/zero-load conditions. This can minimize standby power
consumption and achieve power-saving functions. With a very low start-up current, the RS2051 could use a large value start-up
resistor (2Mohms). Built-in synchronized slope compensation enhances the stability of the system and avoids sub-harmonic
oscillation. Dynamic peak current limiting circuit minimizes output power change caused by delay time of the system over a
universal AC input range. Leading edge blanking circuit on current sense input could remove the signal glitch due to snubber
circuit diode reverse recovery and thus greatly reduces the external component count and system cost in the design. Cycle-by-
Cycle current limiting ensures safe operation even during short-circuit.
Excellent EMI performance is achieved built-in soft start with 1.2mS、soft driver and frequency jitter.
The RS2051 offers perfect protection like OVP(Over Voltage Protection)、OLP(Over Load Protection)、SCP(Short circuit
protection)、OTP、Sense Fault Protection 、LM (Latch Mode) and OCP(Over current protection). The RS2051’s output driver
is soft clamped to maximum 16.5V to protect the power MOSFET. RS2051 is offered in SOT-23-6L, SOT-8 and DIP-8 packages.
Features
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Low Cost, PWM&PFM&CRM (Cycle Reset Mode)
Low Start-up Current (about 1.5μA)
Low Operating Current (about 2.2mA)
Current Mode Operation
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SOT-23-6L、SOP8 and DIP-8 Pb-Free Packaging
Compatible with SG6848 (6849) / SG5701 / SG5848 /
LD7535 (7550) / OB2262 (2263) / OB2278（2279）
Soft Clamped GATE output voltage 16.5V
VDD over voltage protect 25.6V
Cycle-by-cycle current limiting
Sense Fault Protect ion
OTP (Over Temperature Protection)
Output SCP (Short circuit Protection)
Output OLP (Over Load Protection)
Latch mode After OLP&SCP
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Under Voltage Lockout (UVLO)
Built-in Synchronized Slope Compensation
Built-in fixed soft start with 1.2mS
Built-in Frequency jitter for better EMI Signature
Programmable PWM Frequency
Audio Noise Free Operation
Leading edge Blanking on Sense input
Constant output power limiting for universal AC input
Range
High-Voltage CMOS Process with ESD
Applications
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Switching AC/DC Adaptor
Battery Charger
Open Frame Switching Power Supply
Standby Power Supplies
Set-Top Box Power Supplies
384X Replacement
Pin Configurations
DS-RS2051-02
September, 2007
www.Orister.com
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Name
Description
GND
GND Pin
Voltage feedback pin. Output current of this pin could controls the PWM duty
cycle、OLP and SCP.
This pin is to program the switching frequency. By connecting a resistor to ground
to set the switching frequency
FB
RI
SEN
VDD
Current sense pin, connect to sense the MOSFET current
Supply voltage pin
GATE
Totem output to drive the external Power MOSFET.
Typical Application Circuit
Block Diagram
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September, 2007
www.Orister.com
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Absolute Maximum Ratings
Symbol
Parameter
Supply voltage Pin Voltage
VDD OVP maximal enter current
Input Voltage to FB Pin
Input Voltage to SEN Pin
Power Dissipation
ESD Capability, HBM Model
ESD Capability, Machine Model
Rating
40
20
-0.3 to 6V
-0.3 to 6V
300
Unit
V
mA
V
V
mW
V
VDD
IOVP
VFB
VSEN
PD
2500
250
ESD
V
20second:
SOT-23-6L
10second:
DIP-8
10second:
SOP-8
℃
220
260
Lead Temperature
(Soldering)
TL
℃
℃
230
TSTG
Storage Temperature Range
-55 to + 150
RECOMMENDED OPERATION CONDITION
Symbol
VDD
RI
TOA
PO
Parameter
VDD Supply Voltage
RI PIN Resistor Value
Min ~ Max
11~20
65~130
-20~85
0~80
Unit
V
K ohm
℃
Operation Ambient Temperature
Output Power
W
FPWM
Frequency of PWM
30~150
KHz
Electrical Characteristics (Ta=25°C unless otherwise noted, VDD = 15V.)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Supply Voltage (VDD Pin)
IST
Startup Current
1.5
3.2
2.2
1.65
12.8
7.8
μA
mA
mA
mA
V
VFB=0V
VFB=3V
VFB=Open
ISS
Operating Current
VDDON
Turn-on Threshold Voltage
VDDOFF Turn-off Threshold Voltage
VDCLAMP VDD Clamp Voltage
V
V
IVDD=20mA
25.6
Anti Intermission Surge
VDD Voltage
VDDAIS
12.7
V
TSS
TOFF
TRESTART
Soft start Time
Over temperature Protection
Temperature restart
1.2
130
100
mS
℃
℃
Voltage Feedback (FB Pin)
IFB
VFB
Short Circuit Current
Open Loop Voltage
VFB=0V
VFB=Open
1.57
4.6
mA
V
IFB_0D
IPFM
ICRM
VPFM
VCRM
Zero Duty Cycle FB current
1.47
1.37
1.45
0.51
0.30
152
4.2
mA
mA
mA
V
V
uA
V
Enter PFM&PWM, FB current
Enter CRM, FB current
PFM Threshold VFB
Enter CRM Threshold VFB
IOLP&SCP Enter OLP&SCP FB current
VOLP&SCP Enter OLP&SCP FB voltage
TOLP&SCP OLP&SCP min. delay Time
RI=100K
33
50
mS
Current Sensing (SEN Pin)
VTH_L
VTH_H
TPD
RCS
VSCP
TSCP
Minimum Voltage Lever
Maximum Voltage Lever
Delay to Output
Input Impedance
Sense short protect voltage
0.65
0.85
150
50
177
1.2
V
V
ns
KΩ
mV
mS
Sen. short protect Delay Time
Oscillator (RI Pin)
FOSC
Normal Frequency
RI=100Kohm
55
60
65
KHz
DS-RS2051-02
September, 2007
www.Orister.com
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FPFM
PFM Frequency
RI=100Kohm
RI=100Kohm
RI=100Kohm
-30-85℃
22
77
14
5
KHZ
%
%
%
nS
%
DCMAX_W Maximum Duty Cycle PWM
DCMAX_F Maximum Duty Cycle PFM
ΔFTEMP
TBLANK
FJITTER
Frequency Temp. Stability
Leading-Edge Blanking Time
Frequency jitter
300
RI=100Kohm
-4
4
GATE Drive Output (GATE Pin)
VOL
VOH
TR1
TF1
TR2
TF2
TR3
TF3
TR4
TF4
Output Low Level
Output High Level
Rising Time
Falling Time
Rising Time
Falling Time
Rising Time
Falling Time
Rising Time
VDD=15V, IO=20mA
VDD=15V, IO=20mA
CL=500pF
0.8
V
V
9
123
71
ns
ns
ns
ns
ns
ns
ns
ns
V
CL=500pF
CL=1000pF
CL=1000pF
CL=1500pF
CL=1500pF
CL=2000pF
CL=2000pF
VDD=20V
248
116
343
153
508
209
16.5
Falling Time
VGCLAMP Output Clamp Voltage
Notice: The drive current of GATE pin is a variable value, which is decided by
I = K(VVDD −VGATE − 2.8)2 (Among these, K is a invariable coefficient，VGATE is the voltage of GATE pin, VVDD is
the voltage of VDD pin)；So the higher the VDD voltage is and the lower the output voltage is, the bigger the drive
transient current is. When the GATE voltage is 0V and the VDD voltage is 13V, the output drive current would over
120mA. The output driver current would decrease with increasing of the GATE voltage.
DS-RS2051-02
September, 2007
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OPERATION DESCRIPTION
Current Mode
Compared to voltage mode control, current mode control has a current feedback loop. When the voltage of the Sense resistor
peak current of the primary winding reaches the internal setting value VTH, the register resets and the power MOSFET cuts off.
So, to detect and modulate the peak current cycle-by-cycle could control the output of the power supply. The current feedback
has a good linear modulation rate and a fast input and output dynamic impact, and avoid the pole that the output filter
inductance brings and the two-class system descends to the one-class. So it widens the frequency range and optimizes
overload protection and short circuit protection.
Startup Current and Under Voltage Lockout
The startup current of RS2051 is set to be very low so that a large value startup resistor can be used to minimize the power loss.
For AC to DC adaptor with universal input range design, a 2 MΩ, 1/8 W startup resistor and a 10uF/25V VDD hold capacitor
could be used.
The turn-on and turn-off threshold of the RS2051 is designed to 12.8V/7.8V. During startup, the hold-up capacitor must be
charge to 12.8V through the startup resistor. The hysteresis is implemented to prevent the shutdown from the voltage dip during
startup.
Internal Bias and OSC Operation
A resistor connected between RI pin and GND pin sets the internal constant current source to charge or discharge the internal
fixed capacitor. The charge time and discharge time determines the internal clock speed and the switching frequency.
Increasing the resistance will reduce the value of the input current and reduce the switching frequency. The relationship
between RI and PWM switching frequency follows the below equation within the RI allowed range.
6000
FOSC
=
(kHz)
RI(KΩ)
For example, a 100kΩ resistor RI could generate a 13uA constant current and a 60kHz PWM switching frequency.
The suggested operating frequency range of RS2051 is within 30KHz to 150KHz.
Green Power Operation
The power dissipation of switching mode power supply is very important in zero load or light load condition. The major
dissipation results from conduction loss、switching loss and consume of the control circuit. However, all of them relates to the
switching frequency. There are many difference topologies has been implemented in different chip. The basic operation theory
of all these approaches intends to reduce the switching frequency under light-load or no-load condition.
The RS2051`s green power function adapts PWM、PFM and CRM combining modulation. When RI resistor is 100kΩ, the
PWM frequency is 60kHz in medium or heavy load operation. Through modifying the pulse width, The RS2051 could control
output voltage. The current of FB pin increases when the load is in light condition and the internal mode controller enters
PFM&PWM when the feedback current is over 1.37mA. The operation frequency of oscillator is to descend gradually. When the
feedback current is over 1.43mA, the frequency of oscillator is invariable, namely 22kHz.
To decrease the standby consumption of the power supply, Chip-Rail introduces the Cycle Reset Mode technology (CRM). If the
feedback current is over 1.45mA, mode controller of the RS2051 would reset internal register all the time and cut off the GATE
pin. While the output voltage is lower than the set value, the register would be set, the GATE pin operate again. So the
frequency of the internal OSC is invariable, the register would reset some pulses so that the practical frequency is decreased at
the GATE pin.
RS2051 Green-Power Function
DS-RS2051-02
September, 2007
www.Orister.com
Page No. : 6/13
Internal Synchronized Slop Compensation
Although there are more advantages of the current mode control than conventional voltage mode control, there are still several
drawbacks of peak-sensing current-mode converter, especially the open loop instability when it operates in higher than 50% of
the duty-cycle. To solve this problem, the RS2051 is introduced an internal slope compensation adding voltage ramp to the
current sense input voltage for PWM generation. It improves the close loop stability greatly at CCM, prevents the sub-harmonic
oscillation and thus reduces the output ripple voltage.
DUTY
VSLOP = 0.33×
= 0.4389× DUTY
DUTYMAX
Slop Compensation
Current Sensing & Dynamic peak limiting
The current flowing by the power MOSFET comes into being a voltage VSENSE on the Sense pin cycle-by-cycle, which compares
to the internal reference voltage, and controls the reverse of the internal register, limits the peak current IMAX of the primary of
1
the transformer. The transformer energy is E = × L× IMAX 2 . So adjusting the RSENSE can set the maximal output power of
2
VIN
the power supple. The current flowing by the power MOSFET has an extra value ( ΔI =
×TD ) due to the system delay
LP
time that is from detecting the current through the Sense pin to power MOSFET off in the RS2051 (Among these, VIN is the
primary winding voltage of the transformer and LP is the primary wind inductance). VIN ranges from 85VAC to 264VAC. To
guarantee the output power is a constant for universal input AC voltage, there is a dynamic peak limit circuit to compensate the
system delay T that the system delay brings on.
0.65V
IPEAKMAX
IPEAKMAX
=
(VIN = 264V )
(VIN = 85V )
RSENSE
0.85V
RSENSE
=
Soft Start
The RS2051 features an internal soft start during the initial power on. As soon as VDD reaches ON, the voltage on the internal
fixed capacitor is gradually increased from zero up to the maximum internal clamping level. The time of the soft start is fixed
about 1.2mS for the constant charge current and the fixed capacitor.
Frequency Jitter
The frequency jittering is introduced in the RS2051. As following figure, the internal oscillation frequency is modulated by itself.
A whole surge cycle includes 8 pulses and the jittering ranges from -4% to +4%. Thus, the function could minimize the
electromagnetic interferer from the power supply module.
Frequency Jitter
DS-RS2051-02
September, 2007
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OLP&SCP
To protect the circuit from being damaged under the over load or short circuit condition, a smart OLP&SCP function is
implemented in the RS2051. When short circuit or over load occurs in the output end, the feedback cycle would enhance the
voltage of FB pin, while the voltage is over 4.2V or the current from FB is below 152uA, the internal detective circuit would send
a signal to shut down the GATE and pull down the VDD voltage, then the circuit is restart. To avoid the wrong operation when
circuit starts, the delay time is set. When the RI resistance is 100Kohm, the delay time TOLP&SCP is between 33mS and 50mS.
The relationship between RI and TOLP&SCP follows the below equation.
RI × 2
6×103
RI ×3
6×103
(mS) < TOLP&SCP
<
(mS)
Over Temperature Protection
The RS2051 has a built-in temperature sensing circuit to shut down PWM output once the junction temperature exceeds 130°C.
While PWM output is shut down, VDD voltage will gradually drop to the UVLO voltage, and VDD voltage will gradually increase
again. If the junction temperature is still higher than 130°C, the PWM controller will be shut down again. This situation will
continue until the temperature drops below 100°C. The PWM output will then be turned back. The temperature hysteresis
window for the OTP circuit is 30°C.
Sense Fault Detect
Changing the resistance of Sense pin could limit the maximal peak current of power MOSFET. If the Sense pin is short circuit to
the ground and the RS2051 is overload, the power MOSFET and transformer is easy to be shattered. So, the short circuit
protection is built in the RS2051. Every time to start up, the circuit would detect the voltage of the Sense pin when the start
signal is send. If the voltage keeps lower than 177mV, the circuit would be cut off and restart in 1.2mS. But, when the switch
power is cut off, there could always be a big noise on the ground, so to achieve this function, it is strongly suggested that the
board on the ground of the sense pin must be attention.
Anti Intermission Surge
When the power supplies change the heavy load to light load immediately, there could be tow phenomena caused by system
delay. They are output voltage overshot and intermission surge. To avoid it, the anti intermission surge is built in the RS2051. If
it occurs, the FB current is to increase rapidly, the GATE would be cut off for a while, VDD pin voltage descends gradually.
When VDD reaches 12.7V, the GATE pin would operate again, which the frequency is 22KHz and the max. Duty cycle is 14%.
Leading-edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the Sense pin, which would disturb the
internal signal from the sampling of the RSENSE. There is a 300nS leading edge blanking time built in to avoid the effect of the
turn-on spike, and the power MOSFET cannot be switched off during the moment. So that the conventional external RC filtering
on sense input is no longer required.
Over Voltage Protection (OVP)
There is a 25.6V over-voltage protection circuit in the RS2051 to improve the credibility and extend the life of the chip. When the
VDD voltage is over 25.6V, the GATE pin is to shutdown immediately and the VDD voltage is to descend rapidly.
DS-RS2051-02
September, 2007
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Latch Mode
In some applications, latch operation for SCP&OLP may be necessary. The RS2051 offer this function. When the output is OLP
or SCP, the RS2051 could cut off GATE output and pull down VDD voltage immediately, and enter Latch Mode. To restart the
power supply, it is necessary to disconnect the AC line voltage of the power supply.
GATE Driver & Soft Clamped
The RS2051’ output designs a totem pole to drive a periphery power MOSFET. The dead time is introduced to minimize the
transfixion current during the output operating. The novel soft clamp technology is introduced to protect the periphery power
MOSFET from breaking down and current saturation of the Zener.
DS-RS2051-02
September, 2007
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PACKAGE DEMENSIONS
DIP-8L
Dimensions
Millimeters
Typ.
Inches
Typ.
Symbol
Min.
Max.
Min.
Max.
A
5.334
0.210
A1
A2
b
0.381
3.175
0.015
0.125
3.302
1.524
0.457
9.271
7.620
6.350
2.540
3.302
9.017
7˚
3.429
0.130
0.060
0.018
0.365
0.300
0.250
0.100
0.130
0.355
7˚
0.135
b1
D
9.017
6.223
10.160
6.477
0.355
0.245
0.400
0.255
E
E1
e
L
2.921
8.509
0˚
3.810
9.525
15˚
0.115
0.335
0˚
0.150
0.375
15˚
eB
θ˚
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SOP-8L
Dimensions
Millimeters
Typ.
Inches
Typ.
Symbol
Min.
1.346
0.101
Max.
1.752
0.254
Min.
0.053
0.004
Max.
0.069
0.010
A
A1
b
0.406
0.203
0.016
0.008
c
D
E
e
4.648
3.810
1.016
4.978
3.987
1.524
0.183
0.150
0.040
0.196
0.157
0.060
1.270
0.050
F
0.381X45
0.015X45
H
L
5.791
0.406
0°
6.197
1.270
8°
0.228
0.016
0°
0.244
0.050
8°
θ˚
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September, 2007
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Page No. : 11/13
SOT-23-6L
Dimensions
Millimeters
Max.
Inches
Symbol
Min.
0.700
0.000
1.397
0.300
2.591
2.692
0.838
0.080
0.300
Min.
0.028
0.000
0.055
0.012
0.102
0.106
0.033
0.003
0.012
Max.
0.039
0.004
0.071
0.022
0.118
0.122
0.041
0.010
0.024
A
A1
B
1.000
0.100
1.803
0.559
3.000
3.099
1.041
0.254
0.610
b
C
D
e
H
L
Ordering Information
PART NUMBER
RS2051S
PIN-PACKAGE
SOP-8L
RS2051P
DIP-8L
RS2051N
SOT-23-6L
DS-RS2051-02
September, 2007
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Page No. : 12/13
Soldering Methods for Orister’s Products
1. Storage environment: Temperature=10oC~35oC Humidity=65%±15%
2. Reflow soldering of surface-mount devices
Figure 1: Temperature profile
t
P
Critical Zone
to T
TP
T
L
P
Ramp-up
TL
t
L
Tsmax
Tsmin
t
S
Preheat
Ramp-down
25
t 25oC to Peak
Time
Profile Feature
Average ramp-up rate (TL to TP)
Preheat
Sn-Pb Eutectic Assembly
Pb-Free Assembly
<3oC/sec
<3oC/sec
- Temperature Min (Tsmin
)
100oC
150oC
150oC
200oC
- Temperature Max (Tsmax
- Time (min to max) (ts)
Tsmax to TL
)
60~120 sec
60~180 sec
- Ramp-up Rate
<3oC/sec
<3oC/sec
Time maintained above:
- Temperature (TL)
- Time (tL)
183oC
217oC
60~150 sec
240oC +0/-5oC
60~150 sec
260oC +0/-5oC
Peak Temperature (TP)
Time within 5oC of actual Peak
10~30 sec
20~40 sec
Temperature (tP)
Ramp-down Rate
Time 25oC to Peak Temperature
<6oC/sec
<6oC/sec
<6 minutes
<8 minutes
3. Flow (wave) soldering (solder dipping)
Products
Pb devices.
Peak temperature
245oC ±5oC
260oC +0/-5oC
Dipping time
5sec ±1sec
5sec ±1sec
Pb-Free devices.
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September, 2007
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Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of Orister Corporation.
• Orister Corporation reserves the right to make changes to its products without notice.
• Orister Corporation products are not warranted to be suitable for use in Life-Support Applications, or systems.
• Orister Corporation assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
DS-RS2051-02
September, 2007
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