AN78M05R [PANASONIC]
Positive Output Voltage Regulators with Reset pin 1A/500mA Type; 正输出电压稳压器,带有复位引脚1A / 500毫安类型型号: | AN78M05R |
厂家: | PANASONIC |
描述: | Positive Output Voltage Regulators with Reset pin 1A/500mA Type |
文件: | 总6页 (文件大小:55K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AN7800R/AN78M00R Series
Positive Output Voltage Regulators with
Reset pin (1A/500mA Type)
■ Overview
Unit:mm
+0.5
– 0.1
The AN7800R and the AN78M00R series are the fixed
positive output voltage regulators with reset pin. Stabi-
lized fixed output voltage is obtained from unstable DC
input voltage without using any external components.
Three types of output voltage, 5V, 9V and 12V, are avail-
able for the AN7800R series, and four types, 5V, 8V, 9V
9.6
ø 3.1
3–1.0
1.8
and 12V, are available for the AN78M00R series. They
can be used in power circuits with current capacitance
1A/500mA. ON/OFF of output voltage can be controlled
by the reset pin.
0.7±0.2
0.5±0.1
1.5 1.3
2.32.3 2.3
■Features
4-pin SIL Plastic Package with Fin (SSIP004-P-0000)
• No external components
• Maximum output current :1A (AN7800R)
500mA (AN78M00R)
• Output voltage :5V, 9V, 12V (AN7800R)
:8V (AN78M08R)
• Short-circuit current limiting built-in
• Thermal overload protection built-in
• Output transistor safe area compensation
• ON/OFF of output voltage can be controlled by reset
pin.
■Block Diagram
Input
1
Pass Tr
Q1
Current
Source
Current
Limiter
RSC
3
Output
Reset
4
Voltage
Reference
+
Starter
Thermal
Protection
R2
R1
Error Amp.
–
2
Common
■ Absolute Maximum Ratings (Ta=25˚C)
Parameter
Symbol
Rating
Unit
V
Input voltage
VI
PD
35
1
*
10
Power dissipation
W
Operating ambient temperature
Storage temperature
Topr
Tstg
–20 to + 80
˚C
˚C
–55 to + 150
*
1
Follow the derating curve. When Tj exceeds 150˚C, the internal circuit cuts off the output.
■ Electrical Characteristics (Ta=25˚C)
AN7800R Series
AN7805R (1A, 5V Type)
·
Parameter
Output voltage
Symbol
Condition
min
4.8
4.75
typ
max
5.2
Unit
VO
VO
Tj=25˚C
VI=8 to 20V, IO=5mA to 1A,
<15W
5
V
Output voltage tolerance
Line regulation
5.25
V
Tj=0 to 125˚C, PD
=
VI=7.5 to 25V, Tj=25˚C
VI=8 to 12V, Tj=25˚C
IO=5mA to 1.5A, Tj=25˚C
IO=250 to 750mA, Tj=25˚C
Tj=25˚C
3
1
100
50
mV
mV
mV
mV
mA
mA
mA
µV
REGIN
REGL
15
5
100
50
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
3.9
8
Bias current
VI=7.5 to 25V, Tj=25˚C
IO=5mA to 1A, Tj=25˚C
f=10Hz to 100kHz
VI=8 to 18V, IO=100mA, f=120Hz
IO=1A, Tj=25˚C
1.3
0.5
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
40
RR
62
dB
Ripple rejection ratio
VDIF (min.)
ZO
2
17
V
Minimum input/output voltage difference
Output impedance
f=1kHz
mΩ
mA
A
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
VI=35V, Tj=25˚C
Tj=25˚C
700
2
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.3
mV/˚C
V
1
1
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=10V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
■ Electrical Characteristics (Ta=25˚C)
AN7809R (1A, 9V Type)
·
Parameter
Output voltage
Symbol
Condition
min
typ
max
9.35
Unit
VO
VO
Tj=25˚C
VI=12 to 24V, IO=5mA to 1A,
8.65
9
V
Output voltage tolerance
Line regulation
8.55
9.45
V
<
Tj=0 to 125˚C, PD 15W
=
VI=11.5 to 26V, Tj=25˚C
VI=12 to 18V, Tj=25˚C
IO=5mA to 1.5A, Tj=25˚C
IO=250 to 750mA, Tj=25˚C
Tj=25˚C
7
2
180
90
180
90
8
mV
mV
mV
mV
mA
mA
mA
µV
dB
REGIN
REGL
12
4
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
3.9
Bias current
VI=11.5 to 26V, Tj=25˚C
IO=5mA to 1A, Tj=25˚C
f=10Hz to 100kHz
VI=12 to 22V, IO=100mA, f=120Hz
IO=1A, Tj=25˚C
1
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
0.5
57
RR
56
Ripple rejection ratio
VDIF (min.)
2
16
V
Minimum input/output voltage difference
Output impedance
mΩ
ZO
f=1kHz
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
VI=26V, Tj=25˚C
700
2
mA
A
Output short circuit current
Peak output current
Tj=25˚C
mV/˚C
V
Output voltage temperature coefficient
Output voltage at reset
Reset input current
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.5
1
1
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=15V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
AN7812R (1A, 12V Type)
·
Parameter
Output voltage
Symbol
VO
Condition
min
typ
12
max
12.5
Unit
Tj=25˚C
VI=15 to 27V, IO=5mA to 1A,
11.5
V
Output voltage tolerance
Line regulation
VO
11.4
12.6
V
<
Tj=0 to 125˚C, PD 15W
=
VI=14.5 to 30V, Tj=25˚C
VI=16 to 22V, Tj=25˚C
IO=5mA to 1.5A, Tj=25˚C
IO=250 to 750mA, Tj=25˚C
Tj=25˚C
10
3
240
120
240
120
8
mV
mV
mV
mV
mA
mA
mA
µV
dB
REGIN
12
4
REGL
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
4
Bias current
VI=14.5 to 30V, Tj=25˚C
IO=5mA to 1A, Tj=25˚C
f=10Hz to 100kHz
VI=15 to 25V, IO=100mA, f=120Hz
IO=1A, Tj=25˚C
1
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
0.5
75
RR
55
Ripple rejection ratio
VDIF (min.)
2
18
V
Minimum input/output voltage difference
Output impedance
mΩ
ZO
f=1kHz
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
VI=35V, Tj=25˚C
700
2
mA
A
Output short circuit current
Peak output current
Tj=25˚C
mV/˚C
V
Output voltage temperature coefficient
Output voltage at reset
Reset input current
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.8
1
1
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=19V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
■ Electrical Characteristics (Ta=25˚C)
AN78M00R Series
AN78M05R (500mA, 5V Type)
·
Parameter
Output voltage
Symbol
Condition
min
4.8
4.75
typ
max
5.2
Unit
Tj=25˚C
VI=7.5 to 20V, IO=5 to 350mA,
VO
VO
5
V
Output voltage tolerance
Line regulation
5.25
V
<
Tj=0 to 125˚C, PD 15W
=
VI=7.5 to 25V, Tj=25˚C
VI=8 to 25V, Tj=25˚C
IO=5 to 500mA, Tj=25˚C
IO=5 to 200mA, Tj=25˚C
Tj=25˚C
3
1
100
50
mV
mV
mV
mV
mA
mA
mA
µV
REGIN
REGL
20
10
100
50
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
4.6
6
Bias current
VI=8 to 25V, Tj=25˚C
IO=5 to 350mA, Tj=25˚C
f=10Hz to 100kHz
VI=8 to 18V, IO=100mA, f=120Hz
IO=500mA, Tj=25˚C
VI=35V, Tj=25˚C
0.8
0.5
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
40
RR
62
dB
Ripple rejection ratio
VDIF (min.)
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
2
300
Minimum input/output voltage difference
Output short circuit current
Peak output current
V
mA
mA
mV/˚C
V
Tj=25˚C
700
Output voltage temperature coefficient
Output voltage at reset
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.5
1
1
Reset input current
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=10V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
AN78M08R (500mA, 8V Type)
·
Parameter
Output voltage
Symbol
VO
Condition
min
7.7
7.6
typ
max
8.3
Unit
Tj=25˚C
VI=10.5 to 23V, IO=5 to 350mA,
8
V
Output voltage tolerance
Line regulation
VO
8.4
V
<
Tj=0 to 125˚C, PD 15W
=
VI=10.5 to 25V, Tj=25˚C
VI=11 to 25V, Tj=25˚C
IO=5 to 500mA, Tj=25˚C
IO=5 to 200mA, Tj=25˚C
Tj=25˚C
6
2
100
50
mV
mV
mV
mV
mA
mA
mA
µV
REGIN
25
10
160
80
REGL
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
4.1
6
Bias current
VI=10.5 to 25V, Tj=25˚C
IO=5 to 350mA, Tj=25˚C
f=10Hz to 100kHz
VI=11.5 to 21.5V, IO=100mA, f=120Hz
IO=500mA, Tj=25˚C
VI=35V, Tj=25˚C
0.8
0.5
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
52
RR
56
dB
Ripple rejection ratio
VDIF (min.)
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
2
300
V
Minimum input/output voltage difference
Output short circuit current
Peak output current
mA
A
Tj=25˚C
0.7
Output voltage temperature coefficient
Output voltage at reset
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.5
mV/˚C
V
1
1
Reset input current
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=14V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
■ Electrical Characteristics (Ta=25˚C)
AN78M09R (500mA, 9V Type)
·
Parameter
Output voltage
Symbol
Condition
min
typ
max
9.35
Unit
VO
VO
8.65
9
V
Tj=25˚C
VI=11.5 to 24V, IO=5 to 350mA,
Output voltage tolerance
Line regulation
8.55
9.45
V
<
Tj=0 to 125˚C, PD 15W
=
VI=11.5 to 25V, Tj=25˚C
VI=12 to 25V, Tj=25˚C
IO=5 to 500mA, Tj=25˚C
IO=5 to 200mA, Tj=25˚C
Tj=25˚C
7
2
100
50
mV
mV
mV
mV
mA
mA
mA
µV
REGIN
REGL
25
10
180
90
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
4.1
6.0
0.8
0.5
Bias current
VI=12 to 25V, Tj=25˚C
IO=5 to 350mA, Tj=25˚C
f=10Hz to 100kHz
VI=12 to 22V, IO=100mA, f=120Hz
IO=500mA, Tj=25˚C
VI=35V, Tj=25˚C
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
60
RR
56
dB
Ripple rejection ratio
VDIF (min.)
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
2
300
V
Minimum input/output voltage difference
Output short circuit current
Peak output current
mA
A
Tj=25˚C
0.7
Output voltage temperature coefficient
Output voltage at reset
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.5
mV/˚C
V
1
1
Reset input current
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=15V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
AN78M12R (500mA, 12V Type)
·
Parameter
Output voltage
Symbol
VO
Condition
min
typ
12
max
12.5
Unit
11.5
V
Tj=25˚C
VI=14.5 to 27V, IO=5 to 350mA,
Output voltage tolerance
Line regulation
VO
11.4
12.6
V
<
Tj=0 to 125˚C, PD 15W
=
VI=14.5 to 30V, Tj=25˚C
VI=16 to 30V, Tj=25˚C
IO=5 to 500mA, Tj=25˚C
IO=5 to 200mA, Tj=25˚C
Tj=25˚C
8
2
100
50
mV
mV
mV
mV
mA
mA
mA
µV
REGIN
25
10
4.3
240
120
6
REGL
Load regulation
Ibias
∆Ibias (IN)
∆Ibias (L)
Vno
Bias current
VI=14.5 to 30V, Tj=25˚C
IO=5 to 350mA, Tj=25˚C
f=10Hz to 100kHz
0.8
0.5
Input bias current fluctuation
Load bias current fluctuation
Output noise voltage
75
RR
VI=15 to 25V, IO=100mA, f=120Hz
IO=500mA, Tj=25˚C
VI=35V, Tj=25˚C
55
dB
Ripple rejection ratio
VDIF (min.)
IO (Short)
IO (Peak)
∆VO/Ta
VO (Reset)
II (Reset)
2
300
V
Minimum input/output voltage difference
Output short circuit current
Peak output current
mA
mA
mV/˚C
V
Tj=25˚C, VI=35V
700
Output voltage remperature coefficient
Output voltage at reset
IO=5mA, Tj=0 to 125˚C
Tj=25˚C, II (Reset)=1mA
Tj=25˚C
– 0.5
1
1
Reset input current
mA
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=19V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
■Characteristic Curve
PD –Ta
VO (Reset) – IO
II (Reset) – Tj
16
1000
800
600
400
200
0
1.0
0.8
0.6
0.4
0.2
0
(1) Infinite Heat Sink
CI=0.33µF
CO=0.1µF
Tj=25˚C
(2) 5˚C/W Heat Sink
(3) 15˚C/W Heat Sink
(4) Without Heat Sink
14
12
10
8
VI=20V
(1)
(2)
VI=10V
6
VI=30V
(3)
(4)
4
2
VI=7V
1
0
0
40
80
120
160
0.1
10
100
1000
–40
0
40
80
120
160
Ambient Temperature Ta (˚C)
Output Current IO (mA)
Junction Temperature Tj (˚C)
■Basic Regulator Circuit
*
Input
Output
For TTL, an open collector type inverter, buffer, gate etc.
can be used.
1
3
*
7406etc.
AN7800R
AN78M00R
Beware of the breakdown of TTL, as the reset pin bears voltage
higher than the output voltage VO by 1—2V.
CI is set when the input line is long.
4
CO
CI
Reset
2
CO improves the temperature response.
■Application Circuit
(1) Soft Start Circuit
(2) Several Output Reset Circuits
Output
Output
Input
1
Input
3
1
3
AN7800R
AN7800R
AN78M00R
AN78M00R
4
4
R
0.33µF
0.33µF
0.1µF
0.1µF
2
2
1kΩ
Q
C
✼Control of Output Voltage Rise Time
Input
1
3
AN7800R
AN78M00R
10
1
4
0.33µF
0.1µF
SW
R
2
1kΩ
0.1
1
10
100
Capacity C (µF)
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