PI29FCT2520ATRX [PERICOM]

Pipeline Register, 8-Bit, CMOS, PDSO24, 0.150 INCH, PLASTIC, TQSOP-24;


型号：	PI29FCT2520ATRX
厂家：	PERICOM SEMICONDUCTOR CORPORATION
描述：	Pipeline Register, 8-Bit, CMOS, PDSO24, 0.150 INCH, PLASTIC, TQSOP-24
文件：	总5页 (文件大小：53K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PI29FCT520T/2520T

PI29FCT521T

Fast CMOS Multilevel Pipeline Registers

Product Features:

Product Description:

•

PI29FCT520T and PI29FCT521T are pinout and

function compatible with IDT29FCT520/521,

QS29FCT520/521 and AMD's Am29520/521

Pericom Semiconductor’s PI29FCT series of logic circuits are

pro-duced in the Company’s advanced 0.8 micron CMOS

technology, achieving industry leading speed grades.

•

Four 8-bit high-speed registers

The PI29FCT520T/2520T and PI29FCT521T are multilevel

pipeline registers containing four 8-bit positive triggered registers

which can be configured as a dual 2-level or a single 4-level

pipeline. These products are designed for use as temporary storage

or for storage delays in pipelined systems.

Hold, Transfer, and load instructions

Dual two-level or single four-level pipeline operation

TTL input and output levels, reducing problematic

"ground bounce"

The PI29FCT521T differs from the PI29FCT520T/2520T only in

the way data is loaded into and between registers in the dual 2-level

operation. When data is entered into the first level (I = 2 or I = 1)

of the PI29FCT520T/2520T, the existing data in the first level is

moved to the second level. In the PI29FCT521T, these instructions

simply overwrite the data in the first level. Transfer of data to the

second level is achieved using the 4-level shift instruction (I = 0)

causing the first level to change. In either part, I = 3 shift

instruction puts the registers on hold.

•

High output drive

I^OL= 48 mA

•

Extremely low static power (1 mW, typ.)

•

Industrial operating temperature range: –40°C to +85°C

FCT (2xxxT) has a 25Ω series resistor.

•

Packages available:

– 24-pin 300 mil wide plastic DIP (P24)

– 24-pin 150 mil wide plastic QSOP (Q24)

– 24-pin 150 mil wide plastic TQSOP (R24)

– 24-pin 300 mil wide plastic SOIC (S24)

Device models available upon request.

Logic Block Diagram

D0–D7

MUX

I0,I1

CONTROL

OCTAL

CLK

OCTAL

S0,S1

MUX

Y0–Y7

PS2002B 12/10/96

FCT520.pm6

12/18/96, 4:44 PM

PI29FCT520/521T/2520T

MULTILEVEL PIPELINE REGISTERS

Product Pin Description

Product Pin Configuration

Pin Name

Description

VCC

Output Enable Input (Active LOW) for

3-State Output Port

CLK

Clock Input. Enter data into registers on

LOW-to-HIGH transistions

24-PIN

P24

Q24

R24

S24

I0,I1

Instruction Inputs

S0,S1

Multiplexer Select. Inputs either register

A1, A2, B1, or B2 data to be avaialbe at the

output ports

Ground

CLK

GND

VCC

Power

PI29FCT520/T2520T Data Loading

DUAL 2-LEVEL

SINGLE 4-LEVEL

I = 2

I = 1

I = 0

NOTE: I = 3 FOR HOLD

PI29FCT521T Data Loading

DUAL 2-LEVEL

SINGLE 4-LEVEL

I = 2

NOTE: I = 3 FOR HOLD

I = 1

I = 0

PS2002B 12/10/96

FCT520.pm6

12/18/96, 4:44 PM

PI29FCT520/521T/2520T

MULTILEVEL PIPELINE REGISTERS

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature ................................................................. –55°C to +125°C

Ambient Temperature with Power Applied .................................-40°C to +85°C

Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V

Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V

DC Input Voltage ......................................................................... –0.5V to +7.0V

DC Output Current ................................................................................... 120 mA

Power Dissipation ......................................................................................... 0.5W

Note:

Stresses greater than those listed under

MAXIMUM RATINGS may cause permanent

damage to the device. This is a stress rating

only and functional operation of the device at

these or any other conditions above those

indicated in the operational sections of this

specification is not implied. Exposure to

absolute maximum rating conditions for

extended periods may affect reliability.

DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5V ± 5%)

(2)

Parameters Description

Test Conditions⁽¹⁾

Min.

Typ

Max.

Units

IH OR IL

Output HIGH Voltage

= M ., V = V

= –15.0 mA

2.4

3.0

0.3

= 48 mA

0.50

IH OR IL

Output LOW Voltage

= M ., V = V

= 12 mA (25Ω series)

Input HIGH Voltage

Input LOW Voltage

Input HIGH Current

Input LOW Current

High Impedance

Guaranteed Logic HIGH Level

Guaranteed Logic LOW Level

2.0

0.8

= M

= V

µA

= GND

–1

OZH

OZL

OUT

= 2.7V

= 0.5V

Output Current

–1

–1.2

Clamp Diode Voltage

Short Circuit Current

Power Down Disable

Input Hysteresis

= M ., I = –18 mA

–0.7

–120

—

(3)

OUT

= M . , V

= GND

OUT

= 4.5V

–60

—

µA

OFF

= GND, V

100

200

Capacitance (TA = 25°C, f = 1 MHz)

Parameters⁽⁴⁾

Description

Test Conditions

VIN = 0V

Typ

Max.

Units

C^IN

Input Capacitance

Output Capacitance

COUT

VOUT = 0V

Notes:

1. For conditions show as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device

type.

2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is determined by device characterization but is not production tested.

PS2002B 12/10/96

FCT520.pm6

12/18/96, 4:44 PM

PI29FCT520/521T/2520T

MULTILEVEL PIPELINE REGISTERS

Power Supply Characteristics

Parameters Description

Test Conditions⁽¹⁾

VIN = GND or VCC

Min. Typ⁽²⁾Max. Units

I^CC

Quiescent Power

Supply Current

VCC = Max.

0.1

µA

∆ICC

I^CCD

Supply Current per

Input @ TTL HIGH

VIN = 3.4V⁽³⁾

0.5

2.0

Supply Current per

Input per MHz⁽⁴⁾

VCC = Max.,

Outputs Open

OE = GND

VIN = GND

VIN = VCC

0.15

0.25

mA/

MHz

One Input Toggling

50% Duty Cycle

I^C

Total Power Supply

Current⁽⁵⁾

VCC = Max.,

VIN = GND

VIN = VCC

1.5

2.0

3.8

3.5⁽⁵⁾

5.5⁽⁵⁾

7.3⁽⁵⁾

Outputs Open

fCP = 10 MHZ

50% Duty Cycle

OE = GND

One Bit Toggling

f^I= 5 MH

V^IN= 3.4V

VIN = GND

50% Duty Cycle

V^CC= Max.,

VIN = GND

VIN = VCC

Outputs Open

fCP = 10 MHZ

50% Duty Cycle

OE = GND

Eight Bits Toggling

f^I= 5 MHz

V^IN= 3.4V

VIN = GND

6.0

16.3⁽⁵⁾

50% Duty Cycle

Notes:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable

device.

2. Typical values are at Vcc = 5.0V, +25°C ambient.

3. Per TTL driven input (V^IN= 3.4V, control inputs only); all other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply characteristics.

5. Values for these conditions are examples of the I^CCformula. These limits are guAranteed but not tested.

6. I^C=IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)

I^CC= Quiescent Current

∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)

D^H= Duty Cycle for TTL Inputs High

N^T= Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

f^CP= Clock Frequency for Register Devices (Zero for Non-Register Devices)

f^I= Input Frequency

N^I= Number of Inputs at fI

All currents are in milliamps and all frequencies are in megahertz.

PS2002B 12/10/96

FCT520.pm6

12/18/96, 4:44 PM

PI29FCT520/521T/2520T

MULTILEVEL PIPELINE REGISTERS

PI29FCT520T/2520T Switching Characteristics over Operating Range

FCT520AT/2520AT FCT520BT/2520BT

Com. Com.

Parameters

Description

Conditions⁽¹⁾

Min

Max

Min

Max

Unit

PLH

PHL

PLH

PHL

Propagation Delay

= 50 pF

= 500Ω

2.0

14.0

2.0

7.5

CLK to Y

Propagation Delay

or S to Y

Setup Time HIGH

or LOW D to CLK

Hold Time HIGH

or LOW D to CLK

Setup Time HIGH

or LOW I or I to CLK

Hold Time HIGH

or LOW I or I to CLK

Output Enable Time

2.0

5.0

2.0

5.0

2.0

1.5

7.0

13.0

—

2.0

2.5

2.0

4.0

2.0

1.5

5.5

7.5

—

7.0

7.5

—

PZH

PZL

PHZ

PLZ

12.0

15.0

—

OE to Y

Output Disable Time⁽³⁾

OE to Yx

Clock Pulse Width⁽³⁾

HIGH or LOW

PI29FCT521T Switching Characteristics over Operating Range

FCT521AT

Com.

FCT521BT

Com.

Parameters

Description

Conditions⁽¹⁾

Min

Max

Min

Max

Unit

PLH

PHL

PLH

PHL

Propagation Delay

= 50 pF

= 500Ω

2.0

5.0

2.0

5.0

2.0

1.5

7.0

14.0

2.0

2.5

2.0

4.0

2.0

1.5

5.5

7.5

CLKto Y

Propagation Delay

or S to Y

Setup Time HIGH

or LOW D to CLK

Hold Time HIGH

or LOW D to CLK

Setup Time HIGH

or LOW I orI to CLK

Hold Time HIGH

or LOW I orI to CLK

13.0

—

7.5

—

7.0

7.5

—

PZH

PZL

PHZ

PLZ

Output Enable Time

OE to Yx

Output Disable Time

12.0

15.0

—

(3)

OE to Yx

Clock Pulse Width⁽³⁾

HIGH or LOW

Notes:

1. See test circuit and wave forms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not production tested.

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

PS2002B 12/10/96

FCT520.pm6

12/18/96, 4:44 PM

相关型号：