PI6C184-02 [PERICOM]
Precision 1-13 Clock Buffer; 1-13精密时钟缓冲器
| 型号： | PI6C184-02 |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Precision 1-13 Clock Buffer |
| 文件： | 总6页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C184-02
Precision 1-13 Clock Buffer
Features
Description
• High speed, low noise non-inverting 1-13 buffer
• Supports up to four SDRAM DIMMs
• Low skew (<250ps) between any two output clocks
The PI6C184-02 is a high-speed low-noise 1-13 non-inverting
buffer designed for SDRAM clock buffer applications.
ThisbufferisintendedtobeusedwiththePI6C104clockgenerator
for Intel Architecture for both desktop and mobile systems.
2
• I C Serial Configuration interface
At power up all SDRAM output are enabled and active. The
• Multiple V , V pins for noise reduction
2
DD
SS
I C Serial control may be used to individually activate/deactivate
• 3.3V power supply voltage
any of the 13 output drivers.
• 28-pin SSOP and SOIC packages (H, S)
Note:
2
Purchase of I C components from Pericom conveys a license to
2
use them in an I C system as defined by Philips.
Block Diagram
Pin Configuration
28-Pin
H, S
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PI6C184-02
Precision 1-13 Clock Buffer
Pin Description
Pin
Symbol
Type
Quantity
Description
2,3,6,7,10,11,
SDRAM [0.5]
SDRAM [6.11]
SDRAM [12]
BUF_IN
0
0
0
1
6
6
1
1
SDRAM Byte 0 clock output
SDRAM Byte 1 clock output
SDRAM Byte 2 clock output
Input for 1-13-buffer
18,19,22,23,26,27
12
9
2
Data pin for I C circuitry. Has a 100k
Internal pull-up resistor
14
SDATA
I/O
I/O
1
1
2
Clock pin for I C circuitry. Has a
154
SCLOCK
100k Internal pull-up resistor
1,5,13,20,24,28
4,8,16,17,21,25
V
Power
6
6
3.3V power supply for SDRAM buffer
Ground for SDRAM Buffers
DD
V
Ground
SS
PI6C184-02 I2C Address Assignment
A6 A5 A4 A3 A2 A1 A0 R/W
PI6C184 Serial Configuration Map
Byte0: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
1
1
0
1
0
0
1
0
Bit
Pin #
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Note:
11 SDRAM5 (Active/Inactive)
10
~
~
7
SDRAM4(Active/Inactive)
Reserved
Reserved
SDRAM3 (Active/Inactive)
SDRAM2 (Active/Inactive)
SDRAM1 (Active/Inactive)
SDRAM0 (Active/Inactive)
6
3
2
Inactive means outputs are held LOW and
are disabled from switching
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PI6C184-02
Precision 1-13 Clock Buffer
2-Wire I2C Control
The I C interface permits individual enable/disable of each
1
2
2
Each data transfer is initiated with a start condition and ended
with a stop condition. The first byte after a start condition is
always a 7-bit address byte followed by a read/write bit. (HIGH
= read from addressed device, LOW = write to addressed
device). If the device’s own address is detected, PI6C184-02
generates an acknowledge by pulling SDATA line LOW during
ninth clock pulse, then accepts the following data bytes until
another start or stop condition is detected.
clock output and test mode enable.
The PI6C184-02 is a slave receiver device. It can not be read
back. Sub addressing is not supported. All preceding bytes
must be sent in order to change one of the control bytes.
Every bite put on the SDATA line must be 8-bits long (MSB
first), followed by an acknowledge bit generated by the
receiving device.
During normal data transfers Sdata changes only when SCLK
is LOW. Exceptions: A HIGH to LOW transition on SDATA
while SCLK is HIGH indicates a “start” condition. A LOW to
HIGH transition on SDATA while SCLK is HIGH is a “stop”
condition and indicates the end of a data transfer cycle.
3
Following acknowledgement of the address byte (D2), two more
bytes must be sent:
1. “Command Code” byte, and
2. “Byte Count” byte.
4
5
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Byte2: Optional Register for Possible Future
Requirements (1 = enable, 0 = disable)
6
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
27
Description
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
N/A
12
Description
SDRAM11 (Active/Inactive)
SDRAM10 (Active/Inactive)
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
(Reserved)
26
SDRAM12 (Active/Inactive)
(Reserved)
7
23
N/A
N/A
N/A
N/A
N/A
N/A
22
(Reserved)
8
N/A (Reserved)
N/A (Reserved)
(Reserved)
(Reserved)
9
19
18
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
(Reserved)
10
11
12
13
14
15
(Reserved)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
Storage Temperature ................................................ –65°C to +150°C
Ambient Temperature with Power Applied ............. –0°C to +70°C
3.3V Supply Voltage to Ground Potential ............... –0.5V to +4.6V
DC Input Voltage ..................................................... –0.5V to +4.6V
Supply Current (V = +3.465V, Cload = max)
DD
Symbol
Parameter
Supply Current
Supply Current
Supply Current
Test Condition
BUF_IN = 0 MHz
Min. Typ. Max Units
I
DD
3
I
DD
BUF_IN = 66.66 MHz
BUF_IN = 100.0 MHz
230
360
mA
I
DD
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PI6C184-02
Precision 1-13 Clock Buffer
DC Operating Specifications (V = +3.3V ±5%, T = 0°C - 70°C)
DD
A
Symbol
Parameter
Test Condition
Min.
Max.
Units
Input Voltage, V
[0-1] = 3.3V± 5%
DDCORE
V
Input High Voltage
Input Low Voltage
Input Leakage Current
V
2.0
V
+0.3
IH
DD
DDCORE
V
V
IL
V
0.3
0.8
SS
I
IL
0 < V < V
DD
-5
+5
IN
V
DD
= 3.3V ± 5%
V
Output High Voltage
Output Low Voltage
I
= 1mA
2.4
OH
OH
V
V
I
= 1mA
0.4
OL
OL
C
Input Pin Capacitance
Output pins Capacitance
Pin Inductance
5
6
IN
pF
C
OUT
L
PIN
7
nH
ºC
T
Ambient Temperature
No Airflow
0
70
A
SDRAM Clock Buffer Operating Specification
Symbol
Parameter
Pull-up current
Pull-up current
Pull-down current
Pull-down current
Condition
= 2.0V
OUT
Min. Typ. Max. Units
I
V
54
OHMIN
I
V
= 3.135V
46
mA
OHMAX
OUT
I
V
= 1.0V
= 0.4V
54
OLMIN
OUT
I
V
OUT
53
OLMAX
Output rise edge rate
SDRAM only
3.3V ±5%
@04V-2.4V
t
SDRAM
SDRAM
1.5
1.5
4
4
RH
V/ns
Output fall edge rate
SDRAM only
3.3V ±5%
@2.4V-0.4V
t
FH
AC Timing
66 MHz
Min. Max.
100 MHz
Symbol
Parameter
Units
ns
Min.
Max.
tSDKP
SDRAM CLK period
15.0
5.6
5.3
1.5
1.5
1.0
1.0
1.0
1.0
45
15.5
10.0
3.3
3.1
1.5
1.5
1.0
1.0
1.0
1.0
45
10.5
tSDKH
tSDKL
SDRAM CLK high time
SDRAM CLK low time
tSDRISE
tSDFALL
tpLH
SDRAM CLK rise time
4.0
4.0
5.0
5.0
8.0
8.0
55
4.0
4.0
5.0
5.0
8.0
8.0
55
V/ns
SDRAM CLK fall time
SDRAM Buffer LH prop delay
SDRAM Buffer HL prop delay
SDRAM Buffer Enable delay
SDRAM Buffer Disable delay
tpHL
ns
tpZL,tpZH
tpLZ,tpHZ
Duty Cycle Measured at 1.5V
%
ps
SDRAM Output to
tSDSKW
250
250
Output Skew
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PI6C184-02
Precision 1-13 Clock Buffer
1
2
3
4
5
6
7
8
9
Figure 1. Clock Waveforms
Minimum and Maximum Expected Capacitive Loads
10
11
12
13
14
15
Clock
SDRAM
Notes:
Min Load Max Load Units
Notes
SDRAM DIMM
Specification
20 30 pF
1. Maximum rise/fall times are guaranteed at maximum specified load.
2. Minimum rise/fall times are guaranteed at minimum specified load.
3. Rise/fall times are specified with pure capacitive load as shown.
Testing is done with an additional 500Ω resistor in parallel.
Design Guidelines to Reduce EMI
1. Place series resistors and CI capacitors as close as possible to the respective clock pins. Typical value
for CI is 10 pF. Series resistor value can be increased to reduce EMI provided that the rise and fall
time are still within the specified values.
2. Minimize the number of “vias” of the clock traces.
3. Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing
clock traces from plane to plane (refer to rule #2).
4. Position clock signals away from signals that go to any cables or any external connectors.
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PI6C184-02
Precision 1-13 Clock Buffer
Ω
Figure 2. Design Guidelines
28-pinSSOP(H)
28
1
28-pinSOIC(S)
28
7.40
7.60
.2914
.2992
0.254
0.737
.010
.029
1
x 45˚
.6969 17.70
.7125 18.10
0.23
0.32
.0091
.0125
0-8˚
.021
.031
0.533
0.787
2.35
2.65
.0926
.1043
0.41
1.27
REF
.016
.050
.394
.419
10.00
10.65
SEATING
PLANE
0.10
0.30
.0040
.0118
.050
BSC
.013
.020
0.33
0.51
1.27
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
Ordering Information
P/N
Description
PI6C184-02H
PI6C184-02S
28-pin SSOP Package
28-pin SOIC Package
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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