PI74FET162344ETAX [PERICOM]

Low Skew Clock Driver, FCT Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO56, PLASTIC, TSSOP-56;


型号：	PI74FET162344ETAX
厂家：	PERICOM SEMICONDUCTOR CORPORATION
描述：	Low Skew Clock Driver, FCT Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO56, PLASTIC, TSSOP-56 驱动光电二极管逻辑集成电路
文件：	总6页 (文件大小：63K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PI74FCT162344T

Address/Clock Driver

PI74FCT162344T

Fast CMOS

Address/Clock Driver

Product Features

Product Description

• Ideal for address line driving and clock distribution

• Eight banks with 1:4 fanout with 3-state control

• Typical tSK(O) output skew < 500ps

• Balanced output drivers: ±24mA

• Hysteresis on all inputs

Pericom Semiconductor’s PI74FCT series of logic circuits are

produced in the Company’s advanced 0.6 micron CMOS

technology, achieving industry leading speed grades.

The PI74FCT162344T is an address/clock driver designed to

provide the ability to fanout to memory arrays. Eight banks, each

withafanoutoffour, and3-statecontrol, provideefficientaddress

distribution.Oneormorebanksmaybeusedforclockdistribution.

• Packagesavailable:

– 56-pin240-milwideplasticTSSOP(A)

– 56-pin300-milwideplasticSSOP(V)

The PI74FCT162344T has balanced output drivers. It is designed

with current limiting resistors at its outputs to control the output

edge rate resulting in lower ground bounce and undershoot. This

eliminates the need for external terminating resistors for most

interface applications.

Logic Block Diagram

OE1

OE3

B11

B51

B14

B21

B54

B61

B24

B64

OE2

OE4

B31

B71

B34

B41

B74

B81

B44

B84

PS2047B 03/22/99

PI74FCT162344T

Address/Clock Driver

Product Pin Description

Product Pin Configuration

Pin Name

OEx

Description

OE4

3-State Output Enable Inputs (Active LOW)

Inputs

Bxx

3-State Outputs

Ground

GND

VCC

B83

Power

Truth Table⁽¹⁾

Inputs

Outputs

GND

OEX

Bxx

B23

B73

56-PIN

A56

V56

Note: 1. H = High Voltage Level

L = Low Voltage Level

X = Don’t Care

GND

Z = High Impedance

B41

B51

GND

B44

B54

OE3

Capacitance (TA = 25°C, f = 1 MHz)

Parameters⁽¹⁾

Description

Test Conditions

VIN = 0V

Typ

3.5

Max.

Units

CIN

Input Capacitance

Output Capacitance

6.0

8.0

COUT

VOUT = 0V

3.5

Note:

1. This parameter is determined by device characterization but is not production tested.

PS2047B 03/22/99

PI74FCT162344T

Address/Clock Driver

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Note:

Storage Temperature ......................................................... –65°C to +150°C

Ambient Temperature with Power Applied ....................... 0°C to +70°C

Supply Voltage to Ground Potential................................. –0.5V to +7.0V

DC Input Voltage .............................................................. –0.5V to +7.0V

DC Output Current ............................................................ –60 to +120 mA

Power Dissipation .............................................................. 0.5W

Stresses greater than those listed under

MAXIMUMRATINGSmaycausepermanentdamage

tothedevice. Thisisastressratingonlyandfunctional

operationofthedeviceattheseoranyotherconditions

above those indicated in the operational sections of

this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may

affect reliability.

Operating Range

Ambient Temperature = –40°C to +85°C

Vcc = 5.0V ±10%

DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ±10%)

Parameters Description

TestConditions⁽¹⁾Min. Typ⁽²⁾Max. Units

Output HIGH Voltage VCC = Min, VIN = VIH or VIL

VOH

VOL

VIH

VIL

IIH

IOH =– 24mA

IOL =24mA

2.4

—

3.3

0.3

—

0.55

—

Output LOW Voltage

Input HIGH Voltage

Input LOW Voltage

Input HIGH Current

Input LOW Current

High Impedance

VCC = Min., VIN = VIH or VIL

Guaranteed Logic HIGH Level

Guaranteed Logic LOW Level

2.0

—

0.8

VCC = Max.

VIN = VCC (Input Pins)

—

±1

µA

IIL

VCC = Max.

VIN = GND (Input & I/O Pins)

VOUT =2.7V

—

±1

IOZH

IOZL

VIK

IODH

IODL

IOS

VCC = Max.

—

±1

Output Current

(3-State Output Pins)

VOUT =0.5V

—

±1

Clamp Diode Voltage VCC = Min., IIN = –18mA

—

–0.7

–115

115

–140

—

–1.2

–150

150

–225

–180

—

Output HIGH Current

Output LOW Current

VCC =5V,VIN =VIH orVIL,VOUT =1.5V⁽³⁾

–60

Short Circuit Current⁽⁴⁾VCC =Max.,VOUT =GND⁽⁴⁾

–80

–50

—

IOUT

Output Drive Current

Input Hysteresis

VCC = Max., VOUT = 2.5V⁽³⁾

100

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.

3. This parameter is determined by device characterization but is not production tested.

4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

PS2047B 03/22/99

PI74FCT162344T

Address/Clock Driver

Power Supply Characteristics

Parameters Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

ICC

Quiescent Power

Supply Current

VCC = Max.

VIN = GND or VCC

0.1

500

µA

∆ICC

ICCD

Supply Current per

Input @ TTL HIGH

VCC = Max.

VIN = 3.4 V⁽³⁾

0.5

1.5

Supply Current per

Input per MHz⁽⁴⁾

VCC = Max.,

Outputs Open

OEX = GND

VIN = VCC

VIN = GND

170

220

µA/

MHz

One Bit Toggling

50% Duty Cycle

Total Power Supply

Current⁽⁶⁾

VCC = Max.,

Outputs Open

fI = 10 MHZ

VIN = VCC

VIN = GND

1.7

2.7⁽⁵⁾

50% Duty Cycle

OEX = GND

One Bit Toggling

VIN = 3.4 V

VIN = GND

2.0

3.4

3.5⁽⁵⁾

4.9⁽⁵⁾

VCC = Max.,

Outputs Open

fI = 2.5 MHZ

50% Duty Cycle

OEX = GND

VIN = VCC

VIN = GND

16 Bits Toggling

VIN = 3.4 V

VIN = GND

5.4

10.9⁽⁵⁾

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 5.0 V, +25°C ambient.

3. Per TTL driven input (V^IN= 3.4 V); all other inputs at Vcc or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.

6. I^C=IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)

ICC = Quiescent Current

∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4 V)

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

fi = Input Frequency

Ni = Number of Inputs at fi

All currents are in milliamps and all frequencies are in megahertz.

PS2047B 03/22/99

PI74FCT162344T

Address/Clock Driver

Switching Characteristics over Operating Range

162344AT

Com.

Max

162344CT

Com.

162344ET

Com.

Parameters

Description

Conditions⁽¹⁾

Min

1.5

Max

4.3

Min

1.5

Max

3.8

Unit

PLH

PHL

Propagation Delay

= 50pF

1.5

4.8

6.2

5.6

to B

Output Enable Time

OE to B

Output Disable Time

OE to B

= 500Ω

PZH

PZL

1.5

5.8

5.2

1.5

5.0

4.6

PHZ

PLZ

(o)^(3,5)

(o)^(4,5)

Output Skew

—

0.5

—

0.35

0.5

—

0.25

0.3

Notes:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between outputs of the same bank and same package, switching in the same transition.

4. Skew between outputs of all banks of the same package with A1 through A8 tied together, switching in the same transition.

5. This parameter is guaranteed but not production tested.

Tests Circuits For All Outputs⁽¹⁾

Switch Position

Test

Switch

Disable LOW

EnableLOW

V^CC

7.0V

All Other Tests

Open

500Ω

DEFINITIONS:

CL = Load capacitance: includes jig and probe

capacitance.

VIN

VOUT

Pulse

Generator

D.U.T.

RT = Termination resistance: should be equal to

ZOUT of the Pulse Generator.

50pF

500Ω

PS2047B 03/22/99

PI74FCT162344T

Address/Clock Driver

SWITCHING WAVEFORMS

Propagation Delay

Output Skew – tSK1(o), tSK2(o)

Input

1.5V

Input

1.5V

tPLHx

tPHLx

PLH

PHL

VOH

1.5V

VOL

VOH

Output

1.5V

VOL

tSK(o)

tPHLy

VOH

1.5V

VOL

Enable and Disable Times

tPLHy

tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx |

Enable

Disable

Note:

1.5V

SK1(o) = Ox and Oy are in the same bank.

SK21(o) = Ox and Oy are in a different bank on the same port.

tPZL

t^PLZ

3.5V

1.5V

3.5V

Output

Normally

Low

Switch

Closed

0.3V

VOL

VOH

t^PZH

tPHZ

Output

Normally

High

Switch

Open

1.5V

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

PS2047B 03/22/99

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