PI74LVCTH245LX [PERICOM]
Registered Bus Transceiver, LVT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.173 INCH, PLASTIC, TSSOP-20;
| 型号： | PI74LVCTH245LX |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Registered Bus Transceiver, LVT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.173 INCH, PLASTIC, TSSOP-20 光电二极管 |
| 文件： | 总8页 (文件大小：353K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74LVTCH245
3.3V 8-Bit Bi-Directional Transceiver
with 3-State Outputs
ProductFeatures
ProductDescription
The PI74LVCTH245 is a non-inverting 8-bit Bidirectional Trans-
ceiverdesignedforlow-voltage2.7Vto3.6VV operation,withthe
• Advanced low power CMOS design for 2.7V to 3.6V
CC
V
CC
operation
capability of interfacing to the 5V system environment. This
tranceiver is designed for asynchronous two-way communication
between data buses. The direction control input pin (DIR)
determines the dataflow from the A bus to the B bus or from the B
bus to the A bus. The output enable (OE) input, when HIGH,
disables both A and B ports by placing them in HIGH Z condition.
• Supports 5V input/output tolerance in mixed signal mode
operation
• Function compatible with LVT family of products
• Balanced ±24mA output drive
• TypicalV
(OutputGroundBounce)<0.8VatV =3.3V,
CC
OLP
T =25°C
A
The PI74LVCTH245 has "Bus Hold" which retains the data
input's last valid logic state whenever the datainput goes to high-
impedance, preventing "floating" inputs and eliminating the need
for pull-up/down resistors.
• I and Power Up/Down 3-State support live insertion
off
• Bus Hold on data inputs eliminates the need for external
pull-up/down resistors
• Latch-upperformanceexceeds200mAPerJESD78
WhenV isbetween0to1.5Vduringpoweruporpowerdown,the
outputs of the device are in the high-impedance state. To ensure
CC
• ESDprotectionexceedsJESD22
–2000VHuman-BodyModel(A114-B)
–200VMachineModel(A115-A)
the high-impedance state above 1.5V, OE should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is
determined by the current sinking capability of the driver.
• Packages:
–20-pin209-milwideplasticSSOP(H20)
–20-pin173-milwideplasticTSSOP(L20)
–20-pin300-milwideplasticSOIC(S20)
The device fully supports live-insertion with its I and power-up/
off
down 3-state. The I circuitry disables the outputs when the
off
powerisoff, preventingthebackflowofdamagingcurrentthrough
the device. Power-up/down 3-state places the outputs in the high-
impedance state during power up or power down, preventing
driverconflict.
LogicBlockDiagram
1
DIR
19 OE
2
A0
18
B0
3
A1
17
B1
4
A2
16
B2
5
A3
15
B3
6
A4
14
B4
7
A5
13
B5
8
A6
12
B6
9
A7
11
B7
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
MaximumRatings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Product Pin Description
Supply voltage range, V .............................. –0.5V to+6.5V
CC
Pin Name
OE
Description
3-State Output Enable Inputs (Active LOW)
Direction Control Input
Input voltage range, V (1) ................................. –0.5V to+6.5V
I
Voltage range applied to any output in the
high-impedance or power-off state, V (1) ........ –0.5V to+6.5V
O
DIR
xAx
xBx
Voltage range applied to any output in the
Side A Inputs or 3-State Outputs
Side B Inputs or 3-State Outputs
Ground
(1,2)
active state, V
.................................... –0.5VtoV +0.5V
CC
O
Input clamp current, I (V <0)..................................... –50mA
IK
I
Output clamp current, I (V <0) ............................... –50mA
OK
O
GND
VCC
Continous Output Current I ....................................... ±50mA
O
Power
Continous Current through each V or GND pin ............... ±100mA
CC
Package thermal impedance, θ (3): packageH............ 81°C/W
JA
package L ............ 84°C/W
package S ............ 84°C/W
Storage Temperature range, T ..................... –65°Cto150°C
Product Pin Configuration
stg
DIR
A0
1
2
3
4
5
6
7
8
9
10
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
20
19
18
17
16
15
14
13
12
11
Notes:
Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
A1
A2
A3
A4
A5
1. Inputnegative-voltageandoutputvoltageratingsmaybeexceededifthe
input and output clamp current ratings are observed.
2. This value is limited to 6.5V maximum.
A6
A7
GND
3.ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51.
Truth Table(1)
Inputs
Outputs
OE
L
DIR
L
Bus B Data to Bus A
Bus A Data to Bus B
Z
L
H
H
X
Notes:
1. H = HighSignalLevel
L = LowSignalLevel
X = Don’t Care or Irrelevant
Z = HighImpedance
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
RecommendedOperatingConditions(1)
Min.
2.7
Max.
Units
VCC Supply Voltage
Operating
3.6
VIH High-level Input Voltage
VIL Low-level Input Voltage
VI Input Voltage
VCC = 2.7V to 3.6V
VCC = 2.7V to 3.6V
2.0
0.8
5.5
VCC
5.5
–12
–24
12
V
0
0
0
High or Low State
3-State
VO Output Voltage
VCC = 2.7V
IOH High-level output current
IOL Low-level output current
VCC = 3.0V to 3.6V
VCC = 2.7V
mA
VCC = 3.0V to 3.6V
24
6
ns/V
μs/V
°C
Δt/ΔV Input transition rise or fall rate
Δt/ΔVCC Power-up ramp rate
150
–40
TA
Operating free-air temperature
85
Notes:
1. All unused inputs must be held at V or GND to ensure proper device operation.
CC
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
DCElectricalCharacteristics(OvertheOperatingRange, T =–40°C+85°C)
A
Description
Test Conditions
I = –18mA
Min.
Max.
Units
Parameters
V
IK
Clamp Diode Voltage
V
V
= 2.7V
–1.2V
CC
I
= 2.7V to
CC
I
OH
= –100μA
V
–0.2V
CC
3.6V
V
V
V
= 2.7V
= 3V
I
= –12mA
= –12mA
= –24mA
2.2
2.4
2.2
CC
CC
CC
OH
Output High Voltage
Output Low Voltage
V
OH
I
OH
I
OH
V
= 2.7V to
I
OL
= 100μA
0.2
3.6V
V
= 2.7V
= 3V
I
OL
= 12mA
= 12mA
= 24mA
0.4
0.4
CC
CC
V
OL
I
OL
V
I
OL
0.55
Control
Inputs
V
= 0V to 3.6V V = 0V to 5.5V
±5
CC
CC
I
Input Leakage
Current
V
V
V
5.5V
I =
I
I
A or B
V
= 3.6V
V
±5
I = CC
(1)
Ports
GND
I =
V = 0.8V
75
I
V
CC
= 3V
Data Input Hold Current
(A or B ports)
I
V = 2V
I
–75
I(HOLD)
(2)
V
V
= 3.6V
V = 0 to 3.6V
±500
±5
CC
I
Power Off Output Leakage
Current
I
= 0V
V or V = 0V to 5.5V
I O
OFF
CC
μA
V = 0.5V to 5.5V,
OE = don't care
O
I
Power-Up 3-State Current
V
V
= 0V to 1.5V
= 1.5V to 0V
±5
±5
OZPU
CC
V = 0.5V to 5.5V,
O
I
Power-Down 3-State Current
OZPD
CC
OE = don't care
V = V or
I
CC
GND
V
3.6V
= 2.7V to
= 3.0V to
Quiescent Power Supply
Current
CC
I
I = 0
100
500
CC
O
3.6V ≤ V ≤
I
(3)
5.5V
One input at V
-
CC
4)
V
CC
0.6V
Increase in I
ΔI
CC
CC
3.6V
Other inputs at V or
CC
GND
Notes:
1. For I/O ports, Input Leakage Current (II) includes the 3-state Output Leakage Current. Unused pins are at VCC or GND.
2. This is the maximum bus-hold dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
3. This applies in the disabled state only.
4. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
Capacitance
(1)
Parameters
Description
Control Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
Test Conditions
= 3.3V, V = V or GND
Typ.
3.3
7.8
33
Units
C
IN
C
IO
PD
V
CC
V
CC
V
CC
I
CC
= 3.3V, V = V or GND
pF
O
CC
(2)
C
= 3.3V, V = 0V or V
f =10 MHz
I
CC,
Notes:
1. All typical values are measured at VCC = 3.3V, TA = 25°C.
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no
output loading and operating at 50% duty cycle, CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN)+(ICCstatic).
SwitchingCharacteristicsOverOperatingRange
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
From
(Input)
To
(Output)
Parameters
Description
Units
C = 50pF, R = 500-ohm
C = 50pF, R = 500-ohm
L L
L
L
Min.
Max.
5.4
Min.
1.0
Max.
5.8
t
1.0
1.0
1.0
PLH
Propagation
Delay
A or B
OE
B or A
A or B
t
5.4
1.0
5.8
PHL
t
7.0
1.0
7.9
PZH
Output Enable
Time
t
1.0
1.0
1.0
7.0
5.4
5.4
1.0
1.0
1.0
7.9
5.8
5.8
PZL
ns
t
PHZ
Output Disable
Time
OE
A or B
t
PLZ
Output to Output
t
0.5
SK(O)
(1)
Skew
Notes:
1. Skew between any two outputs, switching in the same direction.
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
PARAMETERMEASUREMENTINFORMATION
VCC = 2.7V and 3.3V ±0.3V
6V
S1
Open
GND
500ohm
From Output
Under Test
Test
/t
S1
CL = 50pF
500ohm
t
t
Open
6V
PLH PHL
(See Note A)
/t
PLZ PZL
t
/t
GND
PHZ PZH
LoadCircuit
tW
2.7V
0V
1.5V
1.5V
Input
VoltageWaveforms
PulseDuration
2.7V
Output
Control
(Low Level
Enabling)
1.5V
1.5V
0V
3V
tPZL
tPLZ
2.7V
0V
Output
Waveform 1
S1 at 6V
1.5V
1.5V
1.5V
Input
VOL +0.3V
tPHZ
VOL
VOH
(see Note B)
tPLH
tPHL
tPZH
Output
Waveform 2
S1 at GND
V
OH
OL
VOH 0.3V
1.5V
1.5V
1.5V
Output
V
0V
(see Note B)
VoltageWaveforms
PropagationDelayTimes
VoltageWaveforms
Enable and Disable Times
Figure1.LoadCircuitandVoltageWaveforms
Notes:
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
•
•
All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50ohm, tR ≤ 2.5ns, tF ≤ 2.5ns.
The outputs are measured one at a time with one transition per measurement.
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
PackagingMechanical:20-pinSSOP(H)
20
5.00
5.60
.197
.220
1
0.09
0.25
.004
.009
.272
.295
6.90
7.50
.022
.037
0.55
0.95
.078
2.00
Max
.291
.322
7.40
8.20
SEATING
PLANE
.002
0.050
Min
.0098
Max.
0.25
.0256
BSC
0.65
PackagingMechanical:20-pinTSSOP (L)
20
.169
.177
4.3
4.5
1
.252
0.09
0.20
.004
.008
.260
6.4
6.6
.047
1.20
Max
0.45 .018
0.75 .030
SEATING
PLANE
.238
.269
6.1
6.7
.002
.006
0.05
0.15
.007
.012
0.19
0.30
.0256
BSC
0.65
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PI74LVTCH245
3.3V,8-BitBi-DirectionalTranceivers
with3-StateOutputs
Packaging Mechanical: 20-pin SOIC (S)
20
7.40
7.60
.2914
.2992
0.254
x 45˚
0.737
.010
.029
1
.496
.511
12.60
12.99
.0091
.0125
0.23
0.32
0-8˚
0.41
1.27
.016
.050
.020 0.508
.030 0.762
REF
2.35
2.65
.0926
.1043
.394
.419
10.00
10.65
SEATING
PLANE
0.10
0.30
.0040
.0118
.050
BSC
1.27
.013
.020
0.33
0.51
X.XX
DENOTES CONTROLLING
X.XX
DIMENSIONS IN MILLIMETERS
OrderingInformation
Ordering Code
Package Type
Package Description
PI74LVCTH245H
PI74LVCTH245L
PI74LVTCH245S
H
L
S
20-pin, 209-mil wide plastic SSOP
20-pin, 173-mil wide plastic TSSOP
20-pin, 300-mil wide plastic SOIC
Notes:
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• Adding an X suffix = Tape/Reel
PericomSemiconductorCorporation•1-800-435-2336 • www.pericom.com
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