NE5019D-T [NXP]

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NE5019D-T
型号: NE5019D-T
厂家: NXP    NXP
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Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
DESCRIPTION  
PIN CONFIGURATIONS  
The NE/SE5018/19 is a complete 8-bit digital-to-analog converter  
subsystem on one monolithic chip. The data inputs have input  
latches which are controlled by a latch enable pin. The data and  
latch enable inputs are ultra-low loading for easy interfacing with all  
logic systems. The latches appear transparent when the LE input is  
in the low state. When LE goes high, the input data present at the  
moment of transition is latched and retained until LE again goes low.  
This feature allows easy compatibility with most microprocessors.  
F, N Packages  
1
2
3
4
5
6
7
8
9
22  
21  
20  
19  
18  
17  
16  
15  
14  
ANALOG GND  
AMP COMP  
DIGITAL GND  
DB0(LSB)  
DB1  
DB2  
DB3  
SUM MODE  
V
CC+  
V
OUT  
V
DB4  
DB5  
CC–  
DAC COMP  
The chip also comprises a stable voltage reference (5V nominal)  
and high slew rate buffer amplifier. The voltage reference may be  
externally trimmed with a potentiometer for easy adjustment of  
full-scale while maintaining a low temperature coefficient.  
BIPOLAR  
OFFSET R  
DB6  
DB7(MSB)  
V
V
V
IN  
REF  
REF  
REF  
LE 10  
13  
12  
OUT  
ADJ  
11  
NC  
The output of the buffer amplifier may be offset so as to provide  
bipolar as well as unipolar operation.  
1
D Package  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
ANALOG GND  
AMP COMP  
DIGITAL GND  
FEATURES  
8-bit resolution  
2
3
DB0(LSB)  
DB1  
SUM MODE  
4
Input latches  
DB2  
V
CC+  
5
DB3  
V
OUT  
Low-loading data inputs  
6
NC  
DB4  
DB5  
7
On-chip voltage reference  
Output buffer amplifier  
V
CC–  
8
DB6  
DAC COMP  
BIPOLAR  
OFFSET  
NC  
9
DB7(MSB)  
10  
11  
12  
Accurate to ± LSB (0.19%)  
Monotonic to 8 bits  
NC  
LE  
V
V
IN  
REF  
REF  
OUT  
V
ADJ  
REF  
Amplifier and reference both short-circuit protected  
Compatible with 8085, 6800 and many other µPs  
NOTE:  
1. SOL and non-standard pinout  
APPLICATIONS  
Precision 8-bit D/A converters  
A/D converters  
Programmable power supplies  
Test equipment  
Measuring instruments  
Analog-digital multiplication  
ORDERING INFORMATION  
DESCRIPTION  
TEMPERATURE RANGE  
0 to +70°C  
ORDER CODE  
NE5018/5019F  
SE5018/5019F  
NE5018/5019N  
SE5018/5019N  
NE5018/5019D  
DWG #  
0585B  
0585B  
0409B  
0409B  
0173D  
22-Pin Ceramic Dual In-Line Package (CERDIP)  
22-Pin Ceramic Dual In-Line Package (CERDIP)  
22-Pin Plastic Dual In-Line Package (DIP)  
22-Pin Plastic Dual In-Line Package (DIP)  
24-Pin Small Outline Large (SOL) Package  
-55°C to +125°C  
0 to +70°C  
-55°C to +125°C  
0 to +70°C  
751  
August 31, 1994  
853-0845 13721  
Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
BLOCK DIAGRAM  
(19)  
V
CC+  
INT  
V
REF  
OUT  
+
(13)  
(12)  
V
REF  
15k  
5k  
V
REF  
ADJ  
(1)  
(10)  
LE  
(9) (8) (7) (6) (5) (4) (3) (2) DIGITAL  
5k  
DB7DB6DB5DB4DB3DB2DB1DB0  
GND  
MSB  
LSB  
LATCHES AND  
SWITCH DRIVERS  
SUM  
NODE  
(20)  
(18)  
+
DAC CURRENT  
OUTPUT  
V
OUT  
5k  
AMP  
COMP  
(21)  
(22)  
ANALOG  
GND  
DAC SWITCHES  
5k  
V
IN  
REF  
(14)  
5k  
+
DAC  
COMP  
BIPOLAR  
OFFSET  
(15)  
(16)  
V
CC–  
(17)  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
RATING  
18  
UNIT  
V
V
V
V
V
V
V
+
-
Positive supply voltage  
CC  
CC  
IN  
Negative supply voltage  
Logic input voltage  
-18  
V
0 to 18  
12  
V
Voltage at V  
Voltage at V  
input  
V
REF IN  
REF  
REF  
ADJ  
adjust  
0 to V  
12  
V
REF  
REF  
Voltage at sum node  
Short-circuit current to ground at V  
V
SUM  
I
I
Continuous  
Continuous  
REF SC  
OUTSC  
REF OUT  
Short-circuit current to ground or either supply at V  
OUT  
1
P
D
Maximum power dissipation, T =25°C (still-air)  
A
F package  
1740  
2190  
1600  
mW  
mW  
mW  
N package  
D package  
T
A
Operating temperature range  
SE5018  
-55 to +125  
0 to +70  
°C  
°C  
°C  
NE5018  
T
STG  
Storage temperature range  
Lead soldering temperature  
(10 seconds)  
-65 to +150  
T
SOLD  
300  
°C  
NOTES:  
1. Derate above 25°C at the following rates:  
F package at 13.9mW/°C  
N package at 17.5mW/°C  
D package at 12.8mW/°C  
752  
August 31, 1994  
Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
DC ELECTRICAL CHARACTERISTICS  
1
V
+=+15V, V -=-15V, SE5018. -55°CT 125°C, NE5018. 0°CT 70°C, unless otherwise specified. Typical values are specified at 25°C.  
CC  
CC  
A
A
NE/SE5018  
NE/SE5019  
UNIT  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Min  
8
Typ  
8
Max  
8
Min  
8
Typ  
8
Max  
8
Resolution  
Bits  
Bits  
%FS  
V
Monotonicity  
8
8
8
8
8
8
Relative accuracy  
±0.19  
±0.1  
V
+
-
Positive supply voltage  
Negative supply voltage  
Logic “1” input voltage  
Logic “0” input voltage  
Logic “1” input current  
Logic “0” input current  
11.4  
-11.4  
2.0  
15  
11.4  
-11.4  
2.0  
15  
CC  
V
V
V
-15  
-15  
V
CC  
Pin 1=0V  
Pin 1=0V  
Pin 1=0V, 2V<V <18V  
V
IN(1)  
IN(0)  
IN(1)  
IN(0)  
0.8  
10  
0.8  
10  
V
I
I
0.1  
0.1  
µA  
µA  
IN  
Pin 1=0V, -5V<V <0.8V  
-2.0  
-10  
-2.0  
-10  
IN  
Unipolar mode,  
9.50  
10.5  
9.50  
4.75  
10.5  
5.25  
-4.75  
V
V
V
V
REF  
=5.000V,  
V
Full-scale output  
Full-scale output  
Negative full scale  
FS  
all bits high, T =25°C  
A
Bipolar mode, V  
=5.000V 4.75  
5.25  
REF  
+V  
-V  
FS  
all bits high, T =25°C  
A
Bipolar mode,  
-4.75 -5.25  
V
REF  
=5.000V,  
-5.25  
-30  
FS  
all bits low, T =25°C  
A
Unipolar mode,  
+30  
40  
-30  
+30  
40  
mV  
mA  
V
REF  
=5.000V  
V
ZS  
Zero-scale Output  
all bits low, T =25°C  
A
T =25°C  
A
I
Output short circuit current  
15  
15  
OS  
V =0V  
OUT  
Output power supply  
rejection (+)  
V-=-15V, 13.5VV+16.5V,  
external V =5.000V  
%FS  
%VS  
PSR+  
0.001 0.01  
0.001 0.01  
20  
0.001 0.01  
0.001 0.01  
20  
(OUT)  
REF IN  
V+=-15V, -13.5VV--16.5V,  
Output power supply  
rejection (-)  
%FS  
%VS  
PSR-  
(OUT)  
external V =5.000V  
REF IN  
Full-scale temperature  
coefficient  
TC  
TC  
V
=5.000V  
ppm/°C  
FS  
REF IN  
Zero-scale temperature coefficient  
Reference output current  
5
5
ppm/°C  
ZS  
I
3
30  
3
30  
mA  
REF  
T =25°C  
A
I
Reference short circuit current  
15  
15  
mA  
REFSC  
V =0V  
REF OUT  
Reference power supply rejection  
(+)  
V-=-15V, 13.5VV+16.5V,  
=1.0mA  
PSR+  
0.003 0.01  
0.003 0.01  
0.003 0.01 %VR/%VS  
0.003 0.01 %VR/%VS  
(REF)  
I
REF  
Reference power supply rejection  
(-)  
PSR-  
V+=-15V, -13.5VV-16.5V,  
(REF)  
V
Reference voltage  
I
I
I
=1.0mA T =25°C  
4.9  
5.0  
60  
5.25  
4.9  
5.0  
60  
5.25  
V
REF  
REF  
REF  
REF  
A
Reference voltage temperature co-  
efficient  
TC  
=1.0mA  
ppm/°C  
REF  
Z
IN  
DAC V  
input impedance  
=1.0mA, T =25°C  
4.15  
5.0  
7
5.85  
14  
4.15  
5.0  
7
5.85  
14  
kΩ  
mA  
mA  
mW  
REF IN  
A
I
I
+
-
Positive supply current  
Negative supply current  
Power dissipation  
V
V
+=15V  
-=-15V  
CC  
CC  
CC  
-10  
255  
-15  
435  
-10  
255  
-15  
435  
CC  
P
D
I
=1.0mA, V =±15V  
REF  
CC  
NOTES:  
1. Refer to Figure 1.  
753  
August 31, 1994  
Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
1
AC ELECTRICAL CHARACTERISTICS  
V
= ±15V, T = 25°C  
CC  
A
NE/SE5018/19  
UNIT  
SYMBOL  
PARAMETER  
TO  
FROM  
TEST CONDITIONS  
Min  
Typ  
Max  
2
t
t
t
t
t
t
t
t
t
t
Settling time  
±1/2LSB  
±1/2LSB  
Output  
Output  
Output  
Output  
Output  
LE  
Input  
Input  
Input  
Input  
Input  
LE  
All bits low-to-high  
1.8  
µs  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
SLH  
SHL  
PLH  
PHL  
PLSB  
PLH  
PHL  
S
3
Settling time  
All bits high-to-low  
All bits switched low-to-high  
2.3  
2
Propagation delay  
Propagation delay  
Propagation delay  
Propagation delay  
Propagation delay  
Setup time  
300  
150  
150  
300  
150  
3
All bits switched high-to-low  
2, 3  
1 LSB change  
4
Low-to-high transition  
5
LE  
High-to-low transition  
1, 6  
1, 6  
1, 6  
Input  
LE  
100  
50  
Hold time  
Input  
H
Latch enable pulse width  
150  
PW  
NOTES:  
1. Refer to Figure 2.  
2. See Figure 5.  
3. See Figure 6.  
4. See Figure 7.  
5. See Figure 8.  
6. See Figure 9.  
7. For reference currents>3mA, use of an external buffer is required.  
V
CC+  
V
MSB  
LSB  
CC+  
0.47µF  
MSB  
LSB  
LE  
0.47µF  
LE  
9 8 7 6 5 4 3 2  
10  
19  
5.000V  
9 8 7 6 5 4 3 2  
10  
19  
DIG GND 1  
DIG GND 1  
ANA GND  
22  
V
V
IN  
14  
13  
REF  
REF  
ANA GND  
14  
13  
22  
OUT  
5018  
OUTPUT  
22pF  
12  
5018  
OUTPUT  
22pF  
V
18  
12  
OUT  
V
18  
OUT  
SUM  
20  
21  
SUM  
DAC  
2k  
20  
21  
AMP  
COMP  
DAC  
2k  
COMP  
16  
AMP  
COMP  
1N914  
100pF  
COMP  
16  
17  
15  
1N914  
100pF  
17  
15  
0.1µF  
0.01µF  
0.1µF  
0.01µF  
V
CC–  
V
CC–  
Figure 1. DC Parametric Test Configuration  
Figure 2. AC Parametric Test Configuration  
V
CC+  
0.47µF  
MSB  
LE  
LSB  
9 8 7 6 5 4 3 2  
19  
10  
DIG GND 1  
ANA GND  
V
V
V
IN  
14  
13  
22  
18  
REF  
REF  
REF  
OUT  
ADJ  
10k  
10T  
5018  
OUTPUT  
22pF  
12  
V
OUT  
80k  
SUM  
20  
21  
DAC  
COMP  
16  
2k  
AMP  
COMP  
FULL SCALE  
ADJUST  
1N914  
100pF  
17  
15  
V
CC+  
0.1µF  
0.01µF  
1M  
20k  
10T  
CC–  
V
CC–  
ZERO SCALE  
ADJUST  
V
Figure 3. Full-/Zero-Scale Adjust — Unipolar Output (0–10V)  
754  
August 31, 1994  
Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
V
CC+  
0.47µF  
MSB  
LSB  
LE  
9 8 7 6 5 4 3 2  
19  
10  
DIG GND 1  
ANA GND  
V
V
V
IN  
14  
13  
22  
18  
REF  
REF  
REF  
OUT  
ADJ  
10k  
10T  
5018  
OUTPUT  
22pF  
12  
V
OUT  
80k  
SUM  
20  
21  
DAC  
COMP  
16  
2k  
AMP  
COMP  
BIP OFFSET  
15  
1N914  
100pF  
17  
V
CC+  
0.1µF  
0.01µF  
1M  
20k  
10T  
CC–  
V
CC–  
ZERO SCALE  
ADJUST  
V
Figure 4. Bipolar Output Operation (–5 to +5V)  
DATA  
DATA  
t
SLH  
10V  
1LSB  
LE  
t
PLH  
OUTPUT  
0V  
t
PLH  
10V  
OUTPUT  
0V  
LE = LOW  
Figure 5. Settling Time and Propagation Delay,  
Low-to-High Data  
Figure 7. Propagation Delay, Latch Enable to Output  
DATA  
DATA  
t
SHL  
t
PHL  
t
PHL  
10V  
LE  
OUTPUT  
t
PHL  
10V  
0V  
1LSB  
LE = LOW  
OUTPUT  
0V  
Figure 6. Settling Time and Propagation Delay,  
High-to-Low Data  
Figure 8. Propagation Delay, Latch Enable to Output  
755  
August 31, 1994  
Philips Semiconductors Linear Products  
Product specification  
8-Bit µp-compatible D/A converter  
NE/SE5018/5019  
t
PW  
LE  
t
t
h
S
DATA  
Figure 9. Latch Pulse Width, Setup and Hold Times  
756  
August 31, 1994  

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