NUP1301U,115 [NXP]
NUP1301U - Ultra low capacitance ESD protection array SC-70 3-Pin;型号: | NUP1301U,115 |
厂家: | NXP |
描述: | NUP1301U - Ultra low capacitance ESD protection array SC-70 3-Pin 局域网 光电二极管 |
文件: | 总14页 (文件大小:144K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NUP1301U
T323
SO
Ultra low capacitance ESD protection array
Rev. 1 — 28 January 2011
Product data sheet
1. Product profile
1.1 General description
Ultra low capacitance ElectroStatic Discharge (ESD) protection array in a small
SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package designed to
protect one signal line in rail-to-rail configuration from the damage caused by
ESD and other transients.
1.2 Features and benefits
ESD protection of one signal line (rail-to-rail configuration)
Ultra low diode capacitance: Cd = 0.6 pF
ESD protection up to 30 kV
IEC 61000-4-2; level 4 (ESD)
IEC 61000-4-5 (surge); IPP = 11 A
AEC-Q101 qualified
1.3 Applications
Telecommunication networks
Video line protection
Microcontroller protection
I2C-bus protection
Antenna power supply
Analog audio
Class-D amplifier
1.4 Quick reference data
Table 1.
Quick reference data
Tamb = 25 C unless otherwise specified.
Symbol
Per diode
VRRM
Parameter
Conditions
Min
Typ
Max
Unit
repetitive peak reverse
voltage
-
-
-
-
80
V
Cd
IR
diode capacitance
f = 1 MHz;
VR = 0 V
0.6
-
0.75
100
pF
nA
reverse current
VR = 80 V
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
2. Pinning information
Table 2.
Pinning
Symbol Description
Pin
1
Simplified outline
Graphic symbol
GND
VCC
I/O
ground
3
3
2
supply voltage
input/output
3
1
2
1
2
006aaa763
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
-
Description
Version
NUP1301U
plastic surface-mounted package; 3 leads
SOT323
4. Marking
Table 4.
Marking
Type number
NUP1301U
Marking code[1]
*VU
[1] * = placeholder for manufacturing site code
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Per diode
VRRM
Parameter
Conditions
Min
Max
Unit
repetitive peak
reverse voltage
-
80
V
VR
IF
reverse voltage
forward current
-
-
-
80
V
[1]
[2]
215
500
mA
mA
IFRM
repetitive peak
forward current
tp 1 ms; 0.25
IFSM
non-repetitive peak
forward current
square wave
tp = 1 s
-
-
-
4
A
A
A
tp = 1 ms
tp = 1 s
1
0.5
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
2 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Per device
PPP
Parameter
Conditions
Min
Max
Unit
[3][4]
[3][4]
[5][6]
peak pulse power
tp = 8/20 s
tp = 8/20 s
Tamb 25 C
-
220
11
W
IPP
peak pulse current
total power dissipation
junction temperature
ambient temperature
storage temperature
-
A
Ptot
-
200
150
+150
+150
mW
C
C
C
Tj
-
Tamb
Tstg
55
65
[1] Pulse test: tp 300 s; 0.02.
[2] Tj = 25 C prior to surge.
[3] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
[4] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
[5] Single diode loaded.
[6] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Table 6.
Symbol Parameter
VESD electrostatic discharge
voltage
ESD maximum ratings
Conditions
Min
Max
Unit
[1][2]
IEC 61000-4-2
(contact discharge)
-
30
kV
machine model
-
-
400
10
V
MIL-STD-883
kV
(human body model)
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
Table 7.
ESD standards compliance
Standard
Conditions
IEC 61000-4-2; level 4 (ESD)
> 15 kV (air); > 8 kV (contact)
> 8 kV
MIL-STD-883; class 3B (human body model)
NUP1301U
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
3 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
001aaa631
I
PP
100 %
90 %
001aaa630
120
100 % I ; 8 μs
PP
I
PP
(%)
80
−t
e
50 % I ; 20 μs
PP
40
10 %
t
t = 0.7 ns to 1 ns
r
0
30 ns
60 ns
0
10
20
30
40
t (μs)
Fig 1. 8/20 s pulse waveform according to
Fig 2. ESD pulse waveform according to
IEC 61000-4-2
IEC 61000-4-5
6. Thermal characteristics
Table 8.
Thermal characteristics
Symbol Parameter
Per device
Conditions
Min
Typ
Max
Unit
[1][2]
Rth(j-a)
thermal resistance from
junction to ambient
in free air
-
-
-
-
625
300
K/W
K/W
Rth(j-sp)
thermal resistance from
junction to solder point
[1] Single diode loaded.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
4 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
7. Characteristics
Table 9.
Electrical characteristics
Tamb = 25 C unless otherwise specified.
Symbol Parameter
Per diode
Conditions
Min
Typ
Max Unit
VBR
VF
breakdown voltage
IR = 100 A
100
-
-
V
[1]
forward voltage
reverse current
IF = 1 mA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
715
855
1
mV
mV
V
IF = 10 mA
IF = 50 mA
IF = 150 mA
VR = 25 V
VR = 80 V
1.25
30
V
IR
nA
nA
A
100
25
VR = 25 V;
Tj = 150 C
VR = 80 V;
Tj = 150 C
-
-
-
35
A
Cd
diode capacitance
clamping voltage
f = 1 MHz; VR = 0 V
0.6
0.75 pF
Per device
[2][3]
[2][3]
VCL
IPP = 1 A
-
-
-
-
3
V
V
IPP = 11 A
20
[1] Pulse test: tp 300 s; 0.02.
[2] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
[3] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
5 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
mbg704
006aab132
2
3
10
10
I
F
I
FSM
(A)
(mA)
2
10
10
10
1
(1) (2) (3) (4)
1
−1
−1
10
10
2
3
4
1
10
10
10
10
0
0.2
0.4
0.6
0.8
1.0
1.2
V
1.4
(V)
t
(μs)
p
F
(1) Tamb = 150 C
(2) Tamb = 85 C
(3) Tamb = 25 C
Based on square wave currents.
Tj = 25 C; prior to surge
(4)
Tamb = 40 C
Fig 3. Forward current as a function of forward
voltage; typical values
Fig 4. Non-repetitive peak forward current as a
function of pulse duration; typical values
mbg446
006aab133
2
10
0.8
I
R
(1)
(2)
C
(pF
d
(μA)
10
)
0.6
1
−1
10
10
10
10
10
0.4
(3)
(4)
−2
−3
−4
−5
0.2
0
0
4
8
12
16
0
20
40
60
80
100
V
R
(V)
V
(V)
R
(1) Tamb = 150 C
(2) Tamb = 85 C
(3) Tamb = 25 C
Tamb = 25 C; f = 1 MHz
(4)
Tamb = 40 C
Fig 5. Reverse current as a function of reverse
voltage; typical values
Fig 6. Diode capacitance as a function of reverse
voltage; typical values
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
6 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
ESD TESTER
4 GHz DIGITAL
acc. to IEC 61000-4-2
OSCILLOSCOPE
C
= 150 pF; R = 330 Ω
Z
Z
RG 223/U
50 Ω coax
R
Z
450 Ω
10×
ATTENUATOR
C
Z
50 Ω
DUT
(DEVICE
UNDER
TEST)
vertical scale = 10 V/div
vertical scale = 10 A/div
horizontal scale = 15 ns/div
horizontal scale = 15 ns/div
GND
GND
clamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
unclamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network)
vertical scale = 10 V/div
horizontal scale = 15 ns/div
vertical scale = 10 A/div
horizontal scale = 15 ns/div
GND
GND
clamped −8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
unclamped −8 kV ESD pulse waveform
(IEC 61000-4-2 network)
006aab567
Fig 7. ESD clamping test setup and waveforms
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
7 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
8. Application information
Protection of a single (high-speed) data line in rail-to-rail configuration. The protected data
line is connected to pin 3. Pin 1 is connected to ground (GND) and pin 2 is connected to
the supply rail (supply voltage VCC). When the transient voltage exceeds the forward
voltage drop of one diode, the transient is directed either to the supply rail or to GND.
The advantages of these solutions are: low line capacitance (0.6 pF typically), fast
response time, and low clamping voltage.
V
V
CC
CC
D1
NUP1301U
Audio
interface
D2
NUP1301U
006aac518
Fig 8. Typical application for the protection of one signal line
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the NUP1301U as close to the input terminal or connector as possible.
2. The path length between the NUP1301U and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
9. Test information
9.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
NUP1301U
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
8 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
10. Package outline
2.2
1.8
1.1
0.8
0.45
0.15
3
2.2 1.35
2.0 1.15
1
2
0.4
0.3
0.25
0.10
1.3
Dimensions in mm
04-11-04
Fig 9. Package outline SOT323 (SC-70)
11. Packing information
Table 10. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
Package Description
Packing quantity
3000
-115
10000
NUP1301U
SOT323
4 mm pitch, 8 mm tape and reel
-135
[1] For further information and the availability of packing methods, see Section 15.
NUP1301U
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
9 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
12. Soldering
2.65
1.85
1.325
solder lands
solder resist
2
3
0.6
(3×)
solder paste
1.3
2.35
occupied area
0.5
(3×)
1
Dimensions in mm
0.55
(3×)
sot323_fr
Fig 10. Reflow soldering footprint SOT323 (SC-70)
4.6
2.575
1.425
(3×)
solder lands
solder resist
occupied area
1.8
3.65 2.1
Dimensions in mm
preferred transport
direction during soldering
09
(2×)
sot323_fw
Fig 11. Wave soldering footprint SOT323 (SC-70)
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
10 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
13. Revision history
Table 11. Revision history
Document ID
Release date
20110128
Data sheet status
Change notice
Supersedes
NUP1301U v.1
Product data sheet
-
-
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
11 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
14.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
14.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
12 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NUP1301U
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 28 January 2011
13 of 14
NUP1301U
NXP Semiconductors
Ultra low capacitance ESD protection array
16. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits. . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information. . . . . . . . . . . . . . . . . . . 8
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 8
Quality information . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packing information . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
3
4
5
6
7
8
9
9.1
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 January 2011
Document identifier: NUP1301U
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