PLL500-17BSI-R [PLL]
Oscillator;
| 型号： | PLL500-17BSI-R |
| 厂家： | 
PHASELINK CORPORATION |
| 描述： | Oscillator 振荡器 石英晶振 压控振荡器 |
| 文件： | 总6页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
FEATURES
PIN CONFIGURATION
•
•
VCXO output for the 17MHz to 36MHz range
Low phase noise (-130 dBc @ 10kHz offset at
35.328MHz).
CMOS output with OE tri-state control.
17 to 36MHz fundamental crystal input.
Integrated high linearity variable capacitors.
12mA drive capability at TTL output.
+/- 150 ppm pull range, max 5% (typ.) linearity.
Low jitter (RMS): 2.5ps period jitter.
2.5 to 3.3V operation.
XIN
VDD*
VCON
GND
XOUT
OE^
1
2
3
4
8
7
6
5
•
•
•
•
•
•
•
•
VDD*
CLK
SOIC-8
Available in 8-Pin SOIC, 6-pin SOT23 GREEN/
RoHS compliant packages, or DIE.
XOUT
XIN
1
2
3
6
5
4
GND
CLK
VDD
VCON
DESCRIPTION
SOT23-6
^: Denotes internal Pull-up
The PLL500-17 is a low cost, high performance and
low phase noise VCXO for the 17 to 36MHz range,
providing less than -130dBc at 10kHz offset at
35.328MHz. The very low jitter (2.5 ps RMS period
jitter) makes this chip ideal for applications requiring
voltage controlled frequency sources. Input crystal
can range from 17 to 36MHz (fundamental resonant
mode).
*: Only one VDD pin needs to be connected
BLOCK DIAGRAM
XIN
XOUT
XTAL
OSC
CLK
VARICAP
VCON
OE
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 1
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
DIE PAD LAYOUT
DIE SPECIFICATIONS
32 mil
(812,986)
8
Name
Value
XOUT
1
2
XIN
Size
39 x 32 mil
GND
OE^
7
Reverse side
Pad dimensions
Thickness
VDD
80 micron x 80 micron
10 mil
VDD
CLK
6
5
VCON
GND
3
4
DIE ID: PLL500-17: C500A0404-04A
(0,0)
Y
X
Note: ^ denotes internal pull up
PACKAGE PIN and DIE PAD ASSIGNMENT
Pin#
Die Pad Position
Name
Type
Description
SOP-8 SOT23-6
X (µm)
94.183
94.157
Y (µm)
768.599
605.029
XIN
1
2
6
5
I
Crystal input pin.
VDD power supply pin. Only one VDD pin is nec-
essary.
VDD
P
VCON
GND
CLK
3
4
5
4
2
3
94.183
94.193
715.472
331.756
140.379
203.866
I
Frequency control voltage input pin.
Ground pin.
P
O
Output clock pin.
VDD power supply pin. Only one VDD pin is nec-
essary.
VDD
OE
6
7
8
-
-
715.307
715.472
476.906
455.726
626.716
888.881
P
I
Output Enable input pin. Disables the output when
low. Internal pull-up enables output by default if
pin is not connected to low.
XOUT
1
I
Crystal output pin. Ref Clock input.
* OE (Output Enable) pin is not available in SOT-26 package, the output will always be enabled by the build in pull-up resister.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 2
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
VI
4.6
VDD+0.5
VDD+0.5
150
V
Input Voltage, dc
-0.5
-0.5
-65
V
Output Voltage, dc
VO
TS
TA
TJ
V
Storage Temperature
°C
°C
°C
°C
kV
Ambient Operating Temperature*
Junction Temperature
-40
85
125
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
260
2
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Crystal Frequency
17
36
MHz
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
Measured @ 1.4V
1.15
3.7
ns
Output Clock Rise/Fall Time
Output Clock Duty Cycle
Short Circuit Current
45
50
55
%
mA
±50
3. Voltage Control Crystal Oscillator
PARAMETERS
VCXO Stabilization Time *
VCXO Tuning Range
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
ms
TVCXOSTB
From power valid
XTAL C0/C1 < 250
0V ≤ VCON ≤ 3.3V
10
300
ppm
CLK output pullability
VCXO Tuning Characteristic
Pull range linearity
ppm
ppm/V
%
VCON=1.65V, ±1.65V
±150
100
5
10
+1
Frequency change with
VDD varied +/- 10%
Power Supply Rejection
PWSRR
-1
ppm
VCON pin input impedance
VCON modulation BW
2000
45
kΩ
kHz
0V ≤ VCON ≤ 3.3V, -3dB
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 3
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
4. Jitter and Phase Noise Specifications
PARAMETERS
RMS Period Jitter
CONDITIONS
MIN.
TYP.
MAX.
UNITS
With capacitive decoupling between
VDD and GND.
2.5
ps
(1 sigma – 1000 samples)
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
36MHz @100Hz offset
36MHz @1kHz offset
36MHz @10kHz offset
36MHz @100kHz offset
36MHz @1MHz offset
-80
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
-110
-130
-138
-145
5. DC Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic,
with Loaded Outputs
Operating Voltage
Output Low Voltage at
CMOS level
FXIN = 36MHz
Output load of 15pF
IDD
VDD
VOLC
5
6
mA
V
2.25
3.63
0.4
IOL = +4mA
V
Output High Voltage at
CMOS level
Output drive current
Short Circuit Current
VCXO Control Voltage
VOHC
IOH = -4mA
VDD – 0.4
8
V
For VOL<0.4V or VOH>2.4V
9.5
mA
mA
V
±50
VCON
0
VDD
6. Crystal Specifications
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
FXIN
17
36
MHz
pF
µW
µW
pF
-
Crystal Loading Rating (VCON = 1.65V)
CL (xtal)
8.5
50
Maximum Sustainable Drive Level
200
Operating Drive Level
C0
5
C0/C1
ESR
250
30
RS
Ω
Note: The crystal must be such that it oscillates (parallel resonant) at nominal frequency when presented a C Load as specified above.
If the crystal requires more load to be at nominal frequency, the additional load must be added externally.
This however may reduce the pull range.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 4
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
PACKAGE INFORMATION (GREEN PACKAGE COMPLIANT)
SOIC 8L
Symbol
Dimension in MM
Min.
1.35
0.10
1.25
0.33
0.19
4.80
3.80
5.80
0.40
Max.
1.75
0.25
1.50
0.53
0.27
5.00
4.00
6.20
0.89
E
A
A1
A2
B
H
D
C
D
A2
A
E
A1
C
H
L
b
L
e
e
1.27 BSC
SOT23-6 L
Dimension in MM
Symbol
Min.
1.05
0.05
1.00
0.30
0.08
2.80
1.50
2.60
0.35
Max.
1.35
0.15
1.20
0.50
0.20
3.00
1.70
3.0
Pin1 Dot
E
H
A
A1
A2
b
D
c
D
E
A2
A
A1
C
H
L
b
e
L
0.55
e
0.95 BSC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 5
PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
ORDERING INFORMATION (GREEN PACKAGE)
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL502-51 X C X R
NONE= TUBE
R=TAPE AND REEL
PART NUMBER
NONE=NORMAL PACKAGE
L=GREEN PACKAGE
PACKAGE TYPE
D=Die
S= SOIC
TEMPERATURE
C=COMMERCIAL
I=INDUSTRIAL
T= SOT
Part / Order Number
Marking
Package Option
PLL500-17DC
P500-17DC
P500-17SC
P500-17SC
P500-17SCL
P500-17SCL
P500-17TC
P500-17TCL
Die (Waffle Pack)
PLL500-17SC
PLL500-17SC-R
PLL500-17SCL
PLL500-17SCL-R
PLL500-17TC-R
PLL500-17TCL-R
8-Pin SOIC (Tube)
8-Pin SOIC (Tape and Reel)
8-Pin SOIC GREEN (Tube)
8-Pin SOIC GREEN (Tape and Reel)
6-Pin SOT (Tape and Reel)
6-Pin SOT GREEN (Tape and Reel)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 6
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