PLL520-28-29 [PLL]
Low Phase Noise VCXO (for 120-200MHz Fund Xtal); 低相位噪声压控石英振荡器（为120-200MHz基金XTAL）
| 型号： | PLL520-28-29 |
| 厂家： | 
PHASELINK CORPORATION |
| 描述： | Low Phase Noise VCXO (for 120-200MHz Fund Xtal) |
| 文件： | 总7页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
FEATURES
PIN CONFIGURATION
(Top View)
•
•
•
•
•
•
•
•
120MHz to 200MHz Fundamental Mode Crystal.
Output range: 120 – 200MHz (no PLL).
Low Injection Power for crystal 50uW.
Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).
PECL (PLL520-28) or LVDS output (PLL520-29).
Integrated variable capacitors.
VDD
XIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
N/C
N/C
XOUT
N/C
GND
CLKC
VDD
CLKT
N/C
Supports 2.5V or 3.3V-Power Supply.
Available in 16-Pin (TSSOP or 3x3mm QFN).
N/C
OE
DESCRIPTION
VCON
GND
The PLL520-28/-29 are a family of VCXO IC’s
specifically designed to pull high frequency
fundamental crystals. They achieve very low current
into the crystal resulting in better overall stability.
Their internal varicaps allow an on chip frequency
pulling, controlled by the VCON input. Their very
low jitter makes them ideal for the most demanding
timing requirements.
N/C
12 11 10
9
13
14
15
16
8
XIN
XOUT
N/C
GND
CLKC
VDD
7
6
5
P520-2x
OE
CLKT
1
2
3
4
BLOCK DIAGRAM
OE
Q
OUTPUT ENABLE LOGICAL LEVELS
Oscillator
VCON
Part #
OE
State
Output enabled
Tri-state
Amplifier
w/
Q
0 (Default)
PLL520-28
XIN
1
integrated
varicaps
0
Tri-state
PLL520-29
XOUT
1 (Default)
Output enabled
PLL520-28/-29
OE input: Logical states defined by PECL levels for PLL520-28
Logical states defined by CMOS levels for PLL520-29
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
PIN DESCRIPTIONS
TSSOP
Name
3x3mm QFN
Pin number
Type
Description
Pin number
XIN
XOUT
OE
2
13
I
I
Crystal input. See Crystal Specifications on page 2.
Crystal output. See Crystal Specifications on page 2.
Output enable pin. See Output Enable Logic Levels on page 1.
Voltage control input.
3
14
6
16
I
VCON
GND
CLKT
CLKC
N/C
7
1
I
8, 14
2,3,4,8
5
P
O
O
-
Ground.
11
13
True output PECL (PLL520-28) or LVDS (PLL520-29)
Complementary output PECL (PLL520-28) or LVDS (PLL520-29).
Not connected.
7
4,5,9,10,15,16
1, 12
9,10,15
6,11,12
VDD
P
+3.3V power supply.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
VI
4.6
VDD+0.5
VDD+0.5
150
V
Input Voltage, dc
-0.5
-0.5
-65
V
Output Voltage, dc
VO
TS
TA
TJ
V
Storage Temperature
°C
°C
°C
°C
kV
Ambient Operating Temperature*
Junction Temperature
-40
85
125
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
260
2
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
Built-in Capacitance
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
CX+
CX-
C0
2
2
120MHz to 200MHz
(VDD=3.3V)
pF
Inter-electrode capacitance
C0/C1 ratio (gamma)
2
300
200
-
γ
Oscillation Frequency
OF
Fund.
120
MHz
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 2
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
3. Voltage Control Crystal Oscillator (3.3V)
PARAMETERS
SYMBOL
CONDITIONS
From power valid
MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
TVCXOSTB
10
ms
FXIN = 100 – 200MHz;
XTAL C0/C1 < 250
0V ≤ VCON ≤ 3.3V
VCXO Tuning Range
200*
ppm
CLK output pullability
On-chip Varicaps control range
Linearity
ppm
pF
VCON=1.65V, ±1.65V
±100*
VCON = 0 to 3.3V
4 – 18*
10*
%
VCXO Tuning Characteristic
VCON input impedance
VCON modulation BW
65
60
ppm/V
kΩ
25
kHz
0V ≤ VCON ≤ 3.3V, -3dB
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
4. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
PECL/LVDS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded
Outputs)
Operating Voltage
IDD
100/80
3.63
mA
V
VDD
2.97
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
45
45
50
50
±50
55
55
Output Clock Duty Cycle
Short Circuit Current
%
mA
5. Jitter Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS
2.5
At 155.52MHz, with capacitive decoupling
between VDD and GND.
ps
Period jitter peak-to-peak
18.5
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles.
Accumulated jitter RMS
2.5
ps
ps
Accumulated jitter peak-to-peak
Integrated jitter RMS at 155MHz
24
Integrated 12 kHz to 20 MHz
0.3
6. Phase Noise Specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz @10kHz @100kHz UNITS
-125 -140 -145 dBc/Hz
Phase Noise relative
to carrier
155.52MHz
-75
-95
Note: Phase Noise measured at VCON = 0V
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 3
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
7. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
VOD
∆VOD
VOH
247
-50
355
454
50
mV
mV
V
1.4
1.1
1.2
3
1.6
RL = 100 Ω
(see figure)
VOL
0.9
1.125
0
V
VOS
1.375
25
V
Offset Magnitude Change
mV
∆VOS
Vout = VDD or GND
VDD = 0V
Power-off Leakage
IOXD
IOSD
uA
±1
±10
Output Short Circuit Current
-5.7
-8
mA
8. LVDS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
RL = 100 Ω
CL = 10 pF
(see figure)
Differential Clock Rise Time
Differential Clock Fall Time
tr
tf
0.2
0.2
0.7
0.7
1.0
1.0
ns
ns
LVDS Levels Test Circuit
LVDS Switching Test Circuit
OUT
OUT
CL = 10pF
50
50
Ω
Ω
VOD
VOS
VDIFF
RL = 100Ω
CL = 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
80%
80%
VDIFF
0V
20%
20%
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 4
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
9. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
VDD – 1.025
Output High Voltage
Output Low Voltage
VOH
VOL
V
V
RL = 50 Ω to (VDD – 2V)
(see figure)
VDD – 1.620
10. PECL Switching Characteristics
PARAMETERS
Clock Rise Time
Clock Fall Time
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
tr
tf
@20/80% - PECL
@80/20% - PECL
0.6
0.5
1.5
1.5
ns
ns
PECL Levels Test Circuit
PECL Output Skew
OUT
VDD
OUT
50
50
Ω
Ω
2.0V
50%
OUT
tSKEW
OUT
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 5
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
PACKAGE INFORMATION
16 PIN TSSOP ( mm )
Symbol
Min.
-
Max.
1.20
0.15
0.30
0.20
5.10
4.50
E
H
A
A1
B
C
D
E
0.05
0.19
0.09
4.90
4.30
D
A
H
L
e
A1
C
L
B
e
3x3mm QFN
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 6
PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL520-2x O C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
O=TSSOP Q=QFN
Order Number
Marking
Package Option
PLL520-28OC
PLL520-28OC-R
PLL520-28QC
PLL520-28QC-R
P520-28OC
P520-28OC
P520-28QC
P520-28QC
TSSOP - Tube
TSSOP - Tape & Reel
QFN - Tube
QFN - Tape & Reel
PLL520-29OC
PLL520-29OC-R
PLL520-29QC
PLL520-29QC-R
P520-29OC
P520-29OC
P520-29QC
P520-29QC
TSSOP - Tube
TSSOP - Tape & Reel
QFN - Tube
QFN - Tape & Reel
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 7
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