PLL620-2XOCR [PLL]

Low Phase Noise VCXO (for 100-200MHz Fund Xtal); 低相位噪声压控石英振荡器（为100-200MHz基金XTAL）


型号：	PLL620-2XOCR
厂家：	PHASELINK CORPORATION
描述：	Low Phase Noise VCXO (for 100-200MHz Fund Xtal) 低相位噪声压控石英振荡器（为100-200MHz基金XTAL）振荡器石英晶振压控振荡器
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中文：	中文翻译
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PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

FEATURES

PIN CONFIGURATION

(Top View)

•

100MHz to 200MHz Fundamental Mode Crystal.

Output range: 100 – 200MHz (no PLL).

Low Injection Power for crystal 50uW.

Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).

PECL (PLL620-28) or LVDS output (PLL620-29).

Supports 2.5V or 3.3V-Power Supply.

Available in 16-Pin TSSOP.

V D D

XIN

D N C

G N D

C LK C

V D D

C LK T

G N D

XO U T

D N C

O E

DESCRIPTION

The PLL620-28/-29 family of XO ICs is specifically

designed to work with high frequency fundamental

and third overtone crystals. They achieve very low

current into the crystal, resulting in better stability.

Their very low jitter makes them ideal for the most

demanding timing requirements.

D N C

G N D

BLOCK DIAGRAM

OUTPUT ENABLE LOGICAL LEVELS

Oscillator

Amplifier

Part #

State

Output enabled

Tri-state

XIN

0 (Default)

PLL620-28

XOUT

PLL620-28/-29

Tri-state

PLL620-29

1 (Default)

Output enabled

OE input: Logical states defined by PECL levels for PLL620-28

Logical states defined by CMOS levels for PLL620-29

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 1

PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

PIN DESCRIPTIONS

Name

Pin number

Type

Description

XIN

XOUT

Crystal input. See Crystal Specifications on page 2.

Crystal output. See Crystal Specifications on page 2.

Output enable pin. See Output Enable Logic Levels on page 1.

Ground.

8, 9, 10, 14

GND

CLKT

CLKC

DNC

VDD

True output PECL (PLL620-28) or LVDS (PLL620-29)

Complementary output PECL (PLL620-28) or LVDS (PLL620-29).

DO Not connect.

4, 5, 7, 15, 16

1, 12

Power supply.

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS

SYMBOL

MIN.

MAX.

UNITS

Supply Voltage

V_DD

V_I

4.6

V_DD+0.5

150

Input Voltage, dc

-0.5

-65

Output Voltage, dc

V_O

T_S

T_A

T_J

Storage Temperature

°C

Ambient Operating Temperature*

Junction Temperature

-40

125

Lead Temperature (soldering, 10s)

ESD Protection, Human Body Model

260

Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the

device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other

conditions above the operational limits noted in this specification is not implied.

* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.

2. Crystal Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

IC only, no PCB

capacitance included.

Built-in Load Capacitance

C_L

Shunt Capacitance

Oscillation Frequency

Recommended ESR

C₀

R_E

MHz

Ω

Fund. Or 3^rdOvertone

100

200

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 2

PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

3. General Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current (Loaded

Outputs)

Operating Voltage

I_DD

PECL/LVDS

100/80

3.63

V_DD

2.97

@ 1.25V (LVDS)

@ V_DD– 1.3V (PECL)

±50

Output Clock Duty Cycle

Short Circuit Current

4. Jitter Specifications

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Period jitter RMS

2.5

At 155.52MHz, with capacitive decoupling

between VDD and GND.

Period jitter peak-to-peak

18.5

At 155.52MHz, with capacitive decoupling

between VDD and GND. Over 10,000

cycles.

Accumulated jitter RMS

2.5

Accumulated jitter peak-to-peak

Integrated jitter RMS at 155MHz

Integrated 12 kHz to 20 MHz

0.3

5. Phase Noise Specifications

PARAMETERS

FREQUENCY @10Hz @100Hz

@1kHz @10kHz @100kHz UNITS

Phase Noise relative to carrier

155.52MHz

-80

-110

-125

-143

-145

dBc/Hz

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 3

PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

6. LVDS Electrical Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Output Differential Voltage

V_DDMagnitude Change

Output High Voltage

Output Low Voltage

Offset Voltage

V_OD

∆V_OD

V_OH

247

-50

355

454

1.4

1.1

1.2

1.6

R_L= 100 Ω

(see figure)

V_OL

0.9

1.125

V_OS

1.375

Offset Magnitude Change

∆V_OS

V_out= V_DDor GND

V_DD= 0V

Power-off Leakage

I_OXD

I_OSD

±1

±10

Output Short Circuit Current

-5.7

-8

7. LVDS Switching Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

R_L= 100 Ω

C_L= 10 pF

(see figure)

Differential Clock Rise Time

Differential Clock Fall Time

t_r

t_f

0.2

0.7

1.0

LVDS Levels Test Circuit

LVDS Switching Test Circuit

OUT

C_L= 10pF

Ω

V_OD

V_OS

V_DIFF

R_L= 100Ω

C_L= 10pF

OUT

LVDS Transistion Time Waveform

OUT

0V (Differential)

80%

V_DIFF

20%

t_R

t_F

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 4

PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

8. PECL Electrical Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

MAX.

UNITS

V_DD– 1.025

Output High Voltage

Output Low Voltage

V_OH

V_OL

R_L= 50 Ω to (V_DD– 2V)

(see figure)

V_DD– 1.620

9. PECL Switching Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Clock Rise Time

Clock Fall Time

t_r

t_f

@20/80% - PECL

@80/20% - PECL

0.6

0.5

1.5

PECL Levels Test Circuit

PECL Output Skew

OUT

VDD

OUT

Ω

2.0V

50%

OUT

t_SKEW

OUT

PECL Transistion Time Waveform

DUTY CYCLE

45 - 55%

55 - 45%

OUT

80%

50%

20%

OUT

t_R

t_F

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 5

PLL620-28/-29

Low Phase Noise VCXO (for 100-200MHz Fund Xtal)

PACKAGE INFORMATION

16 PIN TSSOP ( mm )

Symbol

Min.

Max.

1.20

0.15

0.30

0.20

5.10

4.50

0.05

0.19

0.09

4.90

4.30

6.40 BSC

0.45

0.75

0.65 BSC

ORDERING INFORMATION

For part ordering, please contact our Sales Department:

47745 Fremont Blvd., Fremont, CA 94538, USA

Tel: (510) 492-0990 Fax: (510) 492-0991

PART NUMBER

The order number for this device is a combination of the following:

Device number, Package type and Operating temperature range

PLL620-2X X C L R

NONE= TUBE

PART NUMBER

R=TAPE AND REEL

NONE=NORMAL PACKAGE

L=GREEN PACKAGE

TEMPERATURE

C=COMMERCIAL,

I=INDUSTRIAL

PACKAGE TYPE

O=TSSOP

Part / Order Number

Marking

Package Option

Temperature

PLL620-2XOC-R

PLL620-2XOC

P620-2XOC

P620-2XOCL

TSSOP -Tape and Reel

TSSOP–Tubes

0 to +70

PLL620-2XOCL-R

PLL620-2XOC

TSSOP-Tape and ReeL (GREEN)

TSSOP–Tubes (GREEN)

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information

furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said

information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.

LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the

express written approval of the President of PhaseLink Corporation.

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 6

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