LNK6427K [POWERINT]
IC LINKSWITCH CV/CC 7.5W 12ESOP;型号: | LNK6427K |
厂家: | Power Integrations |
描述: | IC LINKSWITCH CV/CC 7.5W 12ESOP |
文件: | 总18页 (文件大小:2342K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LNK64x4-64x8
LinkSwitch-3 Family
Energy-Efficient, Accurate Primary-Side Regulation
CV/CC Switcher for Adapters and Chargers
Product Highlights
DC
Output
Dramatically Simplifies CV/CC Converters
• Eliminates optocoupler and all secondary CV/CC control circuitry
• Eliminates all control loop compensation circuitry
Advanced Performance Features
ꢀide Range
High-ꢁoltage
DC Input
• Compensates for transformer inductance tolerances
• Compensates for input line voltage variations
• Compensates for cable voltage drop
D
S
FB
BP
• Compensates for external component temperature variations
• Very accurate IC parameter tolerances using test trimming technology
• Frequency jittering greatly reduces EMI filter cost
• Programmable switching frequency up to 85 kHz to reduce trans-
former size
LinkSwitch-3
Pꢀ-6907-020515
• Minimum operation frequency fixed to improve transient load
response
Figure 1. Typical Application – Not a Simplified Circuit.
Advanced Protection/Safety Features
• Auto-restart protection reduces power delivered by >90% for output
short-circuit and control loop faults (open and shorted components)
• Hysteretic thermal shutdown – automatic recovery reduces power
supply returns from the field
• Meets high-voltage creepage requirements between DRAIN and all
other pins both on the PCB and at the package
Output Power Table1,2,3,4
90-264 VAC
D (SO-8C) Package
Adapter Open Frame
3.5 W 4.1 W
Product5
EcoSmart™– Energy Efficient
• Easily meets all global energy efficiency regulations with no added
components
• No-load consumption at 230 VAC input with bias winding <10 mW for
LNK64x4-LNK64x6 and <30 mW for LNK64x7-LNK64x8
• ON/OFF control provides constant efficiency down to very light loads
– ideal for CEC regulations
LNK6404D / LNK6424D
LNK6405D / LNK6415D /
LNK6425D
4.5 W
5.5 W
7.5 W
5.1 W
6.1 W
7.5 W
LNK6406D / LNK6416D /
LNK6426D / LNK6436D /
LNK6446D
LNK6407D / LNK6417D /
LNK6427D
• No current sense resistors – maximizes efficiency
Green Package
• Halogen free and RoHS compliant package
E (eSIP-7C) and
K (eSOP-12B) Packages
Product5
Applications
Adapter
Open Frame
• Chargers for cell/cordless phones, PDAs, MP3/portable audio
devices, adapters, etc.
LNK6407K / LNK6417K /
LNK6427K
8.5 W
9 W
Description
LNK6408K / LNK6418K /
LNK6428K / LNK6448K
10 W
10 W
10 W
10 W
The LinkSwitch™-3 family of ICs dramatically simplifies low power CV/
CC charger designs by eliminating an optocoupler and secondary
control circuitry. The device introduces a revolutionary control
technique to provide very accurate output voltage and current
regulation, compen-sating for transformer and internal parameter
tolerances along with input voltage variations.
LNK6408E / LNK6418E /
LNK6428E / LNK6448E
Table 1. Output Power Table.
Notes:
1. Assumes minimum input DC voltage >90 VDC, KP ≥1 (Recommend KP ≥1.15
for accurate CC regulation), η >78%, DMAX <55%.
2. Output power capability is reduced if a lower input voltage is used.
3. Minimum continuous power with adequate heat sink measured at 50 °C
ambient with device junction below 110 °C.
4. Assumes bias winding is used to supply BYPASS pin.
5. Package: D: SO-8C, E: eSIP-7C, K: eSOP-12B.
The device incorporates a 725 V power MOSFET, a novel ON/OFF control
state machine, a high-voltage switched current source for self biasing,
frequency jittering, cycle-by-cycle current limit and hysteretic thermal
shutdown circuitry onto a monolithic IC.
www.power.com
March 2016
This Product is Covered by Patents and/or Pending Patent Applications.
LNK64x4-64x8
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Figure 2
Functional Block Diagram.
Pin Functional Description
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DRAIN (D) Pin:
This pin is the power MOSFET drain connection. It provides
internal operating current for both start-up and steady-state
operation.
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BYPASS (BP) Pin:
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This pin is the connection point for an external 1 mF bypass capacitor
for the internally generated 6 V supply.
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FEEDBACK (FB) Pin:
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During normal operation, switching of the power MOSFET is
controlled by this pin. This pin senses the AC voltage on the
bias winding. This control input regulates both the output
voltage in CV mode and output current in CC mode based on
the flyback voltage of the bias winding. The internal induc-
tance correction circuit uses the forward voltage on the bias
winding to sense the bulk capacitor voltage.
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SOURCE (S) Pin:
This pin is internally connected to the output MOSFET source
for high-voltage power and control circuit common returns.
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Figure 3. Pin Configuration.
2
Rev. C 03/16
www.power.com
LNK64x4-64x8
Auto-Restart and Open-Loop Protection
LinkSwitch-3 Functional Description
In the event of a fault condition such as an output short or an
open-loop condition the LinkSwitch-3 enters into an appropriate
protection mode as described below.
The LinkSwitch-3 combines a high-voltage power MOSFET switch with
a power supply controller in one device. It uses an ON/OFF control to
regulate the output voltage. In addition, the switching frequency is
modulated to regulate the output current to provide a constant current
characteristic. The LinkSwitch-3 controller consists of an oscillator,
feedback (sense and logic) circuit, 6 V regulator, over-temperature
protection, frequency jittering, current limit circuit, leading-edge
blanking, inductance correction circuitry, frequency control for
constant current regulation and ON/OFF state machine for CV control.
In the event the FEEDBACK pin voltage during the flyback period falls
below 0.7 V before the FEEDBACK pin sampling delay (~2.5 ms) for a
duration in excess of ~300 ms (auto-restart on-time (tAR-ON) the
converter enters into auto-restart, wherein the power MOSFET is
disabled for 1500 ms. The auto-restart alternately enables and
disables the switching of the power MOSFET until the fault condition
is removed.
Inductance Correction Circuitry
In addition to the conditions for auto-restart described above,
if the sensed FEEDBACK pin current during the forward period of the
conduction cycle (switch “on” time) falls below 120 mA, the converter
annunciates this as an open-loop condition (top resistor in potential
divider is open or missing) and reduces the auto-restart time from
300 ms to approximately 6 clock cycles (90 ms), whilst keeping the
disable period of 2 seconds.
If the primary magnetizing inductance is either too high or low the
converter will automatically compensate for this by adjusting the
oscillator frequency. Since this controller is designed to operate in
discontinuous-conduction mode the output power is directly
proportional to the set primary inductance and its tolerance can be
completely compensated with adjustments to the switching
frequency.
Over-Temperature Protection
Constant Current (CC) Operation
The thermal shutdown circuitry senses the die temperature. The
threshold is set at 142 °C typical with a 60 °C hysteresis. When the
die temperature rises above this threshold (142 °C) the power
MOSFET is disabled and remains disabled until the die temperature
falls by 60 °C, at which point the MOSFET is re-enabled.
As the output voltage and therefore the flyback voltage across the
bias winding ramps up, the FEEDBACK pin voltage increases. The
switching frequency is adjusted as the FEEDBACK pin voltage increases
to provide a constant output current regulation. The constant current
circuit and the inductance correction circuit are designed to operate
concurrently in the CC region.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that cycle. The leading
edge blanking circuit inhibits the current limit comparator for a short
time (tLEB) after the power MOSFET is turned on. This leading edge
blanking time has been set so that current spikes caused by
capacitance and rectifier reverse recovery time will not cause
premature termination of the MOSFET conduction. The LinkSwitch-3
also contains a “di/dt” correction feature to minimize CC variation across
the input line range.
Constant Voltage (CV) Operation
As the FEEDBACK pin approaches 2 V from the constant current
regulation mode, the power supply transitions into CV operation.
The switching frequency at this point is at its maximum value,
corresponding to the peak power point of the CV/CC characteristic.
The controller regulates the FEEDBACK pin voltage to remain at
FEEDBACK pin threshold (VFBTH) using an ON/OFF state-machine.
The FEEDBACK pin voltage is sampled 2.5 ms after the turn-off of the
high-voltage switch.
At light loads the current limit is also reduced to decrease the
transformer flux density and the FEEDBACK pin sampling is done
earlier.
6 V Regulator
The 6 V regulator charges the bypass capacitor connected to the
BYPASS pin to 6 V by drawing a current from the voltage on the
DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal
supply voltage node. When the MOSFET is on, the device runs off of
the energy stored in the bypass capacitor. Extremely low power
consumption of the internal circuitry allows the LinkSwitch-3 to
operate continuously from the current drawn from the DRAIN pin
however for the best no-load input power, the BYPASS pin should be
supplied current of IS1 from the bias winding at no-load conditions.
A bypass capacitor value of 1 mF is sufficient for both high frequency
decoupling and energy storage.
Output Cable Compensation
This compensation provides a constant output voltage at the end of
the cable over the entire load range in CV mode. As the converter
load increases from no-load to the peak power point (transition point
between CV and CC) the voltage drop introduced across the output
cable is compensated by increasing the FEEDBACK pin reference
voltage. The controller determines the output load and therefore the
correct degree of compensation based on the output of the state
machine. The amount of cable drop compensation is determined by
the third digit in the device part number.
3
Rev. C 03/16
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LNK64x4-64x8
reducing the output diode voltage stress by allowing a greater
transformer turns ratio. The device is completely self-powered from
the BYPASS pin and decoupling capacitor C7. For the LNK64xx
devices, there are 4 options for different amount of cable drop
compensation determined by the third digit in the device part
number. Table 2 shows the amount of compensation for each device.
The LNK644x devices do not provide cable drop compensation.
Applications Example
Circuit Description
This circuit shown in Figure 4 is configured as a primary-side
regulated flyback power supply utilizing the LNK6448K. With an
average efficiency of 78% and <30 mW no-load input power this
design easily exceeds the most stringent current energy efficiency
requirements.
The optional bias supply formed by D3 and C8 provides the operating
current for U1 via resistor R8. This reduces the no-load consumption
from ~200 mW to <30 mW and also increases light load efficiency.
Input Filter
AC input power is rectified by bridge BR1. The rectified DC is filtered
by the bulk storage capacitors C1 and C2. Inductors L2 and L3,
together with C1 and C2 form a pi (π) filter, which attenuates
conducted differential-mode EMI noise. This configuration along with
Power Integrations transformer E-Shield™ technology allows this
design to meet EMI standard EN55022 class B with good margin
without requiring a Y capacitor, even with the output connected to
safety earth ground. A ferrite bead for L3 is sufficient especially
when the output of the supply is floating. Fuse F1 provides protection
against catastrophic failure. NTC (Negative Thermal Coefficient)
thermistor RT1 is used to limit the rush current to below the peak
specification of BR1 during start-up especially at high-line input
voltage. High-line results in the highest current into C1 and C2. F1
and RT1 can be replaced by a single fusible resistor. If the reduction
in efficiency is acceptable, a bridge with a higher IFSM rating may also
allow removal of RT1. If a fusible resistor is selected, use a
flameproof type. It should be suitably rated (typically a wire wound
type) to withstand the instantaneous dissipation while the input
capacitors charge when first connected to the AC line.
The rectified and filtered input voltage is applied to one side of the
primary winding of T1. The other side of the transformer’s primary
winding is driven by the integrated MOSFET in U1. The leakage
inductance drain voltage spike is limited by an RCD-R clamp
consisting of D2, R3, R11, and C6.
Output Rectification
The secondary of the transformer is rectified by D1, a 10 A, 45 V
Schottky barrier type for higher efficiency, and filtered by C3, L1 and
C4. If lower efficiency is acceptable then this can be replaced with a
5 A PN junction diode for lower cost. In this application C3 and C4
are sized to meet the required output voltage ripple specification with
a ferrite bead L1, which eliminates the high switching noise on the
output. A pre-load resistor R2 is used to meet the regulation
specification. If the battery self-discharge is required, the pre-load
resistor can be replaced with a series resistor and Zener network.
Output Regulation
The LNK64xx family of devices regulates the output using ON/OFF
control in the constant voltage (CV) regulation region of the output
characteristic and frequency control for constant current (CC)
regulation. The feedback resistors (R6 and R7) were selected using
standard 1% resistor values to center both the nominal output
voltage and constant current regulation thresholds.
LNK6448K Primary
The LNK6448K device (U1) incorporates the power switching device,
oscillator, CC/CV control engine, start-up, and protection functions.
The integrated 725 V MOSFET provides a large drain voltage margin
in universal input AC applications, increasing reliability and also
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Figure 4.
Energy Efficient USB Charger Power Supply (78% Average Efficiency, <30 mW No-load Input Power).
4
Rev. C 03/16
www.power.com
LNK64x4-64x8
Key Application Considerations
Output Power Table
LinkSwitch-3 Layout Considerations
Circuit Board Layout
LinkSwitch-3 is a highly integrated power supply solution that
integrates on a single die, both, the controller and the high- voltage
MOSFET. The presence of high switching currents and voltages
together with analog signals makes it especially important to follow
good PCB design practice to ensure stable and trouble free operation
of the power supply. See Figure 5 for a recommended circuit board
layout for LinkSwitch-3.
The data sheet maximum output power table (Table 1) repre- sents
the maximum practical continuous output power level that can be
obtained under the following assumed conditions:
1. Assumes minimum input DC voltage >90 VDC, KP ≥1 (Recom-
mend KP ≥1.15 for accurate CC regulation), η >78%, DMAX <55%.
2. Output power capability is reduced if a lower input voltage
is used.
When designing a printed circuit board for the LinkSwitch-3 based
power supply, it is important to follow the following guidelines:
3. Minimum continuous power with adequate heat sink measured at
50 °C ambient with device junction below
110 °C.
Single Point Grounding
4. Assumes bias winding is used to supply BYPASS pin.
Use a single point (Kelvin) connection at the negative terminal of the
input filter capacitor for the LinkSwitch-3 SOURCE pin and bias
winding return. This improves surge capabilities by returning surge
currents from the bias winding directly to the input filter capacitor.
Output Tolerance
LinkSwitch-3 provides an overall output tolerance (including
line, component variation and temperature) of ±5% for the output
voltage in CV operation and ±10% for the output current during CC
operation over a junction temperature range of 0 °C to 110 °C.
Bypass Capacitor
The BYPASS pin capacitor should be located as close as possible to
the SOURCE and BYPASS pins.
BYPASS Pin Capacitor Selection
A 1 mF BYPASS pin capacitor is recommended. The capacitor
voltage rating should be greater than 7 V. The capacitor’s dielectric
material is not important but tolerance of capacitor should be ≤
±50%. The capacitor must be physically located adjacent to the
LinkSwitch-3 BYPASS pin.
Feedback Resistors
Place the feedback resistors directly at the FEEDBACK pin of the
LinkSwitch-3 device. This minimizes noise coupling.
Thermal Considerations
The copper area connected to the SOURCE pins provides the
LinkSwitch-3 heat sink. A good estimate is that the LinkSwitch-3 will
dissipate 10% of the output power. Provide enough copper area to
keep the SOURCE pin temperature below 110 °C is recommended to
provide margin for part to part RDS(ON) variation.
Cable Drop Compensation
The amount of output cable compensation is determined by the third
digit in the device part number. Table 2 shows the amount of
compensation for each LinkSwitch-3 device.
The output voltage that is entered into PIXls design spreadsheet is
the voltage at the end of the output cable when the power supply is
delivering maximum power. The output voltage at the terminals of
the supply is the value measured at the end of the cable multiplied by
the output voltage change factor.
Secondary Loop Area
To minimize leakage inductance and EMI the area of the loop connecting
the secondary winding, the output diode and the output filter capacitor
should be minimized. In addition, sufficient copper area should be
provided at the anode and cathode terminal of the diode for heat
sinking. A larger area is preferred at the quiet cathode terminal.
A large anode area can increase high frequency radiated EMI.
LinkSwitch-3 Output Cable Voltage
Drop Compensation
Electrostatic Discharge Spark Gap
A spark gap is created between the output and the AC input. The
spark gap directs ESD energy from the secondary back to the AC
input. The trace from the AC input to the spark gap electrode should
be spaced away from other traces to prevent unwanted arcing
occurring and possible circuit damage.
Device
Output Voltage Change Factor (±1%)
LNK640x
LNK641x
LNK642x
LNK643x
LNK644x
1.02
1.04
1.06
1.08
1.01
Drain Clamp Optimization
LinkSwitch-3 senses the feedback winding on the primary-side to
regulate the output. The voltage that appears on the feedback
winding is a reflection of the secondary winding voltage while the
internal MOSFET is off. Therefore any leakage inductance induced
ringing can affect output regulation. Optimizing the drain clamp to
Table 2. Cable Compensation Change Factor vs. Device.
5
Rev. C 03/16
www.power.com
LNK64x4-64x8
Figure 5.
PCB (Bottom Layer on Left) (Top Layer on Right) Layout Example Showing 10 W Design using K Package.
minimize the high frequency ringing will give the best regulation.
Figure 6 shows the desired drain voltage waveform compared to
Figure 7 with a large undershoot due to the leakage inductance
induced ring. This will reduce the output voltage regulation
performance. To reduce this adjust the value of the resistor in series
with the clamp diode.
0.7 mA typ.) is the IC supply current and VBP (6.2 V typ.) is the
BYPASS pin voltage. The parameters IS2 and VBP are provided in the
parameter table of the LinkSwitch-3 data sheet. Diode D3 can be any
low cost diode such as FR102, 1N4148 or BAV19/20/21.
Quick Design Checklist
As with any power supply design, all LinkSwitch-3 designs should be
verified on the bench to make sure that component specifications are
not exceeded under worst-case conditions.
Addition of a Bias Circuit for Higher Light Load
Efficiency and Lower No-load Input Power
Consumption
The following minimum set of tests is strongly recommended:
The addition of a bias circuit can decrease the no-load input power
from ~200 mW down to less than 30 mW at 230 VAC input. Light
load efficiency also increases which may avoid the need to use a
Schottky barrier vs. PN junction output diode while still meeting
average efficiency requirements.
1. Maximum drain voltage – Verify that peak VDS does not exceed
680 V at the highest input voltage and maximum output power.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and maximum output load, verify drain
current waveforms at start-up for any signs of transformer
saturation and excessive leading edge current spikes.
The power supply schematic shown in Figure 4 has only one winding
for both feedback and bias circuit. Diode D3, C8, R5 and R8 form the
bias circuit. The feedback winding voltage is designed at 11 V, this
provides a high enough voltage to supply the BYPASS pin even during
low switching frequency operation at no-load.
LinkSwitch-3 has a leading edge blanking time of 170 ns to
prevent premature termination of the ON-cycle.
3. Thermal check – At maximum output power, both minimum and
maximum input voltage and maximum ambient temperature;
verify that temperature specifications are not exceeded for
LinkSwitch-3, transformer, output diodes and output capacitors.
Enough thermal margin should be allowed for part-to-part variation
of the RDS(ON) of LinkSwitch-3, as specified in the data sheet.
A 10 mF capacitance value is recommended for C8 to hold up the bias
voltage at the low switching frequencies that occur at light to
no-load. The capacitor type is not critical but the voltage rating
should be above the maximum value of VBIAS. The recommended
current into the BYPASS pin is equal to IC supply current (0.6 mA to
0.7 mA) at the minimum bias winding voltage. The BYPASS pin
current should not exceed 10 mA at the maximum bias winding
voltage. The value of R8 is calculated according to (VBIAS – VBP)/IS2,
where VBIAS (10 V typ.) is the voltage across C8, IS2 (0.6 mA to
Design Tools
Up-to-date information on design tools can be found at the Power
Integrations web site: www.power.com
6
Rev. C 03/16
www.power.com
LNK64x4-64x8
ꢆꢇ ꢈveꢉꢊꢋꢈꢈꢌ
ꢍꢊ ꢎꢏꢏeꢐꢌꢎꢑꢒe
ꢇeꢈꢉꢊꢋve ꢌꢋꢍꢈ ꢎꢉꢏ
ꢋꢍꢐꢌeꢉꢑe ꢒꢓꢊꢔꢓꢊ
ꢌꢋꢔꢔꢕe ꢉꢍꢖ/ꢒꢌ
ꢖeꢈꢌꢉꢖe ꢒꢓꢊꢔꢓꢊ
ꢌeꢈꢓꢕꢉꢊꢋꢒꢍ
Figure 6. Desired Drain Voltage Waveform with Minimal Leakage
Figure 7.
Undesirable Drain Voltage Waveform with Large Leakage
Ring Undershoot.
Ringing Undershoot.
7
Rev. C 03/16
www.power.com
LNK64x4-64x8
Absolute Maximum Ratings(1,5)
DRAIN Voltage ........................................................-0.3 V to 725 V Notes:
DRAIN Pin Peak Current: LNK64x4............................ 400 (600) mA(4) 1. All voltages referenced to SOURCE, TA = 25 °C.
LNK64x5.............................504 (750) mA(4) 2. Duration not to exceed 2 ms.
LNK64x6 ............................654 (980) mA(4) 3. 1/16 in. from case for 5 seconds.
LNK64x7...........................670 (1003) mA(4) 4. The higher peak DRAIN current is allowed while the DRAIN voltage
LNK64x8........................... 718 (1076) mA(4)
is simultaneously less than 400 V.
Peak Negative Pulsed Drain Current.................................. -100 mA(2) 5. Maximum ratings specified may be applied, one at a time without
FEEDBACK Pin Voltage .................................................-0.3 to 9 V(6)
FEEDBACK Pin Current .........................................................100 mA
BYPASS Pin Voltage ........................................................ -0.3 to 9 V
causing permanent damage to the product. Exposure to Absolute
Maximum ratings for extended periods of time may affect product
reliability.
BYPASS Pin Current ...............................................................10 mA 6. -1 V for current pulse ≤5 mA out of the pin and a duration
Storage Temperature ................................................. -65 to 150 °C
of ≤500 ns.
Operating Junction Temperature(7) ...............................-40 to 150 °C 7. Normally limited by internal circuitry.
Lead Temperature ..............................................................260 °C(3)
Thermal Resistance
Thermal Resistance: D Package:
Notes:
(qJA) .............................100 °C/W(2), 80 °C/W(3) 1. Measured on pin 8 (SOURCE) close to plastic interface.
(qJC)(1) ...............................................30 °C/W 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
4. Free standing with no heat sink.
5. Measured at the back surface of tab.
6. Soldered (including exposed pad for K package) to typical
application PCB with a heat sinking area of 0.36 sq. in.
(232 mm2), 2 oz. (610 g/m2) copper clad.
7. Soldered (including exposed pad for K package) to typical
application PCB with a heat sinking area of 1 sq. in. (645 mm2),
2 oz. (610 g/m2) copper clad.
E Package
(qJA)..................................... 105 °C/W(4)
(qJC).........................................2 °C/W(5)
K Package
(qJA) .....................45 °C/W(6), 38 °C/W(7)
(qJC).........................................2 °C/W(5)
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Parameter
Symbol
Min
Typ
Max
Units
Control Functions
TJ = 25 °C
tON × IFB = 1.4 mA-ms
Programmable
Maximum Frequency
fOSC
VFB = VFBth
85
kHz
Hz
See Notes A, F
LNK64x4-64x6
LNK64x7
350
760
560
Minimum Operation
Frequency
TJ = 25 °C
VFB = VFBth
fOSC(MIN)
LNK64x8
Frequency Ratio
(Constant Current)
TJ = 25 °C
Between VFB = 1.3 V and VFB = 1.9 V
fRATIO(CC)
1.42
1.16
1.47
1.21
1.53
1.26
Frequency Ratio
(Inductance
Correction)
Between tON × IFB = 1.4 mA and
tON × IFB = 2 mA-ms
fRATIO(IC)
Peak-to-Peak Jitter Compared to Average
Frequency, TJ = 25 °C
Frequency Jitter
±7
%
%
Maximum Duty Cycle
DCMAX
See Notes D, E
55
LNK6404/6405/
1.915
1.955
1.940
1.980
1.965
2.005
TJ = 25 °C
6406/6446
FEEDBACK Pin Voltage
VFBth
V
CBP = 1 mF
LNK6415/6416
8
Rev. C 03/16
www.power.com
LNK64x4-64x8
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Parameter
Symbol
Min
Typ
Max
Units
Control Functions (cont.)
LNK6424/6425/
1.995
2.035
1.915
2.020
2.060
1.940
2.045
2.085
1.965
6426
6436
TJ = 25 °C
FEEDBACK Pin Voltage
VFBth
V
LNK6407,
CBP = 1 mF
LNK6408, LNK6448
LNK6417, LNK6418
LNK6427, LNK6428
1.955
1.995
1.980
2.020
2.005
2.045
FEEDBACK Pin Voltage
at Turn-Off Threshold
VFB(AR)
tON(MIN)
tFB
1.14
1.22
700
2.75
300
1.30
V
Minimum Switch
ON-Time
See Note E
See Note G
ns
ms
mA
FEEDBACK Pin
Sampling Delay
2.55
2.95
380
FB Voltage > VFBth
(MOSFET Not Switching
IS1
LNK64x4
480
500
550
600
540
560
620
680
Feedback Voltage =
VFBth -0.1 V,
Switch ON-Time =
DRAIN Supply
Current
LNK64x5
IS2
LNK64x6
LNK64x7
mA
tON (MOSFET
Switching at fOSC
)
LNK64x8
LNK64x4
LNK64x5
LNK64x6
LNK64x7
LNK64x8
LNK64x4
LNK64x5
LNK64x6
LNK64x7
LNK64x8
700
-4.4
-5.8
-6.1
-6.1
-6.1
-2.8
-4.0
-4.2
-4.2
-4.2
780
-2.7
-3.3
-3.5
-3.5
-3.5
-1.5
-1.8
-2
-5.2
-6.8
-7.5
-7.5
-7.5
-5
ICH1
VBP = 0 V
BYPASS Pin
Charge Current
mA
-6.4
-7
ICH2
VBP = 4 V
-7
-2.0
-2.0
-7
BYPASS Pin
Voltage
VBP
5.65
0.70
6.2
5.90
0.95
6.4
6.25
1.20
6.8
V
V
V
BYPASS Pin
Voltage Hysteresis
VBPH
BYPASS Pin
Shunt Voltage
VSHUNT
9
Rev. C 03/16
www.power.com
LNK64x4-64x8
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Parameter
Symbol
Min
Typ
Max
Units
Circuit Protection
di/dt = 60 mA/ms
VBP = 5.9 V
LNK64x4
LNK64x5
LNK64x6
LNK64x7
LNK64x8
232
290
359
390
446
250
315
390
420
480
268
340
421
449
513
TJ = 25 °C
di/dt = 75 mA/ms
VBP = 5.9 V
TJ = 25 °C
di/dt = 95 mA/ms
VBP = 5.9 V
Current Limit
ILIMIT
mA
TJ = 25 °C
di/dt = 105 mA/ms
VBP = 5.9 V
TJ = 25 °C
di/dt = 120 mA/ms
VBP = 5.9 V
TJ = 25 °C
Minimum Current
Limit Scale Factor
ILIMIT(MIN)
0.27
0.975
125
0.32
1.000
170
0.38
Normalized Output
Current
IO
TJ = 25 °C
1.025
TJ = 25 °C
Set Note D
Leading Edge
Blanking Time
tLED
ns
°C
°C
Thermal Shutdown
Temperature
tSD
135
142
150
Thermal Shutdown
Hysteresis
tSDH
60
Output
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
TJ = 25 °C
TJ = 100 °C
19.7
30.0
13.2
19.8
7.7
23.7
36.0
15.8
23.8
9.3
LNK64x4
ID = 96 mA
LNK64x5
ID = 105 mA
ON-State
Resistance
LNK64x6
ID = 105 mA
W
RDS(ON)
11.5
4.8
13.8
5.8
LNK64x7
ID = 96 mA
7.2
8.5
3.1
3.8
LNK64x8
ID = 105 mA
4.6
5.5
VDS = 560 V
IDSS1
50
TJ = 125 °C See Note C
OFF-State
Leakage
mA
VDS = 375 V
TJ = 50 °C
IDSS2
15
10
Rev. C 03/16
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LNK64x4-64x8
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Parameter
Symbol
Min
Typ
Max
Units
Output (cont.)
Breakdown
Voltage
BVDSS
TJ = 25 °C
725
50
V
V
DRAIN Supply
Voltage
Auto-Restart
ON-Time
tAR-ON
See Notes A, E
300
1.5
ms
s
Auto-Restart
OFF-Time
tAR-OFF
Open-Loop
FEEDBACK Pin
Current Threshold
IOL
See Note E
See Note E
-90
90
mA
ms
Open-Loop
ON-Time
NOTES:
A. Auto-restart ON-time is a function of switching frequency programmed by tON × IFB and minimum frequency in CC mode.
B. The current limit threshold is compensated to cancel the effect of current limit delay. As a result the output current stays constant across
the input line range.
C. IDSS1 is the worst-case OFF-state leakage specification at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical
specification under worst-case application conditions (rectified 265 VAC) for no-load consumption calculations.
D. When the duty cycle exceeds DCMAX the LinkSwitch-3 operates in on-time extension mode.
E. This parameter is derived from characterization.
F. The switching frequency is programmable between 60 kHz to 85 kHz.
G. At light load tFB is reduced at 1.8 ms typical.
11
Rev. C 03/16
www.power.com
LNK64x4-64x8
Typical Performance Characteristics
1.ꢀ00
1.ꢀ00
1.000
0.ꢁ00
1.000
0.ꢁ00
0.600
0.ꢂ00
0.600
0.ꢂ00
0.ꢀ00
0.000
0.ꢀ00
0.000
ꢃꢂ0 ꢃ1ꢄ 10 3ꢄ 60
ꢁꢄ 110 13ꢄ
ꢃꢂ0 ꢃ1ꢄ 10 3ꢄ 60
ꢁꢄ 110 13ꢄ
ꢀꢁꢂꢃꢁꢄꢅꢆꢇꢄꢁ ꢈꢉꢊꢋ
ꢀꢁꢂꢃꢁꢄꢅꢆꢇꢄꢁ ꢈꢉꢊꢋ
Figure 8. Current Limit vs. Temperature.
Figure 9. Output Frequency vs. Temperature.
1.ꢀ00
1.ꢀ00
1.000
0.ꢁ00
1.000
0.ꢁ00
0.600
0.ꢂ00
0.ꢀ00
0.600
0.ꢂ00
0.ꢀ00
0.000
0.000
ꢃꢂ0 ꢃ1ꢄ 10 3ꢄ 60
ꢁꢄ 110 13ꢄ
ꢃꢂ0 ꢃ1ꢄ 10 3ꢄ 60
ꢁꢄ 110 13ꢄ
ꢀꢁꢂꢃꢁꢄꢅꢆꢇꢄꢁ ꢈꢉꢊꢋ
ꢀꢁꢂꢃꢁꢄꢅꢆꢇꢄꢁ ꢈꢉꢊꢋ
Figure 10. Frequency Ratio vs. Temperature (Constant Current).
Figure 11. Frequency Ratio vs. Temperature (Inductor Current).
1.200
1.ꢀ00
1.000
0.800
1.000
0.ꢁ00
0.600
0.ꢂ00
0.600
0.400
0.ꢀ00
0.000
0.200
0.000
ꢃꢂ0 ꢃ1ꢄ 10 3ꢄ 60
ꢁꢄ 110 13ꢄ
-40 -15 10 35 60
85 110 135
ꢀꢁꢂꢃꢁꢄꢅꢆꢇꢄꢁ ꢈꢉꢊꢋ
Temperature (°C)
Figure 12. Feedback Voltage vs. Temperature.
Figure 13. Normalized Output Current vs. Temperature.
12
Rev. C 03/16
www.power.com
LNK64x4-64x8
Typical Performance Characteristics (cont.)
1.1
300
ꢀꢁ0
ꢀ00
1ꢁ0
100
ꢁ0
ꢆꢎꢏꢐꢑꢒꢓ ꢔꢏꢎꢕꢖꢗꢘꢙ
ꢉꢊꢋ6ꢂꢌꢂ 1.0
ꢉꢊꢋ6ꢂꢌꢁ 1.ꢁ
ꢉꢊꢋ6ꢂꢌ6 ꢀ.ꢁ
ꢉꢊꢋ6ꢂꢌꢍ ꢂ.0
ꢉꢊꢋ6ꢂꢌꢃ 6.ꢁ
1.0
ꢄCꢅꢆꢇꢈꢀꢁ °C
ꢄCꢅꢆꢇꢈ100 °C
0
0.ꢀ
0
ꢀ
ꢂ
6
ꢃ
10
ꢁꢂ0 ꢁꢃꢂ
0
ꢃꢂ ꢂ0 ꢄꢂ 100 1ꢃꢂ 1ꢂ0
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢇꢈꢉꢊꢈꢋꢌꢄꢁꢋꢈ ꢍ°ꢎꢏ
ꢀꢁꢂꢃN ꢄꢅꢆꢇꢈꢉꢊ ꢋꢄꢌ
Figure 14. Breakdown vs. Temperature.
Figure 15. Output Characteristic.
ꢀ0
1000
100
10
ꢉꢊꢋꢌꢍꢎꢏ ꢐꢋꢊꢑꢒꢓꢔꢕ
ꢃꢄꢅ6ꢁꢆꢁ 1.0
ꢃꢄꢅ6ꢁꢆꢀ 1.ꢀ
ꢉꢊꢋꢌꢍꢎꢏ ꢐꢋꢊꢑꢒꢓꢔꢕ
ꢃꢄꢅ6ꢁꢆꢁ 1.0
ꢃꢄꢅ6ꢁꢆꢂ 1.ꢂ
ꢃꢄꢅ6ꢁꢆ6 ꢀ.ꢂ
ꢃꢄꢅ6ꢁꢆꢇ ꢁ.0
ꢃꢄꢅ6ꢁꢆꢈ 6.ꢂ
ꢁ0
ꢃꢄꢅ6ꢁꢆ6 ꢂ.ꢀ
ꢃꢄꢅ6ꢁꢆꢇ ꢁ.0
ꢃꢄꢅ6ꢁꢆꢈ 6.ꢀ
30
ꢂ0
10
0
1
0
ꢂ00
ꢁ00
600
0
100 ꢀ00 300 ꢁ00 ꢂ00 600
ꢀꢁꢂꢃN ꢄꢅꢆꢇꢈꢉꢊ ꢋꢄꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈꢂꢉꢊ ꢋꢅꢌ
Figure 17. Drain Capacitance Power.
Figure 16. COSS vs. Drain Voltage.
13
Rev. C 03/16
www.power.com
LNK64x4-64x8
ꢌꢱ-8ꢃ ꢇꢀ ꢚꢛꢗꢜꢛꢝꢏꢊ
ꢁꢅꢈꢁ ꢇꢁꢅꢁꢁ4ꢊ
ꢧ-ꢋ
ꢙꢫ
ꢃ
ꢅ
ꢇꢋꢌꢈꢁꢍ ꢈ
ꢎ
ꢃ
4ꢅꢆꢁ ꢇꢁꢅꢈꢆꢄꢊ ꢋꢌꢃ
ꢈ
ꢃ
ꢇ
ꢆ
ꢄ
ꢬꢧꢭꢬꢓ
ꢚLꢧNꢓ
ꢌꢓꢧꢰꢩNꢬ
ꢚLꢧNꢓ
ꢄꢅꢆꢁ ꢇꢁꢅꢈꢉ4ꢊ ꢋꢌꢃ
6ꢅꢁꢁ ꢇꢁꢅꢙꢄ6ꢊ ꢋꢌꢃ
ꢅ
ꢊ
ꢁ - 8
C
ꢁꢅꢙꢉ ꢇꢁꢅꢁꢈꢁꢊ
ꢋꢌꢃ
ꢈꢅꢁ4 ꢇꢁꢅꢁ4ꢈꢊ ꢮꢓꢯ
ꢁꢅꢈꢁ ꢇꢁꢅꢁꢁ4ꢊ
ꢃ ꢀ
ꢁꢅ4ꢁ ꢇꢁꢅꢁꢈ6ꢊ
ꢈꢅꢙꢂ ꢇꢁꢅꢁꢉꢁꢊ
ꢙꢫ
1
ꢃ
ꢚꢠꢖ ꢈ ꢩꢀ
ꢁꢅꢙꢁ ꢇꢁꢅꢁꢁ8ꢊ ꢃ
ꢙꢫ
ꢂꢫ ꢁꢅꢄꢈ - ꢁꢅꢉꢈ ꢇꢁꢅꢁꢈꢙ - ꢁꢅꢁꢙꢁꢊ
ꢁꢅꢙꢉ ꢇꢁꢅꢁꢈꢁꢊ
ꢈꢅꢙꢂ ꢇꢁꢅꢁꢉꢁꢊ ꢋꢌꢃ
ꢘ
ꢃ ꢧ-ꢋ ꢀ
ꢈꢅꢄꢉ ꢇꢁꢅꢁꢉꢄꢊ
ꢈꢅꢂꢉ ꢇꢁꢅꢁ6ꢆꢊ
ꢈꢅꢙꢉ - ꢈꢅ6ꢉ
ꢇꢁꢅꢁ4ꢆ - ꢁꢅꢁ6ꢉꢊ
ꢇꢋꢌꢈꢁꢍ ꢈ
ꢉ
ꢁꢅꢈꢁ ꢇꢁꢅꢁꢁ4ꢊ
ꢁꢅꢙꢉ ꢇꢁꢅꢁꢈꢁꢊ
ꢁꢅꢈꢁ ꢇꢁꢅꢁꢁ4ꢊ ꢃ
ꢌꢓꢧꢰꢩNꢬ ꢚLꢧNꢓ
ꢂꢫ
ꢁꢅꢈꢂ ꢇꢁꢅꢁꢁꢂꢊ
ꢁꢅꢙꢉ ꢇꢁꢅꢁꢈꢁꢊ
C
ꢮꢏꢕꢏꢔꢏꢖꢗꢏ
ꢌꢍꢟꢣꢏꢔ ꢚꢛꢣ
ꢀꢠꢢꢏꢖꢐꢠꢍꢖꢐ
ꢏ
Nꢍꢎꢏꢐꢑ
ꢈꢅ ꢒꢓꢀꢓꢃ ꢔꢏꢕꢏꢔꢏꢖꢗꢏꢑ ꢘꢌ-ꢁꢈꢙꢅ
ꢙꢅ ꢚꢛꢗꢜꢛꢝꢏ ꢍꢞꢎꢟꢠꢖꢏ ꢏxꢗꢟꢞꢐꢠꢡꢏ ꢍꢕ ꢢꢍꢟꢣ ꢕꢟꢛꢐꢤ ꢛꢖꢣ ꢢꢏꢎꢛꢟ ꢥꢞꢔꢔꢅ
ꢄꢅ ꢚꢛꢗꢜꢛꢝꢏ ꢍꢞꢎꢟꢠꢖꢏ ꢠꢖꢗꢟꢞꢐꢠꢡꢏ ꢍꢕ ꢦꢟꢛꢎꢠꢖꢝ ꢎꢤꢠꢗꢜꢖꢏꢐꢐꢅ
ꢙꢅꢁꢁ ꢇꢁꢅꢁꢂꢆꢊ
4ꢅꢆꢁ ꢇꢁꢅꢈꢆꢄꢊ
4ꢅ ꢀꢛꢎꢞꢢꢐ ꢧ ꢛꢖꢣ ꢋ ꢎꢍ ꢥꢏ ꢣꢏꢎꢏꢔꢢꢠꢖꢏꢣ ꢛꢎ ꢣꢛꢎꢞꢢ ꢦꢟꢛꢖꢏ ꢨꢅ
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ꢏ
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ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅ6ꢂ01ꢅ31ꢄ
14
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ꢓꢥꢄꢈ-ꢛꢲ ꢋꢇ ꢈꢑꢐꢱꢑꢡꢓꢔ
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ꢕꢖꢗꢚ8 ꢋꢙꢖꢕ4ꢔ ꢊꢓꢩꢖ
ꢕꢖꢙꢗꢚ ꢋꢗꢜꢖꢗ8ꢔ
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ꢕꢖꢕꢜꢜ ꢋꢕꢖ84ꢔ
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ꢕꢖꢕꢗꢕ ꢀ ꢕꢖꢘꢙ ꢀ ꢲ ꢉ ꢶ
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ꢕꢖꢗꢕꢕ ꢋꢘꢖꢙ4ꢔ
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ꢕꢖꢕꢗꢗ ꢋꢕꢖꢘ8ꢔ
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ꢕꢖꢕꢗꢚ ꢋꢕꢖ48ꢔ
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ꢕꢖꢕ46 ꢋꢗꢖꢗꢛꢔ
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ꢀꢁꢂꢃꢄ1ꢅꢂ0ꢆ0ꢇ1ꢇ
15
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ꢌꢀꢲꢳ-ꢆꢈꢭ ꢴK ꢳꢔꢘꢫꢔꢓꢌꢵ
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ꢧꢏꢧꢧ4 ꢨꢧꢏꢆꢧꢩ ꢬ
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ꢧꢏꢧꢈ8 ꢨꢧꢏꢉꢆꢩ
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ꢧꢏꢪꢈꢆ ꢨ8ꢏꢆꢝꢩ
ꢞ
8
ꢉ
6ꢏ ꢂꢔꢋꢠꢑꢍ ꢚ ꢔꢒꢕ ꢭ ꢋꢊ ꢢꢌ ꢕꢌꢋꢌꢗꢑꢐꢒꢌꢕ ꢔꢋ ꢂꢔꢋꢠꢑ ꢮꢏ
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ꢂꢔꢋꢠꢑꢍ ꢚ ꢔꢒꢕ ꢭꢏ ꢯꢛꢔxꢰ ꢕꢐꢑꢌꢒꢍꢐꢊꢒꢍ ꢒꢊꢋꢌꢕ ꢐꢒꢘꢖꢠꢕꢌ ꢢꢊꢋꢟ
ꢍꢐꢱꢌ ꢔꢒꢕ ꢙꢊꢍꢐꢋꢐꢊꢒꢔꢖ ꢋꢊꢖꢌꢗꢔꢒꢘꢌꢍꢏ
6
ꢧꢏ4ꢈꢞ ꢨꢆꢧꢏꢞꢧꢩ
ꢀꢁꢂꢃꢄꢅꢆꢇꢂ0ꢈ0ꢃ1ꢃ
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Part Ordering Information
• LinkSwitch Product Family
• 3 Series Number
• Package Identifier
D
E
K
SO-8C
eSIP-7C
eSOP-12B
• Tape & Reel and Other Options
Blank
Standard Configuration
Tape & Reel, 2.5 k pcs for D package, 1 k pcs for K package.
TL
LNK 64x7 D - TL
17
Rev. C 03/16
www.power.com
Revision Notes
Date
A
A
A
Code A.
10/16/13
03/13/14
06/11/14
Specified Max BYPASS Pin Current.
Code L. Updated Table 1 and Table 2.
Added LNK64x4, 64x5 and 64x6 parts. Updated fRATIO(CC), ILIMIT(MIN), tFB, VFB(AR), fOSC(MIN), tAR-OFF and IOL. Updated ms values in
B
C
03/31/15
03/16
Auto-Restart section on page 3. Removed fOSC(AR) and updated tAR-ON
.
Added Note G on page 11.
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations
does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at http://www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose
failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or
death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS,
HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power
Integrations, Inc. Other trademarks are property of their respective companies. ©2016, Power Integrations, Inc.
Power Integrations Worldwide Sales Support Locations
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