PLCDA03_07 [PROTEC]

ULTRA LOW CAPACITANCE TVS ARRAY; 超低电容TVS阵列
PLCDA03_07
型号: PLCDA03_07
厂家: PROTEK DEVICES    PROTEK DEVICES
描述:

ULTRA LOW CAPACITANCE TVS ARRAY
超低电容TVS阵列

电视
文件: 总5页 (文件大小:81K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PLCDA03  
thru  
PLCDA24  
ULTRA LOW CAPACITANCE TVS ARRAY  
APPLICATIONS  
Ethernet - 10/100 Base T  
FireWire, SCSI & USB  
Audio/Video Inputs  
xDSL Interfaces  
Cellular Phone Terminals  
IEC COMPATIBILITY (EN61000-4)  
61000-4-2 (ESD): Air - 15kV, Contact - 8kV  
61000-4-4 (EFT): 40A - 5/50ns  
SO-8  
61000-4-5 (Surge): 24A, 8/20µs - Level 2(Line-Gnd) & Level 3(Line-Line)  
FEATURES  
500 Watts Peak Pulse Power per Line (tp=8/20µs)  
Bidirectional Configuration  
Available in Multiple Voltage Types Ranging From 3V to 24V  
Protects Two (2) Lines  
ESD Protection > 40 kilovolts  
Ultra Low Capacitance: 5pF  
RoHS Compliant  
MECHANICAL CHARACTERISTICS  
Molded JEDEC SO-8  
Weight 70 milligrams (Approximate)  
Available in Lead-Free Pure-Tin Plating(Annealed)  
Solder Reflow Temperature:  
Pure-Tin - Sn, 100: 260-270°C  
Consult Factory for Leaded Device Availability  
Flammability Rating UL 94V-0  
12mm Tape and Reel Per EIA Standard 481  
Marking: Marking Code, Logo, Date Code & Pin One Defined By Dot on Top of Package  
PIN CONFIGURATION  
8
5
7
6
1
2
3
4
05076.R8 2/07  
1
www.protekdevices.com  
PLCDA03  
thru  
PLCDA24  
DEVICE CHARACTERISTICS  
MAXIMUM RATINGS @ 25°C Unless Otherwise Specified  
SYMBOL  
VALUE  
500  
UNITS  
Watts  
°C  
PARAMETER  
PPP  
TL  
Peak Pulse Power (tp = 8/20µs) - See Figure 1  
Operating Temperature  
-55 to 150  
-55 to 150  
Storage Temperature  
TSTG  
°C  
ELECTRICAL CHARACTERISTICS PER LINE @ 25°C Unless Otherwise Specified  
PART  
NUMBER  
(See Notes 1)  
DEVICE  
MARKING  
RATED  
STAND-OFF  
VOLTAGE  
MINIMUM  
BREAKDOWN  
VOLTAGE  
MAXIMUM  
CLAMPING  
VOLTAGE  
(See Fig. 2)  
MAXIMUM  
CLAMPING  
VOLTAGE  
(See Fig. 2)  
MAXIMUM  
LEAKAGE  
CURRENT  
MAXIMUM  
CAPACITANCE  
(See Note 2)  
@ 1mA  
V(BR)  
VOLTS  
@ IP = 1A  
VC  
VOLTS  
@VWM  
@0V, 1 MHz  
VWM  
VOLTS  
@8/20µs  
VC @ IPP  
I
C
pF  
µDA  
PLCDA03  
PLCDA05  
PLCDA08  
PLCDA12  
PLCDA15  
PLCDA24  
SGA  
SGB  
SGF  
SGC  
SGD  
SGE  
3.3  
5.0  
8.0  
12.0  
15.0  
24.0  
4.5  
6.0  
8.5  
13.3  
16.7  
26.7  
7.0  
9.8  
13.4  
19.0  
24.0  
43.0  
10.9V @ 43.0A  
13.5V @ 42.0A  
16.0V @ 34.0A  
25.9V @ 21.0A  
30.0V @ 17.0A  
49.0V @ 12.0A  
125  
20  
10  
1
1
1
5
5
5
5
5
5
Note 1: Devices are designed to be used in parallel (See Circuit Diagram). For other applications, contact the factory. Do not apply surge in the  
“forward” direction of the TVS.  
Note 2: Do not surge from pins 8 to 1, 2 to 7, 6 to 3 and 4 to 5. PIV typically greater than 100V for each rectifier die. Electrical characteristics apply  
to pins 1 to 8, 7 to 2, 3 to 6 and 5 to 4.  
FIGURE 1  
FIGURE 2  
PEAK PULSE POWER VS PULSE TIME  
PULSE WAVE FORM  
120  
100  
10,000  
1,000  
TEST  
tf  
WAVEFORM  
PARAMETERS  
tf = 8µs  
Peak Value IPP  
e-t  
500W 8/20µs Waveform  
80  
60  
40  
td = 20µs  
100  
10  
td = t  
IPP/2  
20  
0
0
5
10  
15  
20  
25  
30  
0.1  
1
10  
100  
1,000  
10,000  
t - Time - µs  
td - Pulse Duration - µs  
05076.R8 2/07  
2
www.protekdevices.com  
PLCDA03  
thru  
PLCDA24  
GRAPHS  
FIGURE 3  
FIGURE 4  
POWER DERATING CURVE  
OVERSHOOT & CLAMPING VOLTAGE FOR PLCDA05  
100  
80  
40  
30  
20  
Peak Pulse Power  
8/20µs  
60  
40  
20  
0
10  
0
Average Power  
0
25  
50  
75  
100  
125 150  
ESD Test Pulse: 25 kilovolt, 1/30ns (waveshape)  
TL - Lead Temperature - °C  
FIGURE 5  
TYPICAL CLAMPING VOLTAGE VS PEAK PULSE CURRENT FOR PLCDA15  
30  
20  
10  
0
0
2
4
6
8
10  
12  
IPP - Peak Pulse Current - Amps  
FIGURE 6  
FIGURE 7  
INSERTION LOSS - PLCDA05  
RETURN LOSS - PLCDA05  
20 db  
Ref 0 db  
-20 db  
20 db  
Ref 0 db  
-20 db  
-50 db  
-50 db  
100 MHz per Division  
100 MHz per Division  
05076.R8 2/07  
3
www.protekdevices.com  
PLCDA03  
thru  
PLCDA24  
APPLICATION NOTE  
The PLCDA Series are low capacitance, bidirectional TVS arrays that are designed to protect I/O or high speed data lines from the damaging effects  
of ESD or EFT. This product series has a surge capability of 500 Watts PPP per line for an 8/20µs waveshape and offers ESD protection > 40kv.  
BIDIRECTIONAL COMMON-MODE CONFIGURATION (Figure 1)  
Ideal for use in USB applications, the PLCDA Series provides up to two (2) lines of protection in a common-mode configuration as depicted in Figure 1.  
Circuit connectivity is as follows:  
Figure 1. Typical Common-Mode USB Protection  
Circuit  
Pins 1 & 2 and 3 & 4 are connected to Ground  
Pins 5 and 6 are connected to I/O Line D+  
Pins 7 and 8 are connected to I/O Line D-  
D+  
D-  
USB  
IC  
CIRCUIT BOARD LAYOUT RECOMMENDATIONS  
Circuit board layout is critical for Electromagnetic  
Compatibility (EMC) protection. The following  
guidelines are recommended:  
8
1
7
2
6
3
5
4
The protection device should be placed near the  
input terminals or connectors, the device will  
divert the transient current immediately before it  
can be coupled into the nearby traces.  
GND  
The path length between the TVS device and  
the protected line should be minimized.  
All conductive loops including power and ground  
loops should be minimized.  
The transient current return path to ground  
should be kept as short as possible to reduce  
parasitic inductance.  
Ground planes should be used whenever  
possible. For multilayer PCBs, use ground vias.  
05076.R8 2/07  
4
www.protekdevices.com  
PLCDA03  
thru  
PLCDA24  
SO-8 PACKAGE OUTLINE & DIMENSIONS  
PACKAGE OUTLINE  
SO-8  
-A-  
8
1
5
0.010” (0.25 MM)  
B
M
M
+
PACKAGE DIMENSIONS  
MILLIMETERS  
P
-B -  
4 PL  
INCHES  
4
DIM  
MIN  
MAX  
MIN  
MAX  
A
B
C
D
F
G
J
K
P
R
4.80  
3.80  
1.35  
0.35  
0.40  
5.00  
4.00  
1.75  
0.49  
1.250  
0.189  
0.150  
0.054  
0.014  
0.016  
0.196  
0.157  
0.068  
0.019  
0.049  
D
G
C
R x 45°  
1.27 BSC 1.27 BSC 0.05 BSC 0.05 BSC  
0.18  
0.10  
5.80  
0.25  
0.25  
0.25  
6.20  
0.50  
0.007  
0.004  
0.229  
0.010  
0.009  
0.008  
0.244  
0.019  
0° - 10°  
-T-  
J
K
F
NOTES  
0.010” (0.25 MM)  
T B  
A
S S  
M
+
8 PL  
1. - T - = Seating Plane and Datum Surface.  
2. Dimensions “A” and “B” are Datum.  
3. Dimensions “A” and “B” do not include mold protrusion.  
4. Maximum mold protrusion is 0.015” (0.380 mm) per side.  
5. Dimensioning and tolerances per ANSI Y14.5M, 1982.  
6. Dimensions are exclusive of mold flash and metal burrs.  
MOUNTING PAD  
0.050 ± 0.005”  
0.030 ± 0.005”  
TAPE & REEL/BULK ORDERING NOMENCLATURE  
1. Surface mount product is taped and reeled in accordance with EIA-481.  
2. Suffix-T7 = 7 Inch Reel - 1,000 pieces per 12mm tape, i.e. PLCDA05-T7.  
3. Suffix-T13 = 13 Inch Reel - 2,500 pieces per 12mm tape,  
i.e., PLCDA05-T13.  
0.160 ± 0.005”  
0.245” MIN  
4. Suffix - LF = Lead-Free, Pure-Tin Plating, i.e., PLCDA05-LF-T7.  
5. No Suffix = Product Shipped in Tubes of 98 pcs per Tube.  
0.045 ± 0.005”  
ProTek Devices  
2929 South Fair Lane, Tempe, AZ 85282  
COPYRIGHT © ProTek Devices 2007  
SPECIFICATIONS: ProTek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except JEDEC).  
Tel: 602-431-8101 Fax: 602-431-2288  
E-Mail: sales@protekdevices.com  
Web Site: www.protekdevices.com  
DESIGN CHANGES: ProTek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is  
the buyer’s and that in furnishing engineering and technical assistance, ProTek assumes no responsibility with respect to the selection or specifications of such  
products.  
05076.R8 2/07  
5
www.protekdevices.com  

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