PE3511 [PSEMI]
1500 MHz Low Power UltraCMOS? Divide-by-2 Prescaler; 1500兆赫低功率的UltraCMOS ？分频预分频器
| 型号： | PE3511 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | 1500 MHz Low Power UltraCMOS? Divide-by-2 Prescaler |
| 文件： | 总8页 (文件大小：224K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PE3511
1500 MHz Low Power UltraCMOS™
Divide-by-2 Prescaler
Product Description
The PE3511 is a high-performance static UltraCMOS™
prescaler with a fixed divide ratio of 2. Its operating frequency
range is DC to 1500 MHz. The PE3511 operates on a nominal
3 V supply and draws only 8 mA. The input and output
interfaces support both AC-coupled, low-Z RF as well as direct
connection to low voltage positive logic devices. It is packaged
in a small 6-lead SC-70 and is ideal for frequency scaling
solutions
Features
• DC to 1500 MHz operation
• Fixed divide ratio of 2
• Low-power consumption: 8 mA typical
@ 3V
• RF or LV Digital Interface
The PE3511 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi©) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
• Ultra-small package: 6-lead SC-70
Figure 2. Package Type
Figure 1. Functional Schematic Diagram
6-lead SC70
D
Q
OUT
CLK
IN
OUTPUT BUFFER
DRIVER
QB
PREAMP
Table 1. Electrical Specifications (ZS = ZL = 50 Ω)
V
DD = 3.0 V, -40° C ≤ TA ≤ 85° C, unless otherwise specified
Parameter
Supply Voltage
Conditions
Minimum
Typical
Maximum
3.15
Units
V
2.85
3.0
8
Supply Current
12
mA
Input Frequency (Fin)
DC
-10
0
1500
+10
MHz
dBm
dBm
dBm
DC < Fin ≤ 1000 MHz
1000 MHz < Fin ≤ 1500
DC < Fin ≤ 1500 MHz
Input Power (Pin)
Output Power (Pout)
2
Document No. 70-0106-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
PE3511
Product Specification
Table 2. DC Electrical Characteristics (-40° C ≤ TA ≤ 85° C)
Symbol
VIH
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Condition
2.7 V ≤ VDD ≤ 3.3 V
Typical
2.0
Unit
V
VIL
2.7 V ≤ VDD ≤ 3.3 V
0.8
V
VOH
VDD = 2.7 V; IOH = 2.9 mA
VDD = 2.7 V; IOL = 2.6 mA
2.2
V
VOL
0.4
V
Table 3. AC Characteristics (-40° C ≤ TA ≤ 85° C)
Symbol
Parameter
Condition*
Typical
Unit
Propagation Delay
50 MHz Pulse Train Input;
tPHL
(High to Low)
CL = 10 pF, RL = 500 ꢀ
2.6
2.8
2.2
2.1
ns
ns
ns
ns
Propagation Delay
(Low to High)
Output Rise Time
(10% to 90%)
Output Fall Time
(90% to 10%)
50 MHz Pulse Train Input;
tPLH
tr
CL = 10 pF, RL = 500 ꢀ
50 MHz Pulse Train Input;
CL = 10 pF, RL = 500 ꢀ
50 MHz Pulse Train Input;
tf
CL = 10 pF, RL = 500 ꢀ
* See figure 5 for AC test circuit
Table 4. Typical Output Swing (VDD = 2.7 V)
Frequency
Condition
Typical
Unit
200 mVp-p Sinusoidal Input;
50 MHz
2.3
Vp-p
CL = 10 pF, RL = 500 ꢀ
200 mVp-p Sinusoidal Input;
500 MHz
1.9
1.6
Vp-p
Vp-p
CL = 10 pF, RL = 500 ꢀ
200 mVp-p Sinusoidal Input;
1500 MHz
CL = 10 pF, RL = 500 ꢀ
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0106-03 │ UltraCMOS™ RFIC Solutions
Page 2 of 8
PE3511
Product Specification
Figure 3. Pin Configuration (Top View)
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 6.
pin 1
1
2
3
6
5
4
NC
GND
IN
OUT
GND
VDD
Latch-Up Avoidance
SC-70
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Pin Descriptions
Device Functional Considerations
Pin
No.
Pin
Name
Description
The PE3511 divides an input signal, up to a
frequency of 1500 MHz, by a factor of two thereby
producing an output frequency at half the input
frequency. To work properly with low impedance,
ground referenced interfaces, the input and output
signals (pins 3 & 6) must be AC coupled via an
external capacitor, as shown in the test circuit in
Figure 4.
1
N/C
No Connect. This pin should be left open.
2
GND
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
3
IN
Input signal pin. DC blocking capacitor
required (100 pF typical).
4
5
6
VDD
Power supply pin. Bypassing is required.
Ground pin.
GND
OUT
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 9 for a layout example.
Divided frequency output pin. DC blocking
capacitor required (100 pF typical).
Table 6. Absolute Maximum Ratings
Symbol Parameter/Conditions Min
Max
Units
VDD
Pin
Supply voltage
4.0
13
V
dBm
°C
Input Power
TST
TOP
Storage temperature range
-65
-40
150
85
Operating temperature
range
°C
VESD
ESD voltage (Human Body
Model)
2000
V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
Document No. 70-0106-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 8
PE3511
Product Specification
Figure 4. Test Circuit Block Diagram
Spectrum
Analyzer
50 Ohm
1 N/C
OUT 6
GND 5
VDD 4
100 pF
PE3511
2 GND
3 IN
50 Ohm
100 pF
100 pF
VDD
3V +/- 0.15 V
1000 pF
Signal
Generator
Figure 5. AC Test Circuit
VDD
Pulse
PE3511
Generator
CL
RL
RT
RT = Zout of pulse generator
(usually 50 ohm)
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0106-03 │ UltraCMOS™ RFIC Solutions
Page 4 of 8
PE3511
Product Specification
Typical Performance Data: VDD = 3.0 V
Figure 6. Input Sensitivity
Figure 7. Device Current
Figure 8. Output Power
Document No. 70-0106-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
PE3511
Product Specification
bottom ground areas for best performance.
Evaluation Kit
Evaluation Kit Operation
J6 provides DC power to the device via pin 4. Two
decoupling capacitors (100 pF, 1000 pF) are
included on this trace. It is the customer’s
responsibility to determine proper supply decoupling
for their design application.
The SC-70 Prescaler Evaluation Board was
designed to help customers evaluate the PE3511
divide-by-2 prescaler. On this board, the device
input (pin 3) is connected to connector J1 through a
50 ꢀ transmission line. A series capacitor (C1)
provides the necessary DC block for the device
input. A value of 100 pF was used for this board
layout; other applications may require a different
value.
Applications Support
If you have a problem with your evaluation kit or if
you have applications questions call (858) 731-9400
and ask for applications support. You may also con-
tact us by fax or e-mail:
Fax: (858) 731-9499
E-Mail: help@psemi.com
The device output (pin 6) is connected to J3 through
a 50 ꢀ transmission line. A series capacitor (C5)
provides the necessary DC block for the device
output. This capacitor value must be chosen to have
a low impedance at the desired output frequency of
the device. A value of 100 pF was chosen for the
evaluation board. At both input and output, select a
capacitor value that offers low series reactance while
ensuring that any parasitic resonances are well
above the operating bandwidth.
Figure 9. Evaluation Board Layouts
Peregrine Specification 101/0110
The board is constructed of a two-layer FR4 material
with a total thickness of 0.031”. The bottom layer
provides ground for the RF transmission lines. The
transmission lines were designed using a coplanar
waveguide above ground plane model with trace
width of 0.030”, trace gaps of 0.007”, dielectric
thickness of 0.028”, metal thickness of 0.0014”, and
εr of 4.4. Note that the predominate mode of these
transmission lines is coplanar waveguide. Liberal
numbers of plated through holes unite the top and
Figure 10. Evaluation Board Schematic
Peregrine Specification 102/0189
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0106-03 │ UltraCMOS™ RFIC Solutions
Page 6 of 8
PE3511
Product Specification
Figure 11. Package Drawing
6-lead SC-70
1.80
2.20
0.65
BSC
0.10
0.30
1.80
2.40
1.15
1.35
0.10
0.40
0.15
0.30
0.10
0.18
0.80
1.00
0.80
1.10
0.00
0.10
Table 7. Ordering Information
Order Code
3511-01
Part Marking
Description
Package
6-lead SC-70
Shipping Method
7680 units / Canister
3000 units / T&R
1 / Box
511
511
PE3511-06SC70-7680A
PE3511-06SC70-3000C
PE3511-06SC70-EK
3511-02
6-lead SC-70
3511-00
PE3511-EK
511
Evaluation Kit
3511-51
PE3511G-06SC70-7680A
PE3511G-06SC70-3000C
Green 6-lead SC-70
Green 6-lead SC-70
7680 units / Canister
3000 units / T&R
3511-52
511
Document No. 70-0106-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 8
PE3511
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel 858-731-9400
Fax 858-731-9499
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
South Asia Pacific
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Preliminary Specification
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0106-03 │ UltraCMOS™ RFIC Solutions
Page 8 of 8
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