PE35400A-G [PSEMI]

UltraCMOS Divide-by-4 Prescaler, 3–13.5 GHz;
PE35400A-G
型号: PE35400A-G
厂家: Peregrine Semiconductor    Peregrine Semiconductor
描述:

UltraCMOS Divide-by-4 Prescaler, 3–13.5 GHz

文件: 总13页 (文件大小:2388K)
中文:  中文翻译
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PE35400  
Document Category: Product Specification  
UltraCMOS® Divide-by-4 Prescaler, 3–13.5 GHz  
Features  
• High frequency support up to 13.5 GHz  
Figure 1 • PE35400 Functional Diagram  
• Low SSB phase noise of –135 dBc/Hz @  
3.025 GHz output frequency  
D
Q
D
Q
• Low supply current of 16 mA  
• Bare die  
Q
Q
Applications  
• Wireless communication  
Test and measurement  
• Phased array radar  
Product Description  
The PE35400 is a high-performance UltraCMOS® prescaler with a fixed divide ratio of 4. It supports an operating  
frequency range from 3–13.5 GHz. It operates on a single voltage supply with a frequency-selecting bias resistor  
and draws a low current of 16 mA. The PE35400 is available in bare die.  
The PE35400 is manufactured on Peregrine’s UltraCMOS process, a patented variation of silicon-on-insulator  
(SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of  
conventional CMOS.  
©2015, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121  
Product Specification  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Absolute Maximum Ratings  
Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be  
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for  
extended periods may reduce reliability.  
ESD Precautions  
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.  
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to  
avoid exceeding the rating specified in Table 1.  
Latch-up Immunity  
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.  
Table 1 • Absolute Maximum Ratings for PE35400  
Parameter/Condition  
Min  
Max  
Unit  
Supply voltage, VDD  
–0.3  
3.3  
+14  
+150  
250  
V
dBm  
°C  
Input power, 50  
Storage temperature range  
–65  
ESD voltage HBM, all pins(*)  
V
Note: * Human body model (MIL-STD 883 Method 3015).  
Recommended Operating Conditions  
Table 2 lists the recommending operating conditions for the PE35400. Devices should not be operated outside  
the recommended operating conditions listed below.  
Table 2 • Recommended Operating Conditions for PE35400  
Parameter  
Min  
Typ  
Max  
Unit  
Supply voltage, VDD  
2.65  
2.8  
2.95  
+7  
V
Input power, 50, based on optimal RBIAS (see Figure 3), PIN  
Operating temperature range  
dBm  
°C  
–40  
+85  
Page 2  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Electrical Specifications  
Table 3 provides the PE35400 key electrical specifications @ +25 °C, VDD = 2.8V (ZS = ZL = 50), unless  
otherwise specified.  
Table 3 • PE35400 Electrical Specifications(*)  
Parameter  
Condition  
Min  
Typ  
Max  
Unit  
Operating frequency, FIN  
3.0 GHz  
13.5 GHz As shown  
F
IN = 3–4.5 GHz  
FIN = >4.5–11.5 GHz  
IN = >11.5–13.5 GHz  
–5  
–15  
–1  
0
> –7  
> –20  
> –7  
5
dBm  
dBm  
dBm  
dBm  
dBm  
dBc/Hz  
mA  
Input power sensitivity  
F
Output power  
0.75–3.375 GHz output frequency range  
FIN = 3–13.5 GHz, PIN = 0 dBm  
Reverse leakage  
SSB phase noise  
Supply current, IDD  
–45  
–135  
16  
3.025 GHz output frequency @ 100 kHz offset, PIN = 0 dBm  
FIN = 8 GHz  
Note: * All values in Min/Max columns are guaranteed by design characterization.  
DOC-64872-2 – (10/2015)  
Page 3  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Device Functional Considerations  
The PE35400 divides a 3.0–13.5 GHz input signal by four, producing a 750 MHz to 3.375 GHz output signal. In  
order for the prescaler to work properly, several conditions need to be adhered to. It is crucial that VBYPS and VDD  
are supplied with bypass capacitors to ground. In addition, the output signal RFOUT needs to be AC coupled via  
an external capacitor, as shown in Figure 2. The input frequency range is selected by the value of RBIAS  
according to Figure 3. The ground pattern on the board should be made as wide as possible to minimize ground  
impedance.  
Figure 2 • Circuit Block Diagram for PE35400(*)  
10 pF  
RBIAS  
GND  
RBIAS  
VBYPS  
0.01 μF  
10 pF  
VDD  
VDD  
10 pF  
0.01 μF  
VBYPS  
50Ω  
RFOUT  
6.8 pF  
RFIN  
50Ω  
GND  
Transmission  
Line  
Die ID  
Transmission  
Line  
Note: * For optimal performance, the following bond wire configuration is recommended. V  
: 2 bond wires per pad. RF : 1 bond wire. GND: 3  
IN  
BYPS  
bond wires per pad. RF  
: 2 bond wires. V : 2 bond wires. R  
: 1 bond wire.  
BIAS  
OUT DD  
Page 4  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Typical Performance Data  
Figure 3 through Figure 11 show the typical performance data @ +25 °C, VDD = 2.8V (ZS = ZL = 50), based on  
optimal RBIAS as shown in Figure 3, unless otherwise specified.  
Figure 3 • Frequency vs RBIAS  
Lower Freq Limit (PIN = 0 dBm)  
Optimal Level  
Upper Freq Limit (PIN = 0 dBm)  
Lower Freq Limit (PIN = -7 dBm)  
Upper Freq Limit (PIN = -7 dBm)  
16  
14  
12  
10  
8
6
4
2
0
5.6  
8.2  
12  
18  
27  
39  
56  
RBIAS (kΩ)  
DOC-64872-2 – (10/2015)  
Page 5  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Figure 4 • Input Power Sensitivity  
Min PIN  
Max PIN  
10  
5
0
Recommended input power  
operating region  
-5  
-10  
-15  
-20  
RBIAS = 56 kΩ  
RBIAS = 5.6 kΩ  
-25  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
Input Frequency (GHz)  
4.5 GHz  
11.5 GHz  
Figure 5 • Input Power Sensitivity vs Temperature  
Min PIN -40 °C  
Max PIN -40 °C  
Min PIN +25 °C  
Max PIN +25 °C  
Min PIN +85 °C  
Max PIN +85 °C  
10  
5
RBIAS = 56 kΩ  
RBIAS = 5.6 kΩ  
0
-5  
-10  
-15  
-20  
-25  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
Input Frequency (GHz)  
4.5 GHz  
11.5 GHz  
Page 6  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Figure 6 • Output Power vs VDD  
Output power @ 2.65V  
Output power @ 2.8V  
Output power @ 2.95V  
10  
9
8
7
6
5
4
3
2
1
0
2
14  
3
4
5
6
7
8
9
10  
11  
12  
13  
RBIAS Max  
= 56 kΩ  
RBIAS Min  
= 5.6 kΩ  
Input Frequency (GHz)  
Figure 7 • Output Power vs Temperature  
Output power @ -40 °C  
Output power @ +25 °C  
Output power @ +85 °C  
10  
9
8
7
6
5
4
3
2
1
0
2
14  
3
4
6
7
8
9
10  
11  
12  
13  
RBIAS Max  
= 56 kΩ  
RBIAS Min  
= 5.6 kΩ  
Input Frequency (GHz)  
DOC-64872-2 – (10/2015)  
Page 7  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Figure 8 • SSB Phase Noise @ 3.025 GHz Output Frequency, PIN = 0 dBm  
SSB Phase Noise @ 3.025 GHz Output Frequency  
-125  
-130  
-135  
-140  
-145  
-150  
-155  
-160  
1.E+05  
1.E+06  
1.E+07  
Offset Frequency (Hz)  
Figure 9 • Output Harmonics, PIN = 0 dBm  
2nd Harmonic  
3rd Harmonic  
Feedthru  
0
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
2
4
6
8
10  
12  
14  
Input Frequency (GHz)  
Page 8  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Figure 10 • IDD vs RBIAS  
Supply Current  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
5.6  
8.2  
12  
18  
27  
39  
56  
RBIAS (kΩ)  
Figure 11 • Reverse Leakage, PIN = 0 dBm  
Reverse Leakage  
-20  
-30  
-40  
-50  
-60  
-70  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
Input Frequency (GHz)  
DOC-64872-2 – (10/2015)  
Page 9  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Pad Configuration  
This section provides pad information for the  
PE35400. Figure 12 shows the pad configuration of  
this device. Table 4 provides a description for each  
pad.  
Table 4 • Pad Descriptions for PE35400  
Pad  
Pad No.  
Description  
Name  
VBYPS  
VBYPS  
RFIN  
Figure 12 • Pad Configuration (Top View)  
1
2
3
4
5
6
7
8
Prescaler supply bypass  
Prescaler supply bypass  
RF input  
8
GND  
7
1
RBIAS  
GND  
Ground  
VBYPS  
RFOUT  
RF output  
6
VDD  
VDD  
RBIAS  
GND  
Supply voltage  
2
Frequency selecting bias resistor  
Ground  
VBYPS  
5
3
RFOUT  
4
GND  
RFIN  
Die ID  
Page 10  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Die Mechanical Specifications  
This section provides the die mechanical specifications for the PE35400.  
Table 5 • Mechanical Specifications for PE35400  
Parameter  
Min  
Typ  
Max  
Unit  
Condition  
Including excess sapphire, max  
tolerance = –20/+30 µm  
Die size, singulated (x,y)  
866 × 716  
180  
886 × 736  
916 × 766  
220  
µm  
Wafer thickness  
Wafer size  
200  
150  
µm  
mm  
Table 6 • Pad Coordinates for PE35400(*)  
Figure 13 • Pad Layout for PE35400(1)(2)  
Pad Opening  
Size (µm)  
Pad Center (µm)  
Pad Pad  
No. Name  
8
GND  
7
1
RBIAS  
X
Y
X
Y
VBYPS  
VBYPS  
VBPYS  
RFIN  
1
2
3
4
5
6
7
8
–303  
–303  
–303  
68  
198  
–3  
160  
160  
100  
290  
100  
130  
130  
290  
180  
180  
100  
130  
190  
190  
130  
130  
6
VDD  
2
–208  
–243  
–193  
40  
VBYPS  
GND  
5
RFOUT  
333  
318  
318  
14  
3
RFOUT  
4
RFIN  
VDD  
RBIAS  
GND  
GND  
Die ID  
243  
243  
886 μm (−20 / +30 μm)  
Notes:  
1) Drawings are not drawn to scale.  
Note: * All pad locations originate from the die center and refer to the  
2) Singulated die size shown, pad side up.  
center of the pad.  
DOC-64872-2 – (10/2015)  
Page 11  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Waffle Pack Information  
Figure 14 provides the waffle pack information for the PE35400.  
Figure 14 • 2 × 2 Inch Waffle Pack for PE35400(1)(2)(3)  
Notch  
Pocket Closeup  
Pad 1  
Die ID  
Notes:  
1) Drawings are not drawn to scale.  
2) Die in pocket shown pad side up.  
3) Die will be oriented in the same direction in and within all waffle packs. Unless otherwise stated, die will be oriented such that the top left corner  
of die will be in-line with the "notched" corner of the die plate base and corner. The die base cover label will be affixed on the die base cover  
such that the top of the label indicates the top of the die within the waffle pack.  
Page 12  
DOC-64872-2 – (10/2015)  
www.psemi.com  
PE35400  
Divide-by-4 Prescaler  
Ordering Information  
Table 7 lists the available ordering code for the PE35400 as well as available shipping method.  
Table 7 • Order Code for PE35400  
Order Codes  
Description  
Packaging  
Shipping Method  
PE35400A–G  
PE35400 die  
Die in 2 × 2 inch waffle pack  
100 die/waffle pack  
Document Categories  
Advance Information  
The product is in a formative or design stage. The datasheet contains  
design target specifications for product development. Specifications  
and features may change in any manner without notice.  
Product Brief  
This document contains a shortened version of the datasheet. For the  
full datasheet, contact sales@psemi.com.  
Not Recommended for New Designs (NRND)  
This product is in production but is not recommended for new designs.  
Preliminary Specification  
The datasheet contains preliminary data. Additional data may be added  
at a later date. Peregrine reserves the right to change specifications at  
any time without notice in order to supply the best possible product.  
End of Life (EOL)  
This product is currently going through the EOL process. It has a  
specific last-time buy date.  
Product Specification  
The datasheet contains final data. In the event Peregrine decides to  
change the specifications, Peregrine will notify customers of the  
intended changes by issuing a CNF (Customer Notification Form).  
Obsolete  
This product is discontinued. Orders are no longer accepted for this  
product.  
Sales Contact  
For additional information, contact Sales at sales@psemi.com.  
Disclaimers  
The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be  
entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party.  
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to  
support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death  
might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in  
such applications.  
Patent Statement  
Peregrine products are protected under one or more of the following U.S. patents: patents.psemi.com  
Copyright and Trademark  
©2015, Peregrine Semiconductor Corporation. All rights reserved. The Peregrine name, logo, UTSi and UltraCMOS are registered trademarks and  
HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp.  
Product Specification  
www.psemi.com  
DOC-64872-2 – (10/2015)  

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