AND711AST-30 [PURDY]

Intelligent Graphic Display; 智能图形显示


型号：	AND711AST-30
厂家：	PURDY ELECTRONICS CORPORATION
描述：	Intelligent Graphic Display 智能图形显示显示器光电
文件：	总3页 (文件大小：131K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AND711AST-30/-EO

240 x 64 Dots

Intelligent Graphic Display

The AND711AST-30/-EO is a full dot matrix LCD module

including an LCD controller and display RAM. This device

can display graphic patterns and symbols and is suitable for

a message display for various instruments such as business

machine terminals.

Absolute Maximum Ratings

Features

• RoHS Compliant

• Super twist

Item

Symbol

V_DD

Rating

5.5

Unit

• 40 character x 8 line capability

• Excellent readability and high contrast ratio

• 8-bit parallel bus for read/write data by CPU interface

• Built-in LCD controller and display RAM (8k byte)

• Character mode, graphic mode, and character and graphic

combination mode

Supply Voltage

V_EE

-19

EL Drive Voltage

(f_EL= 1 kHz)

V_EL

V_rms

130

• RoHS compliant

V_IN

T_op

T_stg

f_EL

–.3 ≤V_IN≤ +.3

0 to +50

-20 to +70

Input Voltage

°C

• Wide operating temperatures range (0°C to + 50°C)

• Compact and easily mounted on any equipment

• User-selectable font–6 x 8 or 8 x 8

Operating Temperature

Storage Temperature

EL Driving Freq. (EO)

˚C

• Available with EL backlighting attached (-EO option)

kHz

Dot Matrix Dimensions

Electrical Characteristics (TA = 25°C)

Item

Symbol

V_DD

Min.

4.5

Typ.

5.0

Max.

5.5

Unit

Supply Voltage

V_EE

–5.75

–8.5

–11.5

High Level In Voltage

(V_DD= 5.0V)

V_IN

V_IL

2.8

–

Low Level In Voltage

(V_DD= 5.0V)

0.8

–

Mechanical Characteristics

High Level Output Volt.

(V_DD= 5.0V)

V_DD

–0.3

V_OH

V_OL

Item

Speciﬁcation

180 (W) x 65 (H) x 10 (D)

240 (W) x 64 (H)

Unit

Low Level Output Volt.

(V_DD= 5.0V)

Outline

–

0.3

Dimensions

I_DD

I_EE

I_EL

–

16.0

2.4

25.0

3.0

Number of Dots

Power Consumption⁽¹⁾

40 x 8 (320) Characters

# of Characters

6 x 8 dot format, alpha-numeric

(2)

4.0

Viewing Area

Bezel Opening

Dot Size

Dot Pitch

Weight (approx.)

132 (W) x 39 (H)

0.49 (W) x 0.49 (H)

0.53 (W) x 0.53 (H)

I20/150 (ST/EO)

gram

1. All dots on. (V_DD= .5V, V_EE= –8.5V, V_EL=110, f_EL= 500 Hz or at Typ.)

2. mA rms

Product specifications contained herein may be changed

without prior notice. It is therefore advisable to contact

Purdy Electronics before proceeding with the design of

equipment incorporating this product.

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085

Tel:408.523.8200 • Fax:408.733.1287 • sales@purdyelectronics.com • www.purdyelectronics.com

7/20/07

AND711AST-30/-EO

Intelligent Graphics Display

Optical Characteristics (TA = 25˚C, φ = 0°, θ = 0)

Power Supply

The LCD panel is driven by the voltage V_DD–V_EE, so an

adjustable V_EEis required for contrast control and

temperature compensation.

Item

Symbol

Right to Left

Up & Down

Min.

Typ.

Max.

Unit

–

2.5

4.8

200

–

Viewing Angle

degree

Contrast

Turn On

Turn Off

Temperature Variations

T_on

350

V_DD–V_EE

Temperature

T_off

250

300

0°C

+25°C

+50°C

13.9

12.5

10.8

Note: Refer to Applications Section for deﬁnitions of viewing

angle, contrast ratio, response time (on and off) and

luminance.

Connector Pin Assignment

Example of Variable Negative Voltage Supply

Pin No.

Signal

FGND

GND

Function

Frame Ground (connected to metal bezel)

Ground (signal)

V_DD

GND

LCD Module

T_R

V_DD

Power Supply for logic (5V)

V_EE

Power Supply for LCD Drive (–8.5 3V)

R1 = 10k, R2 = 10k, T_R2SA1102 or equivalent

Data Write

Data Read

Chip Enable

Timing Relationships and Diagram

WR = “L”, C/D = “H”: Command Write

WR = “L”, C/D = “L”: Data Write

RD = “L”, C/D = “H”: Status Read

RD = “L”, C/D = “L”: Data Read

Signal Timing Relationships

C/D

Item

C/D Set Up Time

C/D Hold Time

Symbol

t_CDS

Min.

100

Max.

Unit

–

No connection

t_CDH

RESET Controller Reset (Active Pullup Required)

CE, RD, WR

t_CE,t_RD,t_WR

–

Data Input/Output

Pulse Width

t_DS

t_DH

Data Set Up Time

Data Hold Time

Access Time

–

t_ACC

t_OH

150

Output Hold Time

Timing Diagram

C/D

t_CDH

t_CDS

Font select. Open or connect to V_DD: 6 x 8 dot

Connect to ground: 8 x 8 dot

No connection

t_CP,t_RD,t_WP

t_DS

RD, WR

D0-D7

(WRITE)

t_DH

t_OH

D0-D7

(READ)

t_ACC

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085

Tel:408.523.8200 • Fax:408.733.1287 • sales@purdyelectronics.com • www.purdyelectronics.com

7/20/07

AND711AST-30/-EO

Intelligent Graphics Display

Block Diagram

Because signal lines are directly connected

to C-MOS and are not pull-up or pull-down

internally, except RESET which is pull-up to

V_DD, you must guard all signals from

external noise.

D0-D7

I/O0-I/O7

A0-A12

D0-D7

AD0-AD12

T6963C

R/W

RAM

(8K byte)

C/D

RESET

X-Driver

HSCP

Control Lines

CDATA

LCD Panel

Y-Driver

240 x 64 Dots

V_EL

EL Backlight

Dimensional Outline

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085

Tel:408.523.8200 • Fax:408.733.1287 • sales@purdyelectronics.com • www.purdyelectronics.com

7/20/07

相关型号：