QM57508TR7 [QORVO]

Quad-Band GSM, Linear EDGE Transmit Module with Sixteen Dedicated High Linearity TRX Switch Ports;
QM57508TR7
型号: QM57508TR7
厂家: Qorvo    Qorvo
描述:

Quad-Band GSM, Linear EDGE Transmit Module with Sixteen Dedicated High Linearity TRX Switch Ports

GSM
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QM57508  
Quad-Band GSM, Linear EDGE Transmit  
Module with Sixteen Dedicated High Linearity  
TRX Switch Ports  
Product Overview  
The QM57508 is a Transmit / Receive Module containing LB  
and MB 2G Power Amplifiers, 16 Tx / Rx Switch Ports, 3  
Antenna and 2 Coupled Output Ports. The amplifiers supports  
GSM and EDGE Class 12 covering GSM850/GSM900 and  
DCS1800/PCS1900 bands. The MB 2G portion also supports  
Band 34 / 39 TD-SCDMA and TDD LTE capability.  
The 16 Tx / Rx switch ports provides Low Insertion Loss / High  
Isolation paths to support 2G GSM/EDGE, 3G UMTS and 4G  
LTE Bands. The low band section has 7 TRX ports, the mid band  
section has 5 TRX ports and the high band section has 4 TRX  
ports. Each switch has a corresponding antenna output  
(LB_MB_HB). There is also a 3P2T switch, which supplies any  
antenna port to either coupled port. (CPL_1 / CPL_2)  
44 Pin 5.5 X 5.5 X 0.69 mm leadless SMT Package  
Key Features  
Highly Functional, Small Footprint, Low Profile Module  
Seven LB High Linearity TRx ports.  
Five MB High Linearity TRx ports.  
Four HB High Linearity TRx ports.  
Low RF Switch Port Loss  
A MIPI RFFE controller operates all functions including selection  
of PA Band / Mode / Bias and Switch Configurations.  
Three LB, MB, HB Antenna ports  
Two Antenna Coupler ports  
Two DC Blocked RF Input ports  
RF Input Bypass option  
Functional Block Diagram  
MIPI RFFE Digital Control  
Supports Vramp or Pin Control  
Applications  
WEDGE Handsets and Connected Devices  
GSM and Linear EDGE Transmit  
GSM and Linear EDGE Uplink Plus Multiband 3G and 4G  
Band 34 / 39 TD - SCDMA  
Band 34 / 39 TDD - LTE  
Ordering Information  
Part Number  
QM57508PCK  
QM57508SB  
Description  
Evaluation Board Sample Kit  
Sample bag with 5 pieces  
7" Reel with 750 pieces  
13" Reel with 5000 pieces  
QM57508TR7  
QM57508TR13-5K  
Design Kit, QM57508PCK + RD2000  
Communication Board  
QM57508DK  
Top View  
QM57508 Data Sheet MP  
www.qorvo.com  
1 of 35  
QM57508  
MMMB Module  
Absolute Maximum Ratings  
Parameter  
Ratings  
-1.2 to 6.0  
-0.3 to 3.0  
2.0  
Units  
V
Supply Voltage (VCC, VBATT)  
Control Voltage (VRAMP)  
V
Digital control signals, SCLK, SDATA, VIO  
RF Input Power for 2G PA  
RF Input Power for all TRX Ports  
Transmit Duty Cycle, Period = 4.6ms  
Output Load VSWR  
V
10  
dBm  
dBm  
%
31  
50  
20:1  
Note  
°C  
Operating Temperature Range  
Storage Temperature Range  
-30 to +85  
-55 to +150  
°C  
Note: Operation of this device outside the parameter ranges given above may cause permanent damage.  
Recommended Operating Conditions  
Parameter  
Min.  
-30  
3.0  
Typ.  
25  
Max.  
85  
Unit  
°C  
V
Conditions  
Operating Ambient Temperature (TA)  
Supply Voltage, VCC  
3.5  
3.5  
4.6  
4.6  
10  
Normal operating range  
Normal operating range  
Supply Voltage, VBATT  
Supply Leakage Current  
3.0  
V
µA  
V
0.16  
1.8  
GSM transmit; minimum RF output power  
GSM transmit; maximum RF output power  
EDGE transmit  
VRAMP Voltage  
0.25  
1.25  
1.65  
1.65  
10  
V
V
VRAMP Capacitance  
pF  
µA  
V
DC to 200kHz  
VRAMP Current  
10  
Supply Voltage, VIO  
1.65  
0
2.0  
MIPI RFFE Supply Voltage  
Required for device reset  
MIPI RFFE logic low (SCLK, SDATA)  
MIPI RFFE logic high (SCLK, SDATA)  
VIO Rise Time  
0.3*VIO  
VIO  
450  
50  
V
0.7*VIO  
V
µs  
µA  
µs  
µs  
Control Current (MIPI Digital Inputs)  
Turn-on Time  
20  
Refer to Timing Diagram  
Port to Port  
Switching Speed  
2
5
Pins 2, 3 and all RF ports listed in Pin  
Description Table  
RF Port Impedance  
50  
Ω
Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions.  
QM57508 Data Sheet MP  
2 of 35  
www.qorvo.com  
QM57508  
MMMB Module  
Power vs Modulation Table  
LTE  
GSM / EDGE TD-SCDMA  
Power vs Modulation Table  
Modulation: QPSK  
5 MHz / 8 RB 5 MHz / 25 RB  
10 MHz / 12 RB 10 MHz / 50 RB 10 MHz / 12 RB 10 MHz / 50 RB  
20 MHz / 18 RB 20 MHz / 100 RB 20 MHz / 18 RB 20 MHz / 100 RB  
Modulation: 16QAM  
5 MHz / 8 RB  
5 MHz / 25 RB  
Freq  
Freq  
Band  
Port  
Pout  
TDS  
(Start)  
(Stop)  
34.5  
34.5  
32.5  
32.5  
28.5  
28.5  
28.5  
28.5  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
GSM 850  
GSM 900  
GSM DCS  
GSM PCS  
EDGE850  
EDGE900  
EDGEDCS  
EDGEPCS  
34  
ANT_L  
ANT_L  
ANT_M  
ANT_M  
ANT_L  
ANT_L  
ANT_M  
ANT_M  
ANT_M  
ANT_M  
824  
880  
849  
915  
NA  
NA  
1710  
1850  
824  
1785  
1910  
849  
NA  
NA  
NA  
880  
915  
NA  
1710  
1850  
2010  
1880  
1785  
1910  
2025  
1920  
NA  
NA  
27.0  
27.0  
26.0  
26.0  
25.0  
25.0  
24.0  
24.0  
23.0  
23.0  
39  
NA  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
3 of 35  
QM57508  
MMMB Module  
Electrical Specifications: GSM Low Band_Vramp Power Control  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.5V, Pout = 34.5 dBm, TA=+25°C, GMSK Modulation, Duty Cycle = 25%, Period = 4.6ms.  
Parameter  
Conditions  
Min.  
824  
880  
Typ.  
Max.  
849  
915  
2.5  
6
Units  
MHz  
MHz  
X:1  
GSM800 Band  
Frequency  
GSM900 Band  
Input VSWR  
5dBm ≤ POUT ≤ 34.5 dBm  
1.5  
3
RF Input Power (PIN)  
RF Output Power (POUT  
Maximum  
-1  
dBm  
)
Vbatt =3.5V; PIN=6dBm; TA=+25°C,  
Vramp = 1.65V  
34.5  
35.25  
dBm  
Pout = 34.5 dBm, Frequency = 824-849MHz  
Pout = 34.5 dBm, Frequency = 880-915MHz  
Pout = 34.5 dBm, Frequency = 824-849MHz  
Pout = 34.5 dBm, Frequency = 880-915MHz  
2175  
2160  
35.2  
mA  
mA  
%
Supply Current  
Efficiency (PAE)  
36.0  
-45  
-49  
-54  
-67  
-90  
-90  
-88  
-88  
%
dBm  
dBm  
dBm  
Harmonic Peak, 2fo  
Harmonic Peak, 3fo  
Harmonic Peak, 4fo to 12.75GHz  
Forward Isolation, PA off  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
Noise Power 1805MHz to 1880MHz  
Noise Power 1930MHz to 1990MHz  
Noise Power 2400MHz to 2500MHz  
-36  
-36  
-36  
-45  
-82  
-76  
-82  
-70  
-82  
-74  
-74  
-146  
Pout = 34.5 dBm  
PIN=6dBm; VRAMP=0.16V  
dBm  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
VRAMP adjusted for POUT=34.5 dBm;  
RBW=100kHz  
-89  
-115  
-115  
-164  
5dBm ≤ POUT ≤ 34.5 dBm; RBW=1 Hz  
VSWR=10:1; all phase angles  
VRAMP adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; PIN=-1dBm to 6dBm,  
TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
VRAMP adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; PIN=-1dBm to 6dBm,  
TA= -30 to +85°C.  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
-36  
dBm  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
4 of 35  
QM57508  
MMMB Module  
Electrical Specifications: GSM Low Band_Pin Power Control  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Vramp = NA, Pout = 34.5 dBm, TA=+25°C, GMSK Modulation, Duty Cycle = 25%, Period = 4.6ms.  
Parameter  
Conditions  
Min.  
824  
880  
Typ.  
Max.  
849  
915  
2.5  
6
Units  
MHz  
MHz  
X:1  
GSM800 Band  
Frequency  
GSM900 Band  
Input VSWR  
5dBm ≤ POUT ≤ 34.5 dBm  
1.5  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
dBm  
dBm  
dB  
)
34.5  
35.25  
37.3  
27.3  
2070  
39  
HPM, Pout = 34.5 dBm  
LPM, Pout = 13 dBm  
HPM, Pout = 34.5 dBm  
HPM, Pout = 34.5 dBm  
Gain  
dB  
Supply Current  
Efficiency (PAE)  
mA  
%
f=824 849, HPM, Pout = 34.5 dBm  
f=880 915, HPM, Pout = 34.5 dBm  
-42  
-48  
-45  
-56  
-78  
-82.5  
-82.8  
-82.0  
-82.0  
-82.6  
-33  
-36  
-36  
-36  
-45  
-81  
-76  
-79  
-70  
-79  
dBm  
dBm  
dBm  
dBm  
dBm  
Harmonic Peak, 2fo  
Harmonic Peak, 3fo  
Harmonic Peak, 4fo to 12.75GHz  
Forward Isolation, PA off  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
Noise Power 1805MHz to  
1880MHz  
HPM, Pout = 34.5 dBm  
PIN=6dBm  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
Pin adjusted for POUT=34.5 dBm;  
RBW=100kHz  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
-115  
-114  
-164  
-74  
-74  
Noise Power 1930MHz to  
1990MHz  
Noise Power 2400MHz to  
2500MHz  
5dBm ≤ POUT ≤ 34.5 dBm; RBW=1 Hz  
-146  
VSWR=10:1; all phase angles  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
-36  
dBm  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
5 of 35  
QM57508  
MMMB Module  
Electrical Specifications: EDGE Low Band  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 28.5 dBm, TA=+25°C, 8PSK Modulation.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
824  
880  
Typ.  
Max.  
849  
915  
2.5  
6
Units  
MHz  
MHz  
X:1  
GSM800 Band  
GSM900 Band  
Frequency  
Input VSWR  
1.7  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
dBm  
dBm  
dB  
)
28.5  
HPM, Pout = 28.5 dBm  
LPM, Pout = 13 dBm  
HPM, Pout = 28.5 dBm  
HPM, Pout = 28.5 dBm  
29.5  
28  
Gain  
dB  
Supply Current  
Efficiency (PAE)  
1110  
17.5  
mA  
%
Modulation Spectrum 200kHz  
offset  
-33  
-61  
-73  
-30  
-57  
-63  
dBc  
dBc  
dBc  
Modulation Spectrum 400kHz  
offset  
POUT=28.5dBm  
POUT=28.5dBm  
Modulation Spectrum 600kHz  
offset  
EVM RMS  
3.5  
4.5  
-82  
-76  
-82  
-70  
-82  
%
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
-86.5  
-86.4  
-85.7  
-86.0  
-86.0  
5dBm ≤ POUT ≤ 28.5dBm; RBW=100kHz  
Noise Power 1805MHz to  
1880MHz  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
-115  
-115  
-164  
-74  
-74  
Noise Power 1930MHz to  
1990MHz  
Noise Power 2400MHz to  
2500MHz  
5dBm ≤ POUT ≤ 28.5dBm; RBW=1 Hz  
-146  
VSWR=10:1; all phase angles.  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
-36  
dBm  
Pin Adjusted for Prated into 50 Ω Load,  
Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
6 of 35  
QM57508  
MMMB Module  
Electrical Specifications: GSM Mid Band_Vramp Control  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.5V, Pout = 32.5 dBm, TA=+25°C, GMSK Modulation, Duty Cycle=25%,Period=4.6ms.  
Parameter  
Conditions  
Min.  
1710  
1850  
Typ.  
Max.  
1785  
1910  
2.5  
Units  
MHz  
MHz  
X:1  
DCS1800 Band  
PCS1900 Band  
5dBm ≤ POUT ≤ 32.5 dBm  
Frequency  
Input VSWR  
1.5  
3
RF Input Power (PIN)  
RF Output Power (POUT  
Maximum  
-1  
6
dBm  
)
Vbatt =3.5V; PIN=3dBm; TA=+25°C,  
32.5  
33.5  
dBm  
Supply Current  
1710-1910 MHz, Pout = 32.5 dBm  
1710-1910 MHz, Pout = 32.5 dBm  
1475  
32.75  
-39  
mA  
%
Efficiency (PAE)  
Harmonic Peak, 2fo  
Harmonic Peak, 3fo  
-33  
-36  
-36  
-37  
-82  
-76  
-82  
-70  
-82  
dBm  
dBm  
dBm  
Pout = 32.5 dBm  
-51  
Harmonic Peak, 4fo to 12.75GHz  
Forward Isolation, PA off  
-45  
PA OFF, PIN=6dBm; VRAMP=0.16V  
-52  
dBm  
dBm/ 100KHz  
dBm/100KHz  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
-108  
-104  
-100  
-99  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
VRAMP adjusted for Pout = 32.5 dBm,  
RBW=100KHz  
-98  
Noise Power 1805MHz to  
1880MHz  
-88  
-90  
-74  
-74  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
Noise Power 1930MHz to  
1990MHz  
Noise Power 2400MHz to  
2500MHz  
5dBm ≤ POUT ≤ 32.5dBm; RBW=1 Hz  
-154  
-146  
VSWR=10:1; all phase angles  
VRAMP adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; PIN=-1dBm to 6dBm,  
TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
VRAMP adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; PIN=-1dBm to 6dBm,  
TA= -30 to +85°C.  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
-36  
dBm  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
7 of 35  
QM57508  
MMMB Module  
Electrical Specifications: GSM Mid Band_Pin Control  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Vramp = NA, Pout = 32.5 dBm, TA=+25°C, GMSK Modulation, Duty Cycle=25%,Period=4.6ms.  
Parameter  
Conditions  
Min.  
1710  
1850  
Typ.  
Max.  
1785  
1910  
2.5  
Units  
MHz  
MHz  
X:1  
DCS1800 Band  
PCS1900 Band  
5dBm ≤ POUT ≤ 32.5 dBm  
Frequency  
Input VSWR  
1.7  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
6
dBm  
dBm  
dB  
)
32.5  
33  
39  
HPM, Pout = 32.5 dBm  
LPM, Pout = 13 dBm  
HPM, Pout = 32.5 dBm  
LPM, Pout = 13 dBm  
1710-1910 MHz, Pout = 32.5 dBm  
HPM, Pout = 32.5 dBm  
HPM, Pout = 32.5 dBm  
HPM, Pout = 32.5 dBm  
HPM, Pout = 32.5 dBm  
PIN=6dBm  
Gain DCS 1800 Band  
Gain PCS 1900 Band  
31  
dB  
37  
dB  
30  
dB  
Supply Current  
1425  
34  
mA  
Efficiency (PAE)  
Harmonic Peak, 2fo  
Harmonic Peak, 3fo  
%
-41  
-52  
-51  
-76  
-105  
-105  
-99  
-96  
-96  
-33  
-36  
-36  
-37  
-82  
-76  
-82  
-70  
-82  
dBm  
dBm  
Harmonic Peak, 4fo to 12.75GHz  
Forward Isolation, PA off  
dBm  
dBm  
dBm/ 100KHz  
dBm/100KHz  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
VRAMP adjusted for Pout = 32.5 dBm,  
RBW=100KHz  
Noise Power 1805MHz to  
1880MHz  
-80  
-83  
-74  
-74  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
Noise Power 1930MHz to  
1990MHz  
Noise Power 2400MHz to  
2500MHz  
5dBm ≤ POUT ≤ 32.5dBm; RBW=1 Hz  
-148  
-146  
VSWR=10:1; all phase angles  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
-36  
dBm  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
8 of 35  
QM57508  
MMMB Module  
Electrical Specifications: EDGE Mid Band  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 28.5 dBm, TA=+25°C, 8PSK Modulation.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
1710  
1850  
Typ.  
Max.  
1785  
1910  
2.5  
Units  
MHz  
MHz  
X:1  
DCS1800 Band  
PCS1900 Band  
Frequency  
Input VSWR  
1.7  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
6
dBm  
dBm  
)
28.5  
HPM, Pout = 28.5 dBm  
LPM, Pout = 13 dBm  
32  
dB  
dB  
Gain DCS 1800 Band  
Gain PCS 1900 Band  
30.5  
HPM, Pout = 28.5 dBm  
LPM, Pout = 13 dBm  
HPM, Pout = 28.5 dBm  
HPM, Pout = 28.5 dBm  
30.5  
28.5  
1065  
18  
dB  
dB  
mA  
%
Supply Current  
Efficiency (PAE)  
Modulation Spectrum 200kHz  
offset  
-35.5  
-63  
-30  
-57  
-63  
dBc  
dBc  
dBc  
Modulation Spectrum 400kHz  
offset  
POUT=28.5dBm  
POUT=28.5dBm  
Modulation Spectrum 600kHz  
offset  
-75  
EVM RMS  
2.5  
-99  
-99  
-98  
-96  
-96  
4.5  
-82  
-76  
-82  
-70  
-82  
%
dBm/ 100KHz  
dBm/100KHz  
Noise Power 736MHz to 757MHz  
Noise Power 757MHz to 763MHz  
Noise Power 869MHz to 894MHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
dBm/100KHz  
dBm/100KHz  
dBm/100KHz  
5dBm ≤ POUT ≤ 28.5dBm; RBW=100kHz  
Noise Power 1805MHz to  
1880MHz  
-83  
-85  
-74  
-74  
dBm/100KHz  
dBm/100KHz  
dBm/Hz  
Noise Power 1930MHz to  
1990MHz  
Noise Power 2400MHz to  
2500MHz  
5dBm ≤ POUT ≤ 28.5dBm; RBW=1 Hz  
-148  
-146  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Load, Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=20:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
Stability (Spurious), VSWR 10:1  
Ruggedness, VSWR 20:1  
-36  
dBm  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
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9 of 35  
QM57508  
MMMB Module  
Electrical Specifications: TD-SCDMA Band 34  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 27.0 dBm, TA=+25°C, TD-SCDMA Modulation.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Units  
Band 34  
Frequency  
2010  
2025  
MHz  
Input VSWR  
1.7  
2.5  
6
X:1  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
dBm  
)
27  
dBm  
HPM, Pout = 27 dBm  
27.5  
21  
dB  
Gain  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
dB  
760  
75  
mA  
Supply Current  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
HPM, Pout = 27 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
LPM, Pout = -5 dBm  
mA  
%
Efficiency (PAE)  
18.5  
-42.0  
-47.5  
-64.0  
-50.0  
-95  
-37  
-37  
-48  
-48  
-70  
-82  
dBc  
TDS ACLR1 (±1.6MHz)  
dBc  
dBc  
TDS ACLR2 (±3.2MHz)  
dBc  
dBm/100KHz  
dBm/100KHz  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
-95  
Pout = 27 dBm, RBW=100 kHz  
Noise Power 1805MHz to  
1880MHz  
dBm/100KHz  
-80  
-74  
Noise Power 2400MHz to  
2500MHz  
Pout = 27 dBm, RBW=1 Hz  
HPM, Pout = 27 dBm  
dBm/Hz  
dBm  
-147  
-65  
-146  
-36  
Harmonic Peak, 2fo  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Stability (Spurious), VSWR 10:1  
-36  
dBm  
Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
Ruggedness, VSWR 10:1  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
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QM57508  
MMMB Module  
Electrical Specifications: TDD - LTE Band 34  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 26.0 dBm, TA=+25°C, TDD - LTE Modulation: QPSK, 10MHz,12RB, MPR=0.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
2025  
2.5  
Units  
MHz  
X:1  
dBm  
dBm  
dB  
Frequency  
Band 34  
2010  
Input VSWR  
1.7  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
6
)
26.0  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
28.7  
19.5  
685  
Gain  
dB  
mA  
mA  
%
Supply Current  
77  
Efficiency (PAE)  
16.5  
-40.0  
-39.0  
-42.5  
-46.0  
-52.5  
-50.0  
1.4  
ACLR1 E-UTRA  
-35  
-35  
-38  
-38  
-41  
-41  
3.0  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
%
ACLR1 UTRA  
ACLR2 UTRA  
EVM RMS  
GPS Band Noise Power  
1574MHz to 1576MHz  
Pout = 25 dBm,  
20MHz Full Resource Block (FRB)  
MPR 1 dB  
-138  
-130  
dBm/Hz  
GLONASS Band Noise Power  
1597MHz to 1605MHz  
-137  
-55  
-130  
-36  
dBm/Hz  
dBm  
RBW=1Hz  
Harmonic Peak, 2fo  
HPM, Pout = 26 dBm  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Stability (Spurious), VSWR 10:1  
-36  
dBm  
Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
Ruggedness, VSWR 10:1  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
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QM57508  
MMMB Module  
Electrical Specifications: TD-SCDMA Band 39  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 27.0 dBm, TA=+25°C, TD-SCDMA Modulation.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Units  
Frequency  
Band 39  
1880  
1920  
MHz  
Input VSWR  
1.7  
2.5  
6
X:1  
RF Input Power (PIN)  
dBm  
RF Linear Output Power (POUT  
)
27  
dBm  
dB  
HPM, Pout = 27 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
29  
20.5  
765  
74  
Gain  
dB  
mA  
mA  
%
Supply Current  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
Efficiency (PAE)  
19  
HPM, Pout = 27 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 27 dBm  
LPM, Pout = -5 dBm  
-43  
-37  
-37  
-48  
-48  
-70  
-82  
dBc  
dBc  
TDS ACLR1 (±1.6MHz)  
-47  
dBc  
dBc  
-64  
TDS ACLR2 (±3.2MHz)  
-50  
Noise Power 925MHz to 935MHz  
Noise Power 935MHz to 960MHz  
-97.5  
-98.0  
dBm/100KHz  
dBm/100KHz  
Pout = 27 dBm, RBW=100kHz  
Pout = 27 dBm; RBW=1 Hz  
Noise Power 1805MHz to  
1880MHz  
-85.0  
-74  
dBm/100KHz  
Noise Power 2400MHz to  
2500MHz  
dBm/Hz  
dBm  
-148  
-146  
-36  
Harmonic Peak, 2fo  
HPM, Pout = 27 dBm  
-52.5  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
dBm  
Stability (Spurious), VSWR 10:1  
-36  
No damage or permanent degradation to device.  
Ruggedness, VSWR 10:1  
Note: Refer to Mode Table for futher operating conditions.  
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12 of 35  
QM57508  
MMMB Module  
Electrical Specifications: TDD - LTE Band 39  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.6V, Pout = 26.0 dBm, TA=+25°C, TDD - LTE Modulation: QPSK, 10MHz,12RB, MPR=0.  
Vramp Control  
Vramp adjusted for Pout. Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Pin Control  
Pin adjusted for Pout, Vramp Disabled, Bias set through MIPI Programming.  
Refer to Mode Table for detailed operating conditions and programming.  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
1920  
2.5  
Units  
MHz  
X:1  
dBm  
dBm  
dB  
Frequency  
Band 39  
1880  
Input VSWR  
1.7  
RF Input Power (PIN)  
RF Linear Output Power (POUT  
6
)
26.0  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
LPM, Pout = -5 dBm  
HPM, Pout = 26 dBm  
28.7  
22  
Gain  
dB  
675  
mA  
mA  
%
Supply Current  
80  
Efficiency (PAE)  
17  
ACLR1 E-UTRA  
-41.8  
-40.0  
-41.5  
-45.8  
-51.0  
-49.0  
1.4  
-35  
-35  
-38  
-38  
-41  
-41  
3.0  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
%
ACLR1 UTRA  
ACLR2 UTRA  
EVM RMS  
ISM Band Noise Power  
2400MHz to 2484MHz  
-149  
-135  
-146  
-125  
dBm/Hz  
dBm/Hz  
Pout = 25 dBm,  
20MHz Full Resource Block (FRB)  
MPR 1 dB  
Band 34 Noise Power  
2010MHz to 2025MHz  
RBW=1Hz  
Band 3 Rx Noise Power  
1805MHz to 1880MHz  
Harmonic Peak, 2fo  
-130  
-55  
-125  
-36  
dBm/Hz  
dBm  
HPM, Pout = 26 dBm  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V, TA= -30 to +85°C.  
VSWR=10:1; all phase angles  
Pin adjusted for Prated into 50Ω load  
Vcc=3.1V to 4.8V; TA= -30 to +85°C.  
Stability (Spurious), VSWR 10:1  
-36  
dBm  
Ruggedness, VSWR 10:1  
No damage or permanent degradation to device.  
Note: Refer to Mode Table for futher operating conditions.  
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13 of 35  
QM57508  
MMMB Module  
Electrical Specifications: Switch  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.5V, Pin = 6.0 dBm, TA=+25°C, Duty Cycle = 100% (CW)  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Units  
Insertion Loss,  
Includes Coupler Loss  
Frequency MHz  
Low Band ANT_L to L_TRX 1 7  
699 960  
0.75  
0.70  
0.95  
0.80  
1.1  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
Mid Band  
ANT_M to M_TRX 1 5  
ANT_M to M_TRX 1 5  
1400 1700  
1700 2200  
1400 1700  
1700 2200  
2300 2700  
2496 2690  
2496 2690  
5GHz Filter Off  
2496 2690  
5GHz Filter On *Note 1  
3400 3800  
Mid Band  
High Band ANT_H to H_TRX 1 4  
High Band ANT_H to H_TRX 1 4  
High Band ANT_H to H_TRX 1 4  
High Band ANT_H to H_TRX 1 4  
1.1  
1.1  
Band 41  
ANT_H to H_TRX 2  
0.8  
1.1  
dB  
dB  
Band 41  
ANT_H to H_TRX 1 4  
ANT_H to H_TRX 1 4  
1.4  
1.4  
dB  
dB  
High Band  
High Band ANT_H to H_TRX 1 4  
5150 5850  
Note 1: The 5 GHz Filter provides additional TRx attenuation for LTE and WiFi co-existence.  
Refer to MIPI Programing Section for Register 6 Settings.  
Coupling Ratio: Measurement from TRx to the coupled antenna port  
Parameter  
Low Band  
Mid Band  
High band  
Conditions  
Min.  
20  
Typ.  
23.5  
21  
Max.  
Max.  
Max.  
Units  
dB  
Freq = 699 960 MHz  
Freq = 1400 2200 MHz  
Freq = 1400 3800 MHz  
19  
dB  
18  
22  
dB  
Isolation: Measurement from Antenna to Coupler Port  
Parameter  
Conditions  
Min.  
40  
Typ.  
44  
Units  
dB  
Low Band  
Mid Band  
Freq = 699 960 MHz  
Freq = 1400 2200 MHz  
Freq = 1400 3800 MHz  
40  
45  
dB  
High band  
40  
47  
dB  
Return Loss  
Parameter  
Conditions  
Min.  
10  
7
Typ.  
20  
Units  
dB  
Low Band  
Mid Band  
Freq = 699 960 MHz  
Freq = 1400 2200 MHz  
Freq = 1400 3800 MHz  
15  
dB  
High band  
5
10  
dB  
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14 of 35  
QM57508  
MMMB Module  
Isolation TRx to TRx  
Band  
Parameter  
Conditions  
Min.  
27.5  
28.5  
27.5  
28.0  
29.5  
28.5  
29.0  
Typ.  
31.1  
31.2  
30.3  
30.9  
32.9  
31.3  
31.6  
Max.  
Units  
dB  
L_TRx 1 to L_TRx 2  
L_TRx 2 to L_TRx 3  
L_TRx 3 to L_TRx 4  
L_TRx 4 to L_TRx 5  
L_TRx 5 to L_TRx 6  
L_TRx 6 to L_TRx 7  
L_TRx 7 to L_TRx 6  
dB  
dB  
Low Band  
Freq = 699 960 MHz  
dB  
dB  
dB  
dB  
M_TRx 1 to M_TRx 2  
M_TRx 2 to M_TRx 3  
M_TRx 3 to M_TRx 4  
M_TRx 4 to M_TRx 5  
M_TRx 5 to M_TRx 4  
dB  
dB  
dB  
dB  
dB  
24.0  
27.0  
24.0  
18.5  
19.0  
29.0  
30.8  
28.0  
22.2  
23.0  
Mid Band  
Freq = 1400 2300 MHz  
H_TRx 1 to H_TRx 2  
H_TRx 2 to H_TRx 3  
H_TRx 3 to H_TRx 4  
H_TRx 4 to H_TRx 3  
20.0  
19.0  
20.0  
21.0  
22.4  
21.0  
22.7  
22.9  
dB  
dB  
dB  
dB  
High Band  
Freq = 2300 - 2690  
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15 of 35  
QM57508  
MMMB Module  
Electrical Specifications: Switch  
Nominal test conditions unless otherwise stated, all unused ports terminated in 50 Ω.  
Vcc = Vbatt = +3.5V, TA=+25°C, Duty Cycle = 100% (CW)  
Parameter  
Conditions  
Min.  
Typ.  
-90  
Max.  
-74  
-84  
-95  
-95  
-90  
-90  
-95  
-95  
Units  
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
B13 2nd harmonics in L_TRX  
B8 2nd harmonics in L_TRX  
B8 3rd harmonics in L_TRX  
B26 3rd harmonics in L_TRX  
B12/B17 3rd harmonics in L_TRX  
B3 2nd harmonics in M_TRX  
B2 3rd harmonics in M_TRX  
B4 3rd harmonics in M_TRX  
Pin=25dBm, GPS  
Pin=25dBm, B3/B8 CA  
Pin=25dBm, B7/B8 CA  
Pin=25dBm, B41/B26 CA  
Pin=25dBm, B4/B17(12) CA  
Pin=25dBm, B3/B42 CA  
Pin=25dBm, B2/B255 CA  
Pin=25dBm, B4/B252 CA  
-92  
-106  
-102  
-95  
-96  
-118  
-111  
Pin=26dBm, Frequency = 699-915MHz,  
except for non-harmonics band  
Pin=26dBm, Frequency = 699-915MHz,  
except for non-harmonics band  
LB TRX 2nd harmonics  
LB TRX 3rd harmonics  
-92  
-60  
-60  
dBm  
dBm  
-101  
MB/HB TRX 2nd harmonics  
MB/HB TRX 3rd harmonics  
Pin=26dBm, Frequency = 1427-3800MHz  
-97  
-93  
-60  
-60  
dBm  
dBm  
Pin=26dBm, Frequency = 1427-3800MHz  
Tx Freq = 897.5MHz, (+23dBm)  
Linearity: IMD2  
Linearity IMD3  
Triple Beat Ratio  
-128  
-130  
103  
-105  
-105  
dBm  
dBm  
dBc  
Blocker Frequency = 1840 MHz (-15dBm)  
Tx Freq = 897.5MHz, (+23dBm)  
Blocker Frequency = 852 MHz (-15dBm)  
TX1=TX2= +21.5dBm, Blocker = -30dBm,  
Freq = 699 to 915 MHz, 1710 to 2155 MHz  
81  
Linearity:  
B2 TX=22.5dBm (1860MHz, 20MHz)  
B4 TX= 10dBm (1752.5MHz, 5MHz)  
Measure 1940MHz, 20MHz  
MB + MB FDD UL CA IMD3  
-109  
-140  
-95  
dBm  
dBm  
(B2 + B4)  
Linearity:  
B2 TX=10dBm (1868.3MHz, 5MHz)  
B4 TX= 22.5dBm (1735MHz, 5MHz)  
MB + MB FDD UL CA IMD5  
(B2 + B4)  
-105  
Measure 2135MHz, 5MHz  
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QM57508  
MMMB Module  
MIPI Programming Guide:  
The CMOS controller supports both the traditional GMSK Vramp Power Control and the Pin  
Power Control. For the Pin Power Control the Vramp is set as a bias point along with the DAC  
control of Register 1. Register 1 is not used in the traditional Vramp Control.  
The MIPI register settings for both are listed separately below.  
Vramp Power Control Register Summary:  
QM57508 RFFE Register Map Summary  
Reg Dec (Hex)  
Reg 00 (0x00)  
Reg 03 (0x03)  
Reg 04 (0x04)  
Reg 05 (0x05)  
Reg 06 (0x06)  
Reg 29 (0x1D)  
Reg 30 (0x1E)  
Reg 31 (0x1F)  
7
6
5
4
3
2
1
0
RESERVED [7] (1)  
BAND_SEL [6:3] (0000)  
HIGH_ISO [5] (0) RESERVED [4] (0)  
PA_EN [2] (0)  
PA_MODE[1:0] (00)  
RESERVED [7:6] (00)  
RESERVED [7:5] (000)  
HB_SEL [3:0] (0000)  
MB_SEL [4:0] (00000)  
RESERVED [7] (0)  
RESERVED [7] (0)  
LB_SEL [6:0] (0000000)  
RESERVED [3] (0)  
CPL2 [6:4] (000)  
CPL1 [2:0] (000)  
PRODUCT_ID [7:0] (0010 0101)  
MANUFACTURER_ID [7:0] (0011 0100)  
RESERVED [7] (0)  
RESERVED [6] (0)  
MAN_ID MSB [5:4] (01)  
USID [3:0] (1111)  
Note: Reg 30 is a 10 bit register which ultilizes Reg 31 B5:4 for the Most Significant Bits (MSB)  
Register 00  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
RFMD Description  
Reserved. = 1  
(Vramp Enabled)  
0x00  
0x00  
Reg00 [7]  
PA_CTRL0  
VRAMP_EN  
1b 0  
R/W  
No  
Band Select. Selects the band and modulation of operation.  
0000: TX_OFF  
0001: TX_LB_GSM  
Reg00 [6:3]  
PA_CTRL0  
BAND_SEL  
4b 0000  
0010: TX_MB_GSM  
R/W  
No  
0101: TX_LB_EDGE  
0110: TX_MB_EDGE  
0111: TX_MB_TDSCDMA_TDDLTE  
Enables GSM PA Bias  
0 = DISABLED  
1 = ENABLED  
0x00  
0x00  
Reg00 [2]  
PA_CTRL0  
PA_CTRL0  
PA_EN  
MODE  
1b 0  
R/W  
R/W  
No  
No  
PA Mode.  
01 = LPM  
11 = HPM  
Reg00 [1:0]  
2b 00  
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QM57508  
MMMB Module  
Register 03  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x03  
0x03  
0x03  
Reg03[7:6]  
Reg03[5]  
Reg03[4]  
SW_Ctrl1  
RESERVED  
4b0000  
Reserved. = 0  
R/W  
R/W  
R/W  
No  
No  
No  
HB high-isolation mode  
1: High-isolation mode  
0: Normal mode  
SW_Ctrl1  
SW_Ctrl1  
HIGH_ISO  
1b0  
1b0  
RESERVED  
Reserved. = 0  
Each bit controls one of four RF paths to be connected to the  
HB antenna. Multiple bits can be enabled at the same time.  
1000: HB_TRX4  
0x03  
Reg03[3:0]  
SW_Ctrl1  
HB_SEL [3:0]  
4b0000  
0100: HB_TRX3  
R/W  
No  
0010: HB_TRX2  
0001: HB_TRX1  
0000: No HB connection  
Register 04  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x04  
Reg04[7:5]  
SW_Ctrl2  
RESERVED  
3b000  
Reserved. = 0  
R/W  
No  
Each bit controls one of five RF paths to be connected to the  
MB antenna. Multiple bits can be enabled at the same time.  
10000: MB_TRX5  
01000: MB_TRX4  
00100: MB_TRX3  
0x04  
Reg04[4:0]  
SW_Ctrl2  
MB_SEL  
5b00000  
R/W  
No  
00010: MB_TRX2  
00001: MB_TRX1  
00000: No MB connection  
Register 05  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x05  
Reg05[7]  
SW_Ctrl3  
RESERVED3  
1b0  
Reserved. = 0  
R/W  
No  
Each bit controls one of seven RF paths to be connected to  
the LB antenna. Multiple bits can be enabled at the same time.  
1000000: LB_TRX7  
0100000: LB_TRX6  
0010000: LB_TRX5  
0001000: LB_TRX4  
0x05  
Reg05[6:0]  
SW_Ctrl3  
LB_SEL  
7b0000000  
R/W  
No  
0000100: LB_TRX3  
0000010: LB_TRX2  
0000001: LB_TRX1  
0000000: No LB connection  
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QM57508  
MMMB Module  
Register 06  
Broadc  
R/W  
F/SEF  
Register  
Address  
Data  
Bits  
Register Name  
Bit Field  
Defaults  
Description  
CPL Mode  
Freq  
HB Filter  
ast  
ID  
0x06  
0x06  
0x06  
0x06  
Reg06 [7]  
SW_Ctrl4  
RESERVED  
1b 0  
Reserved. = 0  
NA  
NA  
NA  
R/W  
No  
No  
No  
No  
111: VHB  
110: HB  
101: MHB  
100: JHB  
011: MB  
010: JB  
HB on HB CPL  
HB on HB CPL  
MB on HB CPL  
MB on HB CPL  
MB on MB CPL  
MB on MB CPL  
LB on LB CPL  
Coupler OFF  
3.5 - 3.8GHz  
2.3 - 2.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
0.7 - 0.96GHz  
0.7 - 5.8 GHz  
Off  
On  
On  
On  
NA  
NA  
NA  
Off  
Reg06 [6:4]  
Reg06 [3]  
SW_Ctrl4  
SW_Ctrl4  
SW_Ctrl4  
CPL2  
RESERVED  
CPL1  
3b 000  
R/W  
R/W  
R/W  
001: LB  
000: OFF  
1b 0  
Reserved. = 0  
NA  
NA  
NA  
111: VHB  
110: HB  
101: MHB  
100: JHB  
011: MB  
010: JB  
HB on HB CPL  
HB on HB CPL  
MB on HB CPL  
MB on HB CPL  
MB on MB CPL  
MB on MB CPL  
LB on LB CPL  
Coupler OFF  
3.5 - 3.8GHz  
2.3 - 2.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
0.7 - 0.96GHz  
0.7 - 5.8 GHz  
Off  
On  
On  
On  
NA  
NA  
NA  
Off  
Reg06 [2:0]  
3b 000  
001: LB  
000: OFF  
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QM57508  
MMMB Module  
Pin Power Control Register Summary:  
QM57508 RFFE Register Map Summary  
Reg Dec (Hex)  
Reg 00 (0x00)  
Reg 01 (0x01)  
Reg 03 (0x03)  
Reg 04 (0x04)  
Reg 05 (0x05)  
Reg 06 (0x06)  
Reg 29 (0x1D)  
Reg 30 (0x1E)  
Reg 31 (0x1F)  
7
6
5
4
3
2
1
0
RESERVED [7] (0)  
BAND_SEL [6:3] (0000)  
PA Bias [7:0] (0000)  
RESERVED [4] (0)  
PA_EN [2] (0)  
PA_MODE[1:0] (00)  
RESERVED [7:6] (00)  
RESERVED [7:5] (000)  
HIGH_ISO [5] (0)  
HB_SEL [3:0] (0000)  
MB_SEL [4:0] (00000)  
RESERVED [7] (0)  
RESERVED [7] (0)  
LB_SEL [6:0] (0000000)  
RESERVED [3] (0)  
CPL2 [6:4] (000)  
CPL1 [2:0] (000)  
PRODUCT_ID [7:0] (0010 0101)  
MANUFACTURER_ID [7:0] (0011 0100)  
RESERVED [7] (0)  
RESERVED [6] (0)  
MAN_ID MSB [5:4] (01)  
USID [3:0] (1111)  
Note: Reg 30 is a 10 bit register which ultilizes Reg 31 B5:4 for the Most Significant Bits (MSB)  
Register 00  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
RFMD Description  
Reserved = 0  
(Vramp Disabled)  
0x00  
Reg00[7]  
PA_CTRL0  
VRAMP_EN  
1b0  
R/W  
No  
Band Select  
Note: The TX_BYPASS (1000) works in conjunction with PA  
MODE (Bits1:0) when selected and PA_EN needs to be in the  
ENABLED State (1).  
0000: TX_OFF  
0011: TX_LB_GSM_LIN (High Gain)  
0100: TX_MB_GSM_LIN  
0101: TX_LB_EDGE / GSM_Lin (Low Gain)*  
0110: TX_MB_EDGE  
0111: TX_MB_TDSCDMA_TDDLTE  
1000: TX_BYPASS  
0x00  
Reg00[6:3]  
PA_CTRL0  
BAND_SEL[3:0]  
4b0000  
R/W  
No  
1001: TX_LB_GSM + MB_BYPASS  
1010: TX_MB_GSM + LB_BYPASS  
1011: TX_LB_GSM_LIN + MB_BYPASS  
1100: TX_MB_GSM_LIN + LB_BYPASS  
1101: TX_LB_EDGE (HPM and LPM) + MB_BYPASS  
1110: TX_MB_EDGE (HPM and LPM) + LB_BYPASS  
1111: TX_MB_TDSCDMA + LB BYPASS  
Enables GSM PA Bias  
0x00  
0x00  
Reg00[2]  
PA_CTRL0  
PA_CTRL0  
PA_EN  
1b0  
0 = DISABLED  
1 = ENABLED  
PA Mode.  
If BAND_SEL[3:0] <> 1000  
10 = HPM  
00 = LPM  
R/W  
R/W  
No  
No  
Reg00[1:0]  
MODE[1:0]  
2b00  
if BAND_SEL[3:0] = 1000 (direct Input Switch Control)  
00 = Input Switches Off  
01 = MB off (open), LB = BYPASS  
10 = MB = BYPASS, LB = off (open)  
11 = MB = BYPASS, LB = BYPASS  
* LB EDGE / GSM Lin (0101) optimized for 2G performance. LB GSM Lin (0011) can be used if higher gain is required.  
Refer to mode table for further details.  
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QM57508  
MMMB Module  
Register 01  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
PA Biasing. ICNTL of final Stage  
(Vramp is disabled)  
0x01  
Reg01[7:0]  
PA_BIAS1  
PA_BIAS1  
8b00000000  
R/W  
No  
Register 03  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x03  
0x03  
0x03  
Reg03[7:6]  
Reg03[5]  
Reg03[4]  
SW_Ctrl1  
RESERVED  
4b0000  
Reserved. = 0  
R/W  
R/W  
R/W  
No  
No  
No  
HB high-isolation mode  
1: High-isolation mode  
0: Normal mode  
SW_Ctrl1  
SW_Ctrl1  
HIGH_ISO  
1b0  
1b0  
RESERVED  
Reserved. = 0  
Each bit controls one of four RF paths to be connected to the  
HB antenna. Multiple bits can be enabled at the same time.  
1000: HB_TRX4  
0x03  
Reg03[3:0]  
SW_Ctrl1  
HB_SEL  
4b0000  
0100: HB_TRX3  
R/W  
No  
0010: HB_TRX2  
0001: HB_TRX1  
0000: No HB connection  
Register 04  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x04  
Reg04[7:5]  
SW_Ctrl2  
RESERVED2  
3b000  
Reserved. = 0  
R/W  
No  
Each bit controls one of five RF paths to be connected to the  
MB antenna. Multiple bits can be enabled at the same time.  
10000: MB_TRX5  
01000: MB_TRX4  
00100: MB_TRX3  
0x04  
Reg04[4:0]  
SW_Ctrl2  
MB_SEL  
5b00000  
R/W  
No  
00010: MB_TRX2  
00001: MB_TRX1  
00000: No MB connection  
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QM57508  
MMMB Module  
Register 05  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
Description  
0x05  
Reg05[7]  
SW_Ctrl3  
RESERVED  
1b0  
Reserved. = 0  
R/W  
No  
Each bit controls one of seven RF paths to be connected to  
the LB antenna. Multiple bits can be enabled at the same time.  
1000000: LB_TRX7  
0100000: LB_TRX6  
0010000: LB_TRX5  
0001000: LB_TRX4  
0x05  
Reg05[6:0]  
SW_Ctrl3  
LB_SEL  
7b0000000  
R/W  
No  
0000100: LB_TRX3  
0000010: LB_TRX2  
0000001: LB_TRX1  
0000000: No LB connection  
Register 06  
Broadc  
ast  
ID  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Register Name  
Bit Field  
Defaults  
Description  
CPL Mode  
Freq  
HB Filter  
0x06  
0x06  
0x06  
0x06  
Reg06 [7]  
SW_Ctrl4  
RESERVED  
1b 0  
3b 000  
1b 0  
Reserved. = 0  
NA  
NA  
NA  
R/W  
R/W  
R/W  
R/W  
No  
No  
No  
No  
111: VHB  
110: HB  
101: MHB  
100: JHB  
011: MB  
010: JB  
HB on HB CPL  
HB on HB CPL  
MB on HB CPL  
MB on HB CPL  
MB on MB CPL  
MB on MB CPL  
LB on LB CPL  
Coupler OFF  
3.5 - 3.8GHz  
2.3 - 2.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
0.7 - 0.96GHz  
0.7 - 5.8 GHz  
Off  
On  
On  
On  
NA  
NA  
NA  
Off  
Reg06 [6:4]  
Reg06 [3]  
SW_Ctrl4  
SW_Ctrl4  
SW_Ctrl4  
CPL2  
RESERVED  
CPL1  
001: LB  
000: OFF  
Reserved. = 0  
NA  
NA  
NA  
111: VHB  
110: HB  
101: MHB  
100: JHB  
011: MB  
010: JB  
HB on HB CPL  
HB on HB CPL  
MB on HB CPL  
MB on HB CPL  
MB on MB CPL  
MB on MB CPL  
LB on LB CPL  
Coupler OFF  
3.5 - 3.8GHz  
2.3 - 2.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
1.7 - 2.2GHz  
1.4 - 1.7GHz  
0.7 - 0.96GHz  
0.7 - 5.8 GHz  
Off  
On  
On  
On  
NA  
NA  
NA  
Off  
Reg06 [2:0]  
3b 000  
001: LB  
000: OFF  
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QM57508  
MMMB Module  
Common to both Vramp and Pin Power Control:  
Product Information: Registers 29, 30, 31  
Register  
Address  
Data  
Bits  
R/W  
F/SEF  
Broadcast  
ID support  
Register Name  
Bit Field  
Defaults  
RFMD Description  
Identifies type of device. (PA, Sw, etc.)  
Product ID:  
Dec = 37  
Hex = 25  
Bin = 0010 0101  
0x1D  
Reg29 [7:0]  
PRODUCT_ID  
PRODUCT_ID  
8b 0010_0101  
R
No  
This is a read-only register. However, during the programming  
of the USID a write command sequence is performed on this  
register, even though the write does not change its value.  
Refer to MIPI Alliance Specification for RFFE Sequence  
Identifies vendor.  
Man ID:  
This value is a 10 bit register consisting of 8 bits in Reg 30 and  
bits [5:4] in Reg 31.  
Refer to note below.  
0x1E  
Reg30 [7:0]  
MANUFACTURER_ID  
MANUFACTURER_ID  
RESERVED  
8b 0011_0100  
R
No  
This is a read-only bit that is reserved and yields a value of 0  
at readback.  
SPARE  
MANUFACTURER_ID  
0x1F  
0x1F  
Reg31 [7:6]  
Reg31[5:4]  
2b 00  
2b 01  
R
R
No  
No  
Reg 31 bits [5:4] contain the Most Significant Bits (MSB) for  
the manufacturer ID.  
Refer to note below.  
MANUFACTURER_ID  
(MSB)  
SPARE  
MANUFACTURER_ID  
Address to program part.  
USID:  
SPARE  
MANUFACTURER_ID  
Dec = 15  
Hex = 0F  
0x1F  
Reg31[3:0]  
USID  
4b 1111  
RW  
No  
Bin = 1111  
Note: In Qorvo’s Optimizer Tool the registers will show the combined value for the 10 bit manufacturing ID.  
(Dec = 308, Bin = 01 0011 0100)  
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QM57508  
MMMB Module  
Pin Configuration and Description  
Top View  
Pin Number  
Label  
Description  
1
2
RFIN_L_OUT RFIN_L Bypass  
RFIN_L  
RFIN_M  
RF input to the GSM850/EGSM900 bands. This is a 50 Ω, DC Blocked input.  
RF input to the DCS1800/PCS1900 bands. This is a 50Ω, DC Blocked input, but will measure as a  
short to ground.  
3
4
5
6
7
RFIN_M_OUT RFIN_M Bypass  
SCLK  
SDATA  
VIO  
Serial interface clock input signal.  
Serial interface data I/O signal.  
Supply voltage for the MIPI RFFE serial interface.  
Power control signal from DAC. A simple RC filter is integrated and may not require additional  
filtering depending on the baseband selected.  
8
VRAMP  
Main DC power supply for the power amplifier circuitry in the module. Traces running to this pin will  
have high current pulses during transmit operation. Proper decoupling and routing to handle this  
condition should be observed.  
9
VCC  
10  
VBATT  
GND  
Supply voltage for bias circuitry.  
Pin connected to module ground.  
Coupler output port.  
11,12,13,14  
15  
16  
17  
CPL_2  
GND  
Pin connected to module ground.  
Coupler output port.  
CPL_1  
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QM57508  
MMMB Module  
Pin Number  
Label  
Description  
18,19  
GND  
Pin connected to module ground.  
Bidirectional RF port. This is the common port of the antenna switch.  
20  
21  
22  
23  
24  
25  
ANT_L  
GND  
An inductor makes this port appear as a DC short to ground. Optimized for low band frequencies.  
Pin connected to module ground.  
Bidirectional RF port. This is the common port of the antenna switch.  
An inductor makes this port appear as a DC short to ground. Optimized for mid band frequencies.  
Pin connected to module ground.  
ANT_M  
GND  
Bidirectional RF port. This is the common port of the antenna switch.  
An inductor makes this port appear as a DC short to ground. Optimized for high band frequencies.  
Pin connected to module ground.  
ANT_H  
GND  
Interchangeable GSM/EDGE/UMTS/LTE port. External circuitry must maintain zero volts on this  
port. Optimized for MB and HB.  
26  
H_TRX4  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB and HB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB and HB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB and HB.  
Pin connected to module ground.  
27  
28  
H_TRX3  
H_TRX2  
29  
30  
31  
H_TRX1  
GND  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for MB.  
Pin connected to module ground.  
M_TRX5  
32  
33  
34  
M_TRX4  
M_TRX3  
M_TRX2  
35  
36  
37  
M_TRX1  
GND  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Interchangeable GSM/EDGE/UMTS/LTE port.  
External circuitry must maintain zero volts on this port. Optimized for LB.  
Pin connected to module ground.  
L_TRX7  
38  
L_TRX6  
L_TRX5  
L_TRX4  
L_TRX3  
39  
40  
41  
42  
43  
44  
L_TRX2  
L_TRX1  
GND  
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QM57508  
MMMB Module  
Timing Diagram  
GSM Transmit  
EDGE Transmit  
Note: Vramp (Do Not Care) for Linear Operation Only, Refer to Mode table for Vramp operation.  
For Switch Turn On allow 10 uS after MIPI command execution.  
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QM57508  
MMMB Module  
Evaluation Board Drawing  
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QM57508  
MMMB Module  
Evaluation Board Picture  
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QM57508  
MMMB Module  
Evaluation Board Schematic  
Note: Pin 1 and 4 on block diagram are shown as ground. On EVB, pin1 = J25 RFout_LB and pin 4 = J24 RFout_MB.  
These pins should be grounded and the EVB was designed for others possible options.  
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QM57508  
MMMB Module  
Evaluation Board Bill of Materials (BOM)  
Description  
Reference  
Designator  
Manufacturer  
Manufacturer's P/N  
RES, 0 OHM, 1%, 1/20W, 0201  
RES, 10K, 5%, 1/20W, 0201  
RES, 0 OHM, 1/20W, 0201  
R1, R2, R3  
R4  
Kamaya, Inc  
RMC1/16SJPTH  
PFR03S-103-JNH  
RC0201FR-070RL  
R5, R6, R7, R8, R9,  
R10, R11, R12  
Yageo USA  
C11*, C12*, C13*,  
C14*, C15*, C16*,  
C17*, C18*, C19*,  
C20*, C21*, C22*,  
C23*, C24*, C25*,  
C26*  
Do Not Populate  
Do Not Populate  
C1, C2, C3  
C4  
CAP, 150pF, 10%, 16V, X7R, 0201  
CAP, 22uF, 10%, 10V, TANT-A  
CAP, 4.7uF, 10%, 6.3V, X5R, 0603  
CAP, 1000pF, 10%, 16V, X7R, 0201  
CAP, 10000pF, 10%, 10V, X5R, 0201  
CONN, HDR, ST, 2x10, 0.100"  
Taiyo Yuden (USA), Inc.  
AVX/KYOCERA ASIA LTD.  
Murata Electronics  
EMK063B7151KP-F  
TAJA226K010RNJ  
GRM188R60J475KE19D  
0201YC102KAT2A  
0201ZD103KAT2A  
TSW-110-07-G-D  
C5  
C6, C8  
C7, C10  
C9  
AVX/KYOCERA ASIA LTD.  
AVX/KYOCERA ASIA LTD.  
SAMTEC INC.  
P1  
CONN, SMA, EL FLT VIPER, MAT-21-  
1038  
J1 thru J25  
U1*  
Amphenol RF Asia Corp  
Qorvo  
901-10425  
QM57508  
279890  
DUT  
Marcel Electronics  
International  
QM57508 EVB PCB  
N/A  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
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MMMB Module  
Application Schematic  
All outputs labeld as A connections, all inputs are labeled as B connections.  
For all connections it is recommended that a pi-network placeholder be in place for initial evaluation.  
The MIPI lines (SCLK, SDATA, and VIO) do have internal filtering but recommend place holders for initial evaluation.  
The Vbatt_Vcc connection should be made as close to the source as possible with separate traces using a star routing configuration.  
Bypass capacitors should be placed as close to the DUT as possible. The capacitor values for Vcc and Vbatt are suggested based on  
the EVB layout. They may require additional evaluation depending on specific parasitics of the application circuit board.  
System level ESD test passed 8kV on the 57508-evaluation board per IEC 61000-4-2 requirements.  
* Shunt inductors values placed on EVB for ESD testing: Low Band_22nH, Mid Band_22nH, High Band_15nH.  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
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MMMB Module  
Package Outline and Branding Drawing  
Dimensions in millimeters  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
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QM57508  
MMMB Module  
PCB Design Guidelines  
PCB Surface Finish  
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 2 to 5 µinch gold over  
180 µinch nickel.  
Solderability  
Compatible with both lead-free (260 °C max. reflow temperature) and tin/lead (245 °C max. reflow temperature) soldering processes.  
Package lead plating: Electrolytic plated Au over Ni  
PCB Land Pattern  
PCB land patterns for RFMD components are based on IPC-7351 standards and RFMD empirical data. The pad pattern shown has been  
developed and tested for optimized assembly at RFMD. The PCB land pattern has been developed to accommodate lead and package  
tolerances. Since surface mount processes vary from company to company, careful process development is recommended.  
PCB Metal Land and Solder Mask Pattern  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
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QM57508  
MMMB Module  
Handling Precautions  
Parameter  
Rating  
Standard  
Caution!  
ESD sensitive device  
ESD Human Body Model (HBM)  
ESD Charged Device Model (CDM)  
MSL Moisture Sensitivity Level  
Class 2  
Class C3  
Level 3  
ANSI/ESDA/JEDEC JS-001  
ANSI/ESDA/JEDEC JS-002  
IPC/JEDEC J-STD-020  
RoHS Compliance  
This part is compliant with the 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and  
Electronic Equipment), as amended by Directive 2015/863/EU.  
This product also has the following attributes:  
Lead free  
Halogen Free (Chlorine, Bromine)  
Antimony Free  
TBBP-A (C15H12Br402) Free  
SVHC Free  
Pb  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
34 of 35  
QM57508  
MMMB Module  
Revision History  
Revision  
Date  
Description  
QM57508 Data Sheet Mass Production J.Mickler  
MP  
7/27/2017  
Correction to GSM Low Band Pin Power Control, Typ value is 35.25 not 34.25 dBm.  
MP  
10/02/2017  
Added note to EDGE Timing Diagram for Vramp Control in Pin vs Vramp Power Control Mode.  
MP  
MP  
MP  
10/26/2017  
11/15/2017  
03/04/2019  
Correction to Ruggedness Notes Aligning VSWR  
GSM LB Linear Mode optimized with EDGE Mode.  
Correction to Reg 30 MIPI write.  
Contact Information  
For the latest specifications, additional product information, worldwide sales and distribution locations:  
Web: www.qorvo.com  
Tel: 1-844-890-8163  
Email: customer.support@qorvo.com  
Important Notice  
The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or  
liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the  
latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to  
any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS  
INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND  
ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE,  
USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  
Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining  
QM57508 Data Sheet MP Subject to change without notice  
www.qorvo.com  
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