QM75041TR13 [QORVO]

5G PAMiD Module;
QM75041TR13
型号: QM75041TR13
厂家: Qorvo    Qorvo
描述:

5G PAMiD Module

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ADVANCED  
QM75041  
5G PAMiD Module  
Product Description  
The Qorvo® QM75041 is a highly integrated Sub-6GHz  
PAMiD compliant to 5G-NR standards focused on Best-in-  
class 5G performance and ease-of-use (EOU) for platforms  
targeting advanced RF, including flagship/premium  
smartphones and data devices.  
The module consists of a High Band PA, Filter, Directional  
Coupler and TxRx Switch for TDD operation.  
The QM75041 supports Average Power Tracking (APT) PC2  
power targets as well as Envelope Tracking (ET) up to 5.2  
Vdc.  
The QM75041 is packaged in a RoHS-compliant,30 pin,  
3mm x 5mm x 0.70mm lead less package.  
Functional Block Diagram  
30 Pin, 3.0 mm x 5.0 mm x 0.70 mm  
Feature Overview  
5G-NR supporting full n41 (2.496-2.690 GHz) Band  
Integrated filtering  
Integrated Vcc Bypass Cap Switch  
Bi-Directional Coupler  
Advanced Smartphones, Tablets and Cellular Devices  
Datacards  
Machine-to-Machine  
MIPI RFFE 2.1 Applications  
Top View  
Ordering Information  
PART NUMBER  
QM75041SB  
DESCRIPTION  
5pc Bag  
QM75041TR7X  
Any Size Reel  
13” reel, Qty to order (5k  
units)  
QM75041TR13  
QM75041DK01  
QM75041EVB01  
Design Kit  
Evaluation board  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
1 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Absolute Maximum Ratings  
Units  
Parameter  
Symbol, Conditions  
Rating  
Battery voltage  
VBATT  
6.0  
6.0  
V
V
Max Supply Voltage  
RFFE Control Interface Bus  
Input RF Power  
VCC1, VCC2  
VIO, SDATA, SCLK  
TX input, CW 50 Ohm,T=25 °C  
2.0  
V
+10.0  
dBm  
dBm  
Input RF Power  
ANT port, Rx mode, in band frequencies  
25  
Storage Temperature  
Tstorage  
Tcase  
-40 to 150  
-20 to 85  
°C  
°C  
Operating Case Temperature  
All Temps, All Operating Voltage, VSWR<10:1 all  
phases  
No Damage Pout (5G)  
Prated + 2  
dBm  
Notes: Exceeding any one or combination of the Absolute Maximum Rating conditions may cause damage to the device. Extended application of the Absolute Maximum  
Rating conditions to the device may reduce device reliability. Specified typical operation of the device under Absolute Maximum Rating conditions is not implied.  
Recommended Operating Conditions  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Units  
VBATT  
3
3.8  
4.8  
APT VCC1, VCC2  
ET VCC1, VCC2  
0.5  
0.5  
3.7  
3.7  
5.2  
5.2  
Supply Voltage  
V
RFFE Control  
Interface Bus  
VIO, SDATA,  
SCLK  
1.65  
-
1.8  
-
1.95  
0.45  
V
V
V
VIO Power On  
Reset Voltage  
VIO_Reset  
Logic Low  
0
0
0.3*VIO  
Logic High  
0.7*VIO  
VIO  
20  
V
Leakage at VBatt  
uA  
Leakage at VCC1/  
VCC2  
Operating Case  
Temperature  
20  
85  
uA  
°C  
-20  
-
-
Input and Output  
Impedance  
50  
-
Electrical Specifications are measured at specified test conditions. Specifications are not guaranteed over all operating conditions.  
QM75041 Data Sheet - Rev F | Subject to change without notice  
2 of 25  
www.qorvo.com  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Timing Diagram  
The QM75041 recommended control timing for Tx mode operation is shown below. The falling edge of SCLK during Bus Park (BP) is the  
master timing reference for all hardware events such as the application of RF input to the Tx input port of the module. Failure to comply  
with the specification below may result in RF output distortion or module damage.  
For applications where MIPI RFEE VIO is turned ON/OFF in accordance with MIPI RFEE bus activity, please refer to the VIO Timing  
specifications.  
MIPI RFEE Command Data Frames  
BP  
BP  
SDATA  
SCLK  
D1  
D0  
P
P = parity bit  
D1  
D0  
P
Module states change at  
the falling edge of SCLK  
during Buss Park BP  
Module Internal Control Logic  
T1  
T2  
Target  
Power  
Module State Change T1 min T2 min  
Sleep TX  
5 µs  
0 µs  
RF input power at module Tx port  
Minimum  
Power  
Time  
Delay application of RF power to Tx input by at least T1 µs after switching to Tx mode (TRX_SW_Control Bus  
Park BP).  
Do not exit Tx mode until T2 µs after RF power at the Tx input has been removed.  
2µs are recommended typically.  
QM75041 Data Sheet - Rev F | Subject to change without notice  
3 of 25  
www.qorvo.com  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
5G NR Test Signal Configurations  
All test signals are 3GPP TS38.101 compliant  
MPR for all BW and SCS  
WF TYPE  
Modulation  
OUTER  
0.5  
1  
INNER  
Pi/2-BPSK  
QPSK  
0
0
DFT-s-OFDM  
16QAM  
64QAM  
256QAM  
QPSK  
2  
1  
2.5  
4.5  
3  
3  
1.5  
2  
16QAM  
64QAM  
256QAM  
CP-OFDM  
3.5  
6.5  
5G NR n41 Tx Characteristics, PC2  
Test conditions unless otherwise specified: VCC1 = VCC2 = +5.2V, VBATT = +3.8ꢀV, Temp. = 25ꢀ°C. Characterized Operating Bandwidth:  
APT = 100MHz.  
Performance referenced to module pin location.  
Product Spec.  
Power  
Mode  
Parameter  
Conditions  
Units  
Min.  
Typ.  
Max.  
Frequency  
Output Power  
Linear  
2496  
-
2690  
MHz  
Pout = +29.5 dBm, DFT-S-OFDM QPSK 100  
APT, HPM,  
MPR = 0  
29.5  
29.7  
30  
-
dBm  
dB  
Output Power n41 MHz Inner RB  
Gain  
Pout = +29.5 dBm, DFT-S-OFDM QPSK 100  
MHz Inner RB  
APT, HPM,  
MPR = 0  
Gain (G) n41  
Linearity  
Adjacent Channel  
Leakage Power  
Ratio (ACLR) n41  
EUTRAACLR, Pout = +26.5dBm,  
CP-OFDM QPSK,100 MHz FRB  
APT, HPM,  
MPR = 3  
-38  
dBc  
EVM  
EVM, Pout = +23.0dBm, CP-OFDM 256 QAM,  
100 MHz FRB  
APT, HPM,  
MPR = 6.5  
EVM n41  
Current  
Current n41  
1.85  
2.0  
1000  
-
%
mA  
dBm  
dB  
Current, Pout = +29.5 dBm, DFT-S-OFDM  
QPSK 100 MHz Inner RB  
APT, HPM,  
MPR = 0  
Output Power  
Linear  
Pout = +3.0 dBm, DFT-S-OFDM QPSK 100  
Output Power n41 MHz FRB  
APT LPM  
APT LPM  
3.0  
-
Gain  
Pout = +3.0 dBm, DFT-S-OFDM QPSK 100  
MHz FRB  
Gain (G) n41  
23  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
4 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Product Spec.  
Units  
Power  
Mode  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Frequency  
2496  
-
2690  
MHz  
Linearity  
Adjacent Channel  
Leakage Power  
Ratio (ACLR) n41  
EUTRAACLR, Pout = +3.0 dBm, DFT-S-OFDM  
QPSK, 100 MHz FRB  
APT LPM  
APT LPM  
-38  
-38  
dBc  
dBc  
Adjacent Channel  
Leakage Power  
Ratio (ACLR) n41  
EUTRAACLR, Pout = +3.0 dBm,  
CP-OFDM QPSK,100 MHz FRB  
Current  
Current n41  
Rx Band Noise  
Current, Pout = +3.0 dBm  
APT LPM  
115  
mA  
Rx BN at n41 Tx output,  
600 - 960MHz, (LB)  
MPR=1, Pout = +28.5 dBm, QPSK,  
MPR=3, Pout = +26.5 dBm, QPSK  
-170  
-171  
-171  
-128  
-137  
dBm/ Hz  
dBm/ Hz  
dBm/ Hz  
dBm/ Hz  
dBm/ Hz  
APT HPM  
APT HPM  
Rx BN at n41 Tx output,  
1574 -1577MHz, (GPS,  
GLONASS)  
MPR=1, Pout = +28.5 dBm, QPSK,  
MPR=3, Pout = +26.5 dBm, QPSK  
Rx BN at n41 Tx output,  
1805 - 1880MHz, (MB)  
MPR=1, Pout = +28.5 dBm, QPSK,  
MPR=3, Pout = +26.5 dBm, QPSK  
APT HPM  
APT HPM  
Rx BN at n41 Tx output,  
2475 - 2495MHz  
(2.4GHz WiFi)  
MPR=1, Pout = +28.5 dBm, QPSK,  
MPR=3, Pout = +26.5 dBm, QPSK  
Rx BN at n41 Tx output,  
3300 - 5000MHz, (UHB)  
MPR=1, Pout = +28.5 dBm, QPSK,  
MPR=3, Pout = +26.5 dBm, QPSK  
APT HPM  
APT HPM  
HARMONICS  
Pout ≤ max power, measured with  
100MHz DFTS-OFDM-QPSK 1 RB 1  
SRB,136 SRB, 1 RB 2702SRB MPR=0  
waveform, Pout=+29.5 dBm  
dBm/  
MHz  
2nd Harmonic n41  
-40.0  
-40.0  
Pout ≤ max power, measured with  
100MHz DFTS-OFDM-QPSK 1 RB 1  
SRB,136 SRB, 1 RB 2702SRB MPR=0  
waveform, Pout=+29.5 dBm  
dBm/  
MHz  
3rd Harmonic n41  
APT HPM  
Pout ≤ max power, measured with  
100MHz DFTS-OFDM-QPSK 1 RB 136  
SRB MPR=0 waveform, Pout=+29.5  
dBm  
dBm/  
MHz  
4th Harmonic n41  
Spurious Levels  
APT HPM  
All Modes  
-40.0  
-70.0  
All Loadsꢀ≤ 6:1  
dBc  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
5 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
5G NR n41 Rx Characteristics  
Test conditions unless otherwise specified: VBATT = +3.8ꢀV, Temp. = 25ꢀ°C, PA disabled.  
Performance referenced to module pin location.  
Product Spec.  
Units  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Frequency  
2496  
-
2690  
MHz  
dB  
Insertion Loss  
I.L. n41  
VCC1 = VCC2 = +5.2V  
-
2.6  
-
Return Loss  
I.R.L. n41  
VCC1 = VCC2 = +5.2V  
VCC1 = VCC2 = +5.2V  
-
-
-14  
-14  
-
-
dB  
dB  
O.R.L. n41  
Rx Rejection  
LB Tx,699 915 MHz  
B3 Tx,1710-1785 MHz  
ISM Tx,2400 MHz  
Tx,3300-5000 MHz  
VCC1 = VCC2 = +5.2V  
VCC1 = VCC2 = +5.2V  
VCC1 = VCC2 = +5.2V  
VCC1 = VCC2 = +5.2V  
-
-
-
-
43  
43  
47  
43  
-
-
-
-
dB  
dB  
dB  
dB  
ISM 5G Tx,5000-5925  
MHz  
VCC1 = VCC2 = +5.2V  
-
36  
-
dB  
5G NR n41 Coupler Characteristics  
Test conditions unless otherwise specified: VBATT = +3.8ꢀV, Temp. = 25ꢀ°C, PA disabled.  
Performance referenced to module pin location.  
Product Spec.  
Parameter  
Conditions  
Units  
Min.  
Typ.  
Max.  
Frequency  
2496  
-
2690  
MHz  
Coupling Factor  
Coupling Factor  
-
20  
-
-
dB  
dB  
Coupler Variation over Output VSWR  
Coupler Variation  
2.5:1 at Ant Port  
-0.5  
0.5  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
6 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Recommended Register Settings for PA Section (RFFE1)  
MIPI RFEE Description  
The RFFE interface implemented in theQM75041 is in compliance with the MIPI Alliance Specification for RF Front-End Control  
Interface Version 2.1 - April 2018  
TX FFE Registers (RFFE1)  
Mask  
Write  
Support  
Yes  
Register  
address  
Default  
[msb:lsb]  
Read/ Trigger  
Write support  
Data Bits  
Reg00[7:4]  
Reg00[3]  
Register Name  
PA_CTRL0  
Qorvo Bit Field Name  
Reserved  
Qorvo Description  
0x00  
0x00  
4b0000  
1b0  
Reserved  
PA Enable  
0: PA OFF  
1: PA ON  
R/W  
R/W  
T0  
T0  
PA_CTRL0  
PA_EN  
Yes  
VCC Capacitor control  
0: iso mode (VCC cap switched out)  
1: bypass mode (VCC cap switched in)  
0x00  
0x00  
Reg00[2]  
PA_CTRL0  
PA_CTRL0  
VCC_CAP_BYP  
PA_MODE[1:0]  
1b0  
R/W  
R/W  
T0  
T0  
Yes  
OR'ed with Reg05[0] VCC_CAP_SW  
PA Mode  
00: ET HPM  
Reg00[1:0]  
2b00  
01: APT HPM  
Yes  
10: APT LPM  
11: Reserved (same as APT LPM)  
0x01  
0x02  
0x03  
Reg01[7:0]  
Reg02[7:0]  
Reg03[7:4]  
PA_CTRL2  
PA_CTRL1  
TR_CTRL  
PA_BIAS2[7:0]  
PA_BIAS1[7:0]  
Reserved  
8b00000000 PA Bias - power stage  
8b00000000 PA Bias - driver stage  
R/W  
R/W  
R/W  
T0  
T0  
T1  
No  
No  
Yes  
4b0000  
Reserved  
Transmit/Receive Switch Control.  
0000: OFF  
0001: reserved (same as 0000)  
0010: TX (load switch open)  
0011: PC3 TX (load switch closed)  
0100: reserved (same as 0000)  
0101: reserved (same as 0000)  
0110: reserved (same as 0000)  
0111: reserved (same as 0000)  
1000: reserved (same as 0000)  
1001: RX  
0x03  
Reg03[3:0]  
TR_CTRL  
ANT_SW[3:0]  
4b0000  
R/W  
T1  
Yes  
1010: reserved (same as 0000)  
1011: reserved (same as 0000)  
1100: reserved (same as 0000)  
1101: reserved (same as 0000)  
1110: reserved (same as 0000)  
1111: reserved (same as 0000)  
Reserved  
Coupler Output  
00: High Isolation  
01: Forward Port  
10: Reverse Port  
11: Coupler In  
Reserved  
VCC Capacitor control  
0: iso mode (VCC cap switched out)  
1: bypass mode (VCC cap switched in)  
0x04  
0x04  
0x05  
0x05  
Reg04[7:2]  
Reg04[1:0]  
Reg05[7:1]  
Reg05[0]  
CPL_CTRL  
CPL_CTRL  
PA_CTRL2  
PA_CTRL2  
Reserved  
CPL_OUT[1:0]  
Reserved  
6b000000  
2b00  
R/W  
R/W  
R/W  
R/W  
T2  
T2  
T0  
T0  
Yes  
Yes  
Yes  
Yes  
7b0000000  
1b0  
VCC_CAP_SW  
OR'ed with Reg00[2] VCC_CAP_BYP  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
7 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
TX FFE Registers (RFFE1)  
Mask  
Write  
Support  
Register  
address  
Default  
[msb:lsb]  
Read/ Trigger  
Write support  
Data Bits  
Register Name  
Qorvo Bit Field Name  
Qorvo Description  
0: Normal operation (ACTIVE)  
1: Secondary mode (LOW POWER)  
0: Normal operation  
0x1C  
Reg28[7]  
PM_TRIG  
PWR_MODE  
1b1  
1b0  
R/W  
R/W  
No  
No  
No  
No  
1: initialization state  
0x1C  
0x1C  
Reg28[6]  
PM_TRIG  
PM_TRIG  
PWR_STATE  
note - this bit always reads 0. Writing a 1 to this bit  
forces a reset.  
Setting these bits to '1' will cause the corresponding  
triggers to be masked (disabled), and RFFE writes to  
corresponding registers will change configuration  
immediately (no trigger command necessary).  
TriggerMask[2] = TriggerMask_2, TriggerMask[1] =  
TriggerMask_1, & TriggerMask[0] = TriggerMask_0  
Reg28[5:3]  
TriggerMask[2:0]  
3b000  
R/W  
No  
No  
Setting these bits to '1' will cause the registers associated  
with that trigger to be loaded with the contents of its  
corresponding shadow register. Trigger[2] = Trigger_2,  
Trigger[1] = Trigger_1, and Trigger[0] = Trigger_0  
0x1C  
0x1D  
Reg28[2:0]  
Reg29[7:0]  
PM_TRIG  
Trigger[2:0]  
3b000  
R/W  
RM  
No  
No  
No  
No  
This is a read-only register. However, during the  
programming of the USID a write command sequence is  
performed on this register, even though the write does  
not change its value.  
PRODUCT_ID  
PRODUCT_ID[7:0]  
8b00101100  
This is a read-only register. However, during the  
programming of the USID, a write command sequence is  
performed on this register, even though the write does  
MANUFACTURER_ID_LSB  
[7:0]  
0x1E  
0x1F  
Reg30[7:0]  
Reg31[7:4]  
MAN_ID  
8b11000110 not change its value. Note: This is the lower 8 least  
significant bits of the RFFE's MANUFACTURER_ID (i.e.  
MANUFACTURER_ID[7:0] =  
RM  
RM  
No  
No  
No  
No  
MANUFACTURER_ID_LSB[7:0]  
These bits are read-only. However, during the  
programming of the USID, a write command sequence is  
performed on this register even though the write does not  
change its value. Note: This is the 4 most significant bits  
of the RFFE's MANUFACTURER_ID (i.e.  
MANUFACTURER_ID[11:8] =  
MANUFACTURER_ID_MSB  
[3:0]  
MAN_US_ID  
4b0011  
MANUFACTURER_ID_MSB[3:0]  
Programmable USID. Performing a write to this register  
using the described programming sequences will program  
the USID in devices supporting this feature. These bits  
store the USID of the device.  
This is a read-only register. However, during the  
programming of the USID a write command sequence is  
performed on this register, even though the write does  
not change its value.  
This is an RFFE2 register to contain information about  
the revision of this module. The intent here is to use this  
as a type of scratch register -- to contain various  
information or serialization.  
0x1F  
0x20  
0x21  
Reg31[3:0]  
Reg32[7:0]  
Reg33[7:0]  
MAN_US_ID  
EXT_PRODUCT_ID  
REVISION_ID  
USID[3:0]  
4b1111  
RM  
RM  
RM  
No  
No  
No  
No  
No  
No  
EXT_PRODUCT_ID[7:0]  
REVISION_ID[7:0]  
8b00000000  
8b00000000  
0x22  
0x22  
Reg34[7:4]  
Reg34[3:0]  
GROUP_ID2  
GROUP_ID2  
GSID0_2[3:0]  
GSID1_2[3:0]  
4b0000  
4b0000  
Group slave ID 0  
Group slave ID 1  
R/W  
R/W  
No  
No  
No  
No  
0: Normal operation  
1: Software reset (reset of all configurable registers to  
default values, except for USID)  
UDR_RST  
(RFFE_STATUS2)  
0x23  
Reg35[7]  
SW_RESET_2  
1b0  
R/W  
No  
No  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
(RFFE_STATUS2)  
UDR_RST  
0x23  
0x23  
0x23  
0x23  
0x23  
0x23  
0x23  
Reg35[6]  
Reg35[5]  
Reg35[4]  
Reg35[3]  
Reg35[2]  
Reg35[1]  
Reg35[0]  
Reserved_Reg35_b6  
Reserved_Reg35_b5  
Reserved_Reg35_b4  
Reserved_Reg35_b3  
Reserved_Reg35_b2  
Reserved_Reg35_b1  
Reserved_Reg35_b0  
1b0  
1b0  
1b0  
1b0  
1b0  
1b0  
1b0  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
(RFFE_STATUS2)  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
8 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
TX FFE Registers (RFFE1)  
Mask  
Write  
Support  
Register  
address  
Default  
[msb:lsb]  
Read/ Trigger  
Write support  
Data Bits  
Register Name  
Qorvo Bit Field Name  
Qorvo Description  
0: Normal operation (ACTIVE)  
1: Secondary mode (LOW POWER)  
0x1C  
Reg28[7]  
Reg36[7]  
PM_TRIG  
PWR_MODE  
1b1  
1b0  
1b0  
1b0  
1b0  
1b0  
1b0  
1b0  
R/W  
R/W  
No  
No  
No  
No  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
ERR_SUM  
(RFFE_STATUS3)  
BUS_LOAD  
0x24  
Reserved_Reg36_b7  
Reserved  
Command sequence received with parity error – discard  
command.  
Command length error  
0x24  
0x24  
0x24  
0x24  
0x24  
0x24  
Reg36[6]  
Reg36[5]  
Reg36[4]  
Reg36[3]  
Reg36[2]  
Reg36[1]  
CMD_FRAME_P_ERR_2  
CMD_LEN_ERR_2  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
Address frame parity error = 1  
ADDR_FRAME_P_ERR_2  
DATA_FRAME_P_ERR_2  
READ_UNUSED_REG_2  
WRITE_UNUSED_REG_2  
Data frame with parity error  
Read command to an invalid address  
Write command to an invalid address  
Read command with a Broadcast_ID or GROUP_ID  
1b0  
0x24  
0x2B  
Reg36[0]  
Reg43[7:4]  
BID_GID_ERR_2  
reserved_Reg_43  
R/W  
R/W  
No  
No  
No  
No  
4b0000  
Reserved  
SDATA Driver strength in Readback Mode  
0x0: 10pf  
0x3: 40pf  
0x6: 80pf  
0x1: 20pf  
0x4: 50pf  
0x7: 100pf  
0x2: 30pf  
0x5: 60pf  
0x8: 120pf  
4b0100  
R/W  
R
No  
No  
No  
No  
0x9: 140pf 0xA: 160pf 0xB: 180pf  
0xC: 200pf 0xD: 250pf  
0xE-0xF: reserved  
8b11010010 A read of this register returns the test pattern  
0x2B  
0x2C  
Reg43[3:0]  
Reg44[7:0]  
BUS_LOAD  
TEST_PATTERN  
BUS_LOAD[3:0]  
Test_Pattern[7:0]  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
9 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
VIO Power On Reset (POR) Timing  
For applications where MIPI RFEE VIO is turned ON/OFF in accordance with MIPI RFEE bus activity, the timing recommendations below  
should be used to ensure error-free RFEE register writes following VIO power on reset (POR)  
Parameter  
Description  
MIN  
TYP  
MAX  
VIOH  
VIO High Voltage  
1.65V 1.80V 1.95V  
VIO_RST VIO Reset Voltage  
TVIO_RST VIO Reset Time  
TVIO_RST VIO Rise Time  
0V  
10µs  
1µs  
0V  
0.45V  
-
-
-
-
400µs  
-
T_SIGOL Minimum Wait Time after TVIO_R  
190µs  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
10 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Application Schematic  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
11 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Evaluation Board Layout  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
12 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Evaluation Board Layout (continued)  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
13 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Evaluation Board Schematic  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
14 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Evaluation Board Bill of Materials (BOM)  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
15 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Pin Configuration and Description  
Top View (looking through device)  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
16 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Pin Configuration and Description (continued)  
PIN NUMBER LABEL  
DESCRIPTION  
1
GND  
Ground  
Ground  
RX Output  
Ground  
Ground  
Ground  
Ground  
2
GND  
3
RXout_n41  
GND  
4
5
GND  
6
GND  
7
GND  
8
VCC_CAP_SW Switchable Ground connection for large external SMD Bypass Capacitor  
9
VCC2  
GND  
Supply voltage for n41 2nd stage PA  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
Ground  
VCC1  
GND  
Supply voltage for n41 1st and stage PA  
Ground  
VBATT  
GND  
Battery supply voltage for controller  
Ground  
TX  
N41 PA RF Input  
GND  
Ground  
VIO  
Supply voltage for MIPI RFFE interface  
SCLK  
SDATA  
GND  
Clock signal for MIPI RFFE interface  
Data signal for MIPI RFFE interface  
Ground  
CPL_IN  
GND  
Coupler Input Port  
Ground  
CPL_OUT  
GND  
Coupler Output Port  
Ground  
Ant_n41  
GND  
N41 Antenna Port  
Ground  
GND  
Ground  
GND  
Ground  
GND  
Ground  
GND  
Ground  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
17 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Mechanical Information Dimensions  
Package Marking and Dimensions  
Marking: Part number QM75041  
Notes:  
1.  
2.  
3.  
All dimensions are in mm. Angles are in degrees.  
Dimension and tolerance formats conform to ASME Y14.4M-1994.  
The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
18 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Mechanical Information Package Marking  
QM75041 Data Sheet - Rev F | Subject to change without notice  
19 of 25  
www.qorvo.com  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Mechanical Information Recommended Land Pattern and Mask  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
20 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Tape and Reel Information Carrier and Cover Tape Dimensions  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
21 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Tape and Reel Information Reel Dimensions  
Packaging reels are used to prevent damage to devices during shipping and storage. Loaded carrier tape is typically wound onto a  
plastic take-up reel. The reels are made from high-impact injection-molded polystyrene (HIPS), which offers mechanical and ESD  
protection to packaged devices. The reel size is either 7” or 13” in diameter based on the minimum number of samples. Standard T/R  
size = 5000 pieces on a 13” reel and 1000 pieces on a 7” reel.  
Packaging Reel for 12mm Wide Carrier Tape  
7Reel  
13Reel  
PART  
FEATURE  
SYMBOL  
SIZE (in)  
SIZE  
(mm)  
SIZE  
(in)  
SIZE  
(mm)  
FLANGE  
DIAMETER  
THICKNESS  
A
W2  
W1  
N
6.969  
0.717  
0.504  
2.283  
0.512  
0.079  
0.787  
177.0 12.992  
330  
18.2  
12.8  
102.0  
13.0  
2.0  
18.2  
12.8  
58.0  
13.0  
2.0  
0.717  
0.504  
4.016  
0.512  
0.079  
0.787  
SPACE BETWEEN FLANGE  
OUTER DIAMETER  
ARBOR HOLE DIAMETER  
KEY SLIT WIDTH  
HUB  
C
B
KEY SLIT DIAMETER  
D
20.0  
20.0  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
22 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Tape and Reel Information Tape length and label placement  
. Standard T/R size = 5000 pieces on a 13” reel and 1000 pieces on a 7” reel.  
Notes:  
1. Empty part cavities at the trailing and leading ends are sealed with cover tape. See EIA 481.  
2. Labels are placed on a flange opposite the sprockets in the carrier tape.  
QM75041 Data Sheet - Rev F | Subject to change without notice  
23 of 25  
www.qorvo.com  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
Handling Precautions  
Parameter  
Rating  
Standard  
All pins other  
than pin 8  
Class 1C, Pin  
8 Class1B  
ESD Human Body Model (HBM)  
ESDA/JEDEC JS-001-2012  
Caution!  
ESD sensitive device  
ESD Charged Device Model (CDM)  
MSL Moisture Sensitivity Level  
Class C2A  
MSL3  
JEDEC JESD22-C101F  
IPC/JEDEC J-STD-020  
Solderability  
Compatible with both lead-free (260 °C max. reflow temperature) and tin/lead (245 °C max. reflow temperature) soldering processes.  
Package lead plating: Electrolytic plated Au over Ni  
RoHS Compliance  
This part is compliant with the 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and  
Electronic Equipment), as amended by Directive 2015/863/EU.  
This product also has the following attributes:  
Halogen Free (Chlorine, Bromine)  
Antimony Free  
TBBP-A (C15H12Br402) Free  
SVHC Free  
Contact Information  
For the latest specifications, additional product information, worldwide sales and distribution locations:  
Web: www.qorvo.com  
Tel: 1-844-890-8163  
Email: customer.support@qorvo.com  
Important Notice  
The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or  
liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the  
latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to  
any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS  
INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND  
ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE,  
USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  
Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining  
applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.  
Copyright 2016 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc.  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
24 of 25  
ADVANCED  
QM75041  
UHB 5G PAMiD Module  
REVISION HISTORY  
Revision  
Date  
Description  
F2  
2020-01-23  
Baseline  
QM75041 Data Sheet - Rev F | Subject to change without notice  
www.qorvo.com  
25 of 25  

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