ACS109HMSR-03 [RENESAS]

AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16, DIE-16;


型号：	ACS109HMSR-03
厂家：	RENESAS TECHNOLOGY CORP
描述：	AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16, DIE-16 输出元件
文件：	总2页 (文件大小：41K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ACS109MS

Data Sheet

July 1999

File Number 4760

Radiation Hardened Dual J-K Flip-Flop

with Set and Reset

Features

• QML Qualiﬁed Per MIL-PRF-38535 Requirements

• 1.25 Micron Radiation Hardened SOS CMOS

The Radiation Hardened ACS109MS is a Dual J-K Flip-

Flop with Set and Reset. These Flip-Flops have

independent J, K, Set, Reset, and Clock inputs and Q and

Q outputs. The outputs change state on the positive-going

transition of the clock. Set and Reset are accomplished

asynchronously by Low-level inputs. All inputs are buffered

and the outputs are designed for balanced propagation

delay and transition times.

• Radiation Environment

- Latch-Up Free Under Any Conditions

- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10 RAD(Si)

-10

- SEU Immunity. . . . . . . . . . . . . <1 x 10

Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm )

• Input Logic Levels. . . . V = (0.3)(V ), V = (0.7)(V

IL CC IH

)

The ACS109MS is fabricated on a CMOS Silicon on

Sapphire (SOS) process, which provides an immunity to

Single Event Latch-up and the capability of highly reliable

performance in any radiation environment. These devices

offer significant power reduction and faster performance

when compared to ALSTTL types.

• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA (Min)

• Quiescent Supply Current . . . . . . . . . . . . . . . 10µA (Max)

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . .25ns (Max)

Applications

Speciﬁcations for Rad Hard QML devices are controlled

by the Defense Supply Center in Columbus (DSCC). The

SMD numbers listed below must be used when ordering.

• High Speed Control Circuits

• Sensor Monitoring

• Low Power Designs

Detailed Electrical Speciﬁcations for the ACS109MS are

contained in SMD 5962-98632. A “hot-link” is provided

on our homepage for downloading.

http://www.intersil.com/spacedefense/spaceselect.htm

Ordering Information

INTERNAL MARKETING

ORDERING NUMBER

5962F9863201VCC

NUMBER

TEMP. RANGE ( C)

PACKAGE

16 Ld SBDIP

DESIGNATOR

CDIP2-T16

CDFP4-F16

ACS109DMSR-03

-55 to 125

ACS109D/SAMPLE-03

5962F9863201VXC

ACS109K/SAMPLE-03

5962F9863201V9A

ACS109D/SAMPLE-03

ACS109KMSR-03

-55 to 125

16 Ld SBDIP

16 Ld Flatpack

Die

ACS109K/SAMPLE-03

ACS109HMSR-03

Pinouts

ACS109MS

(SBDIP)

(FLATPACK)

TOP VIEW

16 V

15 2R

14 2J

13 2K

12 2CP

11 2S

10 2Q

1CP

2CP

1CP

GND

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

ACS109MS

Die Characteristics

DIE DIMENSIONS:

PASSIVATION:

Size: 2390µm x 2390µm (94 mils x 94 mils)

Thickness: 525µm ±25µm (20.6 mils ±1 mil)

Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)

Type: Phosphorous Silicon Glass (PSG)

Thickness: 1.30µm ±0.15µm

SPECIAL INSTRUCTIONS

METALLIZATION: AI

Bond V

First

ADDITIONAL INFORMATION:

Metal 1 Thickness: 0.7µm ±0.1µm

Metal 2 Thickness: 1.0µm ±0.1µm

Worst Case Current Density: <2.0 x 10 A/cm

Transistor Count: 236

SUBSTRATE POTENTIAL

Unbiased Insulator

Metallization Mask Layout

ACS109MS

(2)

(1)

(16)

(15)

(14) 2J

(13) 2K

(12) 2CP

(11) 2S

1K (3)

1CP (4)

1S (5)

1Q (6)

(7)

(8)

GND

(9)

(10)

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site www.intersil.com

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