EL5134IS-T7 [RENESAS]

1 CHANNEL, VIDEO AMPLIFIER, PDSO8, 0.150 INCH, SOIC-8;
EL5134IS-T7
型号: EL5134IS-T7
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

1 CHANNEL, VIDEO AMPLIFIER, PDSO8, 0.150 INCH, SOIC-8

放大器 光电二极管 商用集成电路
文件: 总15页 (文件大小:1635K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATASHEET  
EL5134, EL5135, EL5234, EL5235  
650MHz, Gain of 5, Low Noise Amplifiers  
FN7383  
Rev 4.00  
May 4, 2007  
The EL5134, EL5135, EL5234, and EL5235 are ultra-low  
voltage noise, high speed voltage feedback amplifiers that  
are ideal for applications requiring low voltage noise,  
including communications and imaging. These devices offer  
extremely low power consumption for exceptional noise  
performance. Stable at gains as low as 5, these devices offer  
100mA of drive performance. Not only do these devices find  
perfect application in high gain applications, they maintain  
their performance down to lower gain settings.  
Features  
• 650MHz -3dB bandwidth  
• Av = +5 stable  
• Ultra low noise 1.5nV/Hz and 0.9pA/Hz  
• 450V/µs slew rate  
• Low supply current = 6.7mA per amplifier  
• Single supplies from 5V to 12V  
• Dual supplies from ±2.5V to ±5V  
• Fast disable on the EL5134 and EL5234  
• Duals EL5234 and EL5235  
These amplifiers are available in small package options  
(SOT-23) as well as the MSOP and the industry-standard  
SO packages. All parts are specified for operation over the  
-40°C to +85°C temperature range.  
• Low cost  
• Pb-free plus anneal available (RoHS compliant)  
Applications  
• Imaging  
• Instrumentation  
• Communications devices  
Ordering Information  
PART NUMBER  
PART MARKING  
5134IS  
TAPE & REEL  
PACKAGE  
8 Ld SOIC (150 mil)  
8 Ld SOIC (150 mil)  
8 Ld SOIC (150 mil)  
PKG. DWG. #  
EL5134IS  
-
MDP0027  
MDP0027  
MDP0027  
EL5134IS-T7  
5134IS  
5134IS  
5134ISZ  
5134ISZ  
5134ISZ  
BDAA  
7”  
EL5134IS-T13  
13”  
EL5134ISZ (Note)  
EL5134ISZ-T7 (Note)  
EL5134ISZ-T13 (Note)  
EL5135IW-T7  
-
8 Ld SOIC (150 mil) (Pb-Free) MDP0027  
8 Ld SOIC (150 mil) (Pb-Free) MDP0027  
8 Ld SOIC (150 mil) (Pb-Free) MDP0027  
7”  
13”  
7” (3k pcs)  
5 Ld SOT-23  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
MDP0043  
MDP0043  
MDP0043  
MDP0027  
MDP0027  
MDP0027  
EL5135IW-T7A  
EL5135IWZ-T7 (Note)  
EL5135IWZ-T7A (Note)  
EL5234IY  
BDAA  
7” (250 pcs)  
5 Ld SOT-23  
BTAA  
7” (3k pcs)  
5 Ld SOT-23 (Pb-Free)  
5 Ld SOT-23 (Pb-Free)  
10 Ld MSOP (3.0mm)  
10 Ld MSOP (3.0mm)  
10 Ld MSOP (3.0mm)  
8 Ld SOIC (150 mil)  
8 Ld SOIC (150 mil)  
8 Ld SOIC (150 mil)  
BTAA  
7” (250 pcs)  
BWAAA  
BWAAA  
BWAAA  
5235IS  
5235IS  
5235IS  
-
EL5234IY-T7  
7”  
EL5234IY-T13  
13”  
-
EL5235IS  
EL5235IS-T7  
7”  
EL5235IS-T13  
13”  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate  
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified  
at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
FN7383 Rev 4.00  
May 4, 2007  
Page 1 of 15  
EL5134, EL5135, EL5234, EL5235  
Pinouts  
EL5134  
(8 LD SOIC)  
TOP VIEW  
EL5135  
(5 LD SOT-23)  
TOP VIEW  
NC  
IN-  
1
2
3
4
8
7
6
5
CE  
OUT  
VS-  
IN+  
1
2
3
5
4
VS+  
IN-  
VS+  
OUT  
NC  
-
+
+
-
IN+  
VS-  
EL5234  
(10 LD MSOP)  
TOP VIEW  
EL5235  
(8 LD SOIC)  
TOP VIEW  
INA+  
CEA  
VS-  
INA-  
1
2
3
4
5
10  
9
OUTA  
INA-  
INA+  
VS-  
1
2
3
4
8
7
6
5
VS+  
-
+
OUTA  
VS+  
-
+
OUTB  
INB-  
8
-
+
+
-
OUTB  
INB-  
CEB  
INB+  
7
INB+  
6
FN7383 Rev 4.00  
May 4, 2007  
Page 2 of 15  
EL5134, EL5135, EL5234, EL5235  
Absolute Maximum Ratings (T = +25°C)  
Thermal Information  
A
Supply Voltage from V + to V - . . . . . . . . . . . . . . . . . . . . . . . 13.2V  
SR, Supply Rate of Supply Voltage Slew Rate . . . . . . . . . . . . 1V/µs  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C  
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C  
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
S
S
I
-, I +, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mA  
IN IN  
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests  
are at the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
Electrical Specifications V + = +5V, V - = -5V, Av=+5, R = 100, R = 25, R = 500,T = +25°C, unless otherwise specified.  
S
S
F
G
L
A
PARAMETER  
DESCRIPTION  
CONDITIONS  
MIN  
TYP  
0.2  
0.3  
-0.8  
3.7  
0.3  
-3  
MAX  
1
UNIT  
mV  
V
Offset Voltage  
-1  
OS  
EL5234  
±1.5  
mV  
T V  
C
Offset Voltage Temperature Coefficient  
Input Bias Current  
Measured from T  
to T  
µV/°C  
µA  
OS  
MIN  
MAX  
MAX  
IB  
V
V
= 0V  
= 0V  
2.5  
5.5  
0.7  
IN  
IN  
I
Input Offset Current  
-0.7  
nA  
OS  
TC  
Input Bias Current Temperature  
Coefficient  
Measured from T  
to T  
nA/°C  
IOS  
MIN  
PSRR  
CMRR  
CMIR  
Power Supply Rejection Ratio  
Common Mode Rejection Ratio  
Common Mode Input Range  
Input Resistance  
V + = 4.75V to 5.25V  
75  
80  
±3  
5
85  
108  
±3.3  
16  
dB  
dB  
S
V
= ±3V  
CM  
Guaranteed by CMRR test  
Common mode  
V
R
C
M  
pF  
IN  
Input Capacitance  
1
IN  
I
Supply Current, per amplifier  
Open Loop Gain  
5.6  
4.0  
6.7  
7.8  
mA  
kV/V  
V
S
AVOL  
R = 1kto GND  
8.0  
L
V
Voltage Swing  
R = 1k, R = 900, R = 100  
±3.5  
±3.3  
70  
3.9  
O
L
F
G
R = 150, R = 900, R = 100  
3.65  
140  
650  
40  
V
L
L
F
G
I
Short Circuit Current  
-3dB Bandwidth  
±0.1dB Bandwidth  
Gain Bandwidth Product  
Phase Margin  
R
= 10  
= 5, R = 1k  
mA  
MHz  
MHz  
MHz  
°
SC  
BW-3dB  
BW-0.1dB  
GBWP  
PM  
A
V
L
A
= 5, R = 1k  
L
V
1500  
55  
R
= 1k, C = 6pF  
L
L
SR  
Slew Rate  
V
= +5V, R = 150, V  
= 0V to 3V  
350  
475  
1.75  
1.75  
25  
V/µs  
ns  
S
L
OUT  
t
t
Rise Time  
±0.1V  
±0.1V  
±0.1V  
R
F
STEP  
STEP  
STEP  
Fall Time  
ns  
OS  
Overshoot  
%
t
0.01% Settling Time  
Differential Gain  
Differential Phase  
Input Noise Voltage  
Input Noise Current  
14  
ns  
S
dG  
dP  
A
= 5, R = 1k  
0.12  
0.08  
1.5  
%
V
F
A
= 5, R = 1k  
°
V
F
e
f = 10kHz  
f = 10kHz  
nV/Hz  
pA/Hz  
N
i
0.9  
N
FN7383 Rev 4.00  
May 4, 2007  
Page 3 of 15  
EL5134, EL5135, EL5234, EL5235  
Electrical Specifications V + = +5V, V - = -5V, Av=+5, R = 100, R = 25, R = 500,T = +25°C, unless otherwise specified.  
S
S
F
G
L
A
PARAMETER  
DESCRIPTION  
CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SUPPLY (EL5134, EL5234)  
I
I
Supply Current - Disabled, per Amplifier  
Supply Current - Disabled, per Amplifier No load, V = 0V  
0
+12  
-12  
+25  
0
µA  
µA  
SOFF+  
SOFF-  
-25  
IN  
ENABLE (EL5134, EL5234)  
I
I
CE Pin Input High Current  
CE = +5V  
CE = 0V  
1
10  
0
+25  
+1  
µA  
µA  
V
IHCE  
ILCE  
CE Pin Input Low Current  
-1  
V
V
CE Input High Voltage for Power-down  
CE Input Low Voltage for Power-up  
V + - 1  
S
IHCE  
ILCE  
V + - 3  
V
S
Applications Information  
Typical Performance Curves  
5
240  
180  
120  
60  
V
= ±5V  
= +5  
= 25  
= 500  
= 5pF  
V = ±5V  
S
S
4
3
A
A
= +5  
V
V
R
R
C
R
R
C
= 25  
= 500  
= 5pF  
G
L
G
L
2
L
L
1
0
0
-1  
-2  
-3  
-4  
-5  
-60  
-120  
-180  
-240  
-3dB BW @ 667MHz  
0.1  
1
10  
100  
1K  
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
FREQUENCY (MHz)  
FIGURE 1. GAIN vs FREQUENCY  
FIGURE 2. PHASE vs FREQUENCY  
0.5  
0.4  
0.3  
0.2  
0.1  
0
70  
V
R
= ±5V  
= 500  
S
L
V
= ±5V  
= +5  
= 25  
= 500  
= 5pF  
S
A
V
GAIN = 40dB or 100  
60  
50  
40  
30  
20  
R
R
C
G
L
FREQUENCY = 15.9MHz  
GAIN BW PRODUCT = 15.9 x 100  
= 1590MHz  
0.1dB BW @ 40MHz  
L
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
1
10  
100  
1
10  
FREQUENCY (MHz)  
100  
FREQUENCY (MHz)  
FIGURE 4. GAIN BANDWIDTH PRODUCT  
FIGURE 3. 0.1dB BANDWIDTH  
FN7383 Rev 4.00  
May 4, 2007  
Page 4 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
1800  
5
4
V
= ±5V  
= 25  
= 500  
= 5pF  
V
R
= ±5V  
= 500  
S
S
L
R
R
C
G
L
L
1600  
1400  
1200  
1000  
800  
3
2
A
= +5  
V
1
0
-1  
-2  
-3  
-4  
-5  
A
= +20  
V
A
= +10  
V
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
SUPPLY VOLTAGES (±V)  
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS +A  
FIGURE 5. GAIN BANDWIDTH PRODUCT vs SUPPLY  
VOLTAGES  
V
5
5
4
A
= +5V  
= 25  
= 500  
= 5pF  
V
4
3
V
= ±5V  
= +5  
S
R
R
C
G
L
L
A
V
3
R
C
= 500  
= 5pF  
L
L
R
= 1k  
L
2
R
= 500  
2
L
V
= ±6V  
S
1
1
0
0
-1  
-2  
-3  
-4  
-5  
-1  
-2  
-3  
-4  
-5  
V
= ±5V  
S
R
R
= 150  
= 100  
L
V
= ±4V  
= ±3V  
S
V
L
S
V
= ±2.5V  
100  
S
R
= 50  
L
0.1  
1
10  
FREQUENCY (MHz)  
1K  
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±V  
S
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS R  
LOAD  
5
5
V
= ±5V  
= +10  
= 25  
= 10pF  
V
= ±5V  
A = +5  
V
S
S
4
3
4
3
C
= 18pF  
L
A
V
R
C
R
R
R
= 25  
= 100  
= 500  
G
L
G
F
C
= 12pF  
L
R
= 500  
L
2
2
L
C
= 8.2pF  
L
1
1
0
0
R
= 1k  
L
-1  
-2  
-3  
-4  
-5  
-1  
-2  
-3  
-4  
-5  
C
= 4.7pF  
L
R
= 150  
L
C
= 0pF  
L
R
= 100  
L
R
= 50  
L
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS R  
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS C  
LOAD  
LOAD  
(A = +10)  
(A = +5)  
V
V
FN7383 Rev 4.00  
May 4, 2007  
Page 5 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
5
5
4
R
= 200  
C
= 47pF  
F
L
V
= ±5V  
= +10  
= 25  
= 225  
= 500  
V
= ±5V  
= +5  
= 500  
= 5pF  
S
S
4
3
C
L
= 27pF  
L
A
A
V
V
R
R
R
3
R
C
R
= 160  
G
F
L
L
F
C
= 12pF  
2
2
L
R
= 400  
F
1
1
0
0
-1  
-2  
-3  
-4  
-5  
-1  
-2  
-3  
-4  
-5  
R
= 100  
F
C
= 4.7pF  
10  
L
R
= 50  
F
0.1  
1
100  
1K  
0.1  
1
10  
100  
1K  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS C  
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS R  
F
LOAD  
(A = +10)  
(A = +5)  
V
V
5
4
5
4
R
F
= 4.53k  
V
= ±5V  
= +10  
= 500  
= 10pF  
V
= ±5V  
= +5  
= 25  
= 500  
= 5pF  
F
S
C
= 8.2pF  
= 4.7pF  
S
IN  
A
A
V
V
R
= 2.74k  
3
R
C
3
R
R
C
L
L
G
L
C
IN  
2
2
R
= 909  
L
F
1
1
0
0
-1  
-2  
-3  
-4  
-5  
-1  
-2  
-3  
-4  
-5  
C
= 2.7pF  
IN  
R
= 225  
F
C
= 0pF  
100  
IN  
R
= 100  
F
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
F
0.1  
1
10  
FREQUENCY (MHz)  
1K  
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS R  
(A = +10)  
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS C (-)  
IN  
(A = +5)  
V
V
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
200  
180  
160  
140  
120  
100  
80  
5
4
C
= 20pF  
V = ±5V  
S
V
= ±5V  
= +20  
= 25  
= 500  
= 10pF  
IN  
S
A
V
OPEN LOOP GAIN  
3
R
R
C
G
L
C
= 15pF  
IN  
2
L
1
0
-1  
-2  
-3  
-4  
-5  
C
= 10pF  
IN  
60  
OPEN LOOP PHASE  
40  
20  
C
= 0pF  
IN  
-10  
0.001  
0
1K  
0.1  
1
10  
FREQUENCY (MHz)  
100  
1K  
0.01  
0.1  
1
10  
100  
FREQUENCY (MHz)  
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS C (-)  
IN  
FIGURE 16. OPEN LOOP GAIN and PHASE vs FREQUENCY  
(A = +10)  
V
FN7383 Rev 4.00  
May 4, 2007  
Page 6 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
-10  
-30  
100  
V
= ±5V  
S
10  
1
-50  
-70  
0.1  
0.0  
-90  
-110  
1K  
10K  
100K  
1M  
10M  
100M 500M  
0.01  
0.1  
1
10  
100  
FREQUENCY (Hz)  
FREQUENCY (MHz)  
FIGURE 18. CMRR vs FREQUENCY  
FIGURE 17. OUTPUT IMPEDANCE vs FREQUENCY  
10  
10  
9
8
7
6
5
4
3
2
1
0
A =+10  
V
S
V
= ±5V  
= +5  
= 25  
= 5pF  
S
V =±5V  
A
V
R
= 1k  
LOAD  
R
C
V +  
S
-10  
-30  
-50  
-70  
-90  
G
L
V -  
S
R
= 150  
LOAD  
V -  
S
V +  
S
1K  
10K  
100K  
1M  
10M  
100M 500M  
0.1  
1.0  
10  
FREQUENCY (MHz)  
100  
1K  
FREQUENCY (Hz)  
FIGURE 20. MAX OUTPUT VOLTAGE SWING vs FREQUENCY  
FIGURE 19. PSRR vs FREQUENCY  
-40  
20  
15  
10  
5
V
= ±5V  
= +5  
= 25  
S
V
= ±5V  
= +5  
= 25  
= 500  
S
-50  
-60  
A
V
A
V
R
G
R
R
G
L
CHIP DISABLED  
-70  
0
INPUT TO OUTPUT  
-80  
-5  
-90  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
OUTPUT TO INPUT  
-100  
-110  
-120  
-130  
-140  
0.1  
1.0  
10  
FREQUENCY (MHz)  
100  
1K  
0.1  
1
10  
100  
1K  
FREQUENCY (MHz)  
FIGURE 21. GROUP DELAY vs FREQUENCY  
FIGURE 22. INPUT AND OUTPUT ISOLATION (EL5134, EL5234)  
FN7383 Rev 4.00  
May 4, 2007  
Page 7 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
-30  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
V
= ±5V  
= =5  
S
V
A
= ±5V  
= +5  
V
S
A
V
-40  
-50  
R
R
C
V
= 25  
= 500  
= 5pF  
= 2V  
G
Fin = 10MHz  
R
R
C
= 25  
= 500  
= 5pF  
G
L
L
L
T.H.D  
L
OUT  
P-P  
H.D  
-60  
nd  
2
-70  
rd  
-80  
3
H.D  
-90  
Fin = 1MHz  
-100  
0
1
2
3
4
5
6
7
8
0.1  
1.0  
10  
100  
FUNDAMENTAL FREQUENCY (MHz)  
OUTPUT VOLTAGES (V  
)
P-P  
FIGURE 23. HARMONIC DISTORTION vs FREQUENCY  
FIGURE 24. TOTAL HARMONIC DISTORTION vs OUTPUT  
VOLTAGES  
6
6
V
= ±5V  
= +5  
V
= ±5V  
A = +5  
V
S
S
ENABLE SIGNAL  
OUTPUT SIGNAL  
5
4
5
4
A
V
R
R
V
= 25  
= 500  
= 4V  
R
R
V
= 25  
= 500  
= 4V  
G
G
L
L
OUT  
P-P  
OUT  
P-P  
3
3
DISABLE SIGNAL  
2
2
1
1
0
0
-1  
-2  
-1  
-2  
-3  
OUTPUT SIGNAL  
-3  
-500 -400 -300 -200 -100  
0
100 200 300 400  
-200 -100  
0
100 200 300 400 500 600 700 800  
TIME (ns)  
TIME (ns)  
FIGURE 25. TURN-ON TIME (EL5134, EL5234)  
FIGURE 26. TURN-OFF TIME (EL5134, EL5234)  
100  
100  
V
= ±5V  
V = ±5V  
S
S
10  
1
10  
1
0.1  
0.01  
0.1  
0.01  
0.10  
1.0  
10  
100  
1K  
0.10  
1.0  
10  
100  
1K  
FREQUENCY (kHz)  
FREQUENCY (kHz)  
FIGURE 27. EQUIVALENT INPUT VOLTAGE NOISE vs  
FREQUENCY  
FIGURE 28. EQUIVALENT INPUT CURRENT NOISE vs  
FREQUENCY  
FN7383 Rev 4.00  
May 4, 2007  
Page 8 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
0.6  
0.4  
0.2  
2
1
T
= 1.75 ns  
T
= 2.4ns  
FALL  
FALL  
0
0.0  
-0.2  
-0.4  
-0.6  
V
= ±5V  
= +5  
= 25  
= 500  
= 5pF  
V
= ±5V  
A = +5  
V
S
S
T
= 1.75ns  
T
= 2.4ns  
RISE  
RISE  
A
V
R
R
R
C
V
= 25  
= 500  
= 5pF  
1
G
G
R
L
L
L
C
L
V
= 500mV  
= 2.0V  
OUT  
OUT  
-2  
-20  
0
20  
40 60  
80 100 120 140 160  
-20  
0
20  
40 60  
80 100 120 140 160  
TIME (ns)  
TIME (ns)  
FIGURE 29. SMALL SIGNAL STEP RESPONSE_RISE AND  
FALL TIME  
FIGURE 30. LARGE SIGNAL STEP RESPONSE_RISE AND  
FALL TIME  
7.0  
700  
A
R
R
C
= +5  
A
R
R
C
= +5  
V
G
V
G
= 25  
= 500  
= 5pF  
= 25  
= 500  
= 5pF  
6.8  
6.6  
6.4  
6.2  
6.0  
600  
500  
400  
300  
200  
L
L
L
L
V
= 4V  
OUT  
P-P  
POSITIVE SLEW RATE  
NEGATIVE SLEW RATE  
Please note that the curve showed positive current.  
The negative current was almost the same.  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
SUPPLY VOLTAGES (V)  
SUPPLY VOLTAGES (±V)  
FIGURE 31. SUPPLY CURRENT vs SUPPLY VOLTAGE  
FIGURE 32. SLEW RATE vs SUPPLY VOLTAGES  
50  
10  
V
= ±5V  
= +10  
= 226  
= 100  
= 10pF  
S
V
= ±5V  
= +10  
= 226  
= 100  
= 10pF  
Delta IM = (4.3) - (-69.4) = 73.7dB  
IP3 = 4.3 + (73.7/2) = 41dBm  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
S
45  
40  
35  
30  
25  
20  
15  
10  
5
A
V
A
V
R
R
C
F
R
R
C
F
L
L
f2 = 4.3dBm  
@ 1.05MHz  
L
L
@ 0.95MHz  
f1 = 4.3dBm  
2f2-f1 = -66.3dBm  
@ 1.15MHz  
2f1-f2 = -69.4dBm  
@ 0.85MHz  
0
0.8  
0.9  
1.0  
1.1  
1.2  
1
10  
100  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
FIGURE 33. THIRD ORDER IMD INTERCEPT (IP3)  
FIGURE 34. THIRD ORDER IMD INTERCEPT vs FREQUENCY  
FN7383 Rev 4.00  
May 4, 2007  
Page 9 of 15  
EL5134, EL5135, EL5234, EL5235  
Typical Performance Curves (Continued)  
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
JEDEC JESD51-3 LOW EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
1.4  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
909mW  
870mW  
625mW  
SO8  
486mW  
SO8  
=160°C/W  
JA  
=110°C/W  
JA  
435mW  
391mW  
MSOP8/10  
MSOP8/10  
=206°C/W  
JA  
=115°C/W  
JA  
SOT23-5/6  
SOT23-5/6  
=265°C/W  
JA  
=230°C/W  
JA  
0
25  
50  
75 85 100  
125  
150  
0
25  
50  
75 85 100  
125  
150  
AMBIENT TEMPERATURE (°C)  
AMBIENT TEMPERATURE (°C)  
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
0.15  
0.10  
0.05  
0
-0.05  
-0.10  
-0.15  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
IRE  
FIGURE 37. DIFFERENTIAL GAIN (%)  
0.15  
0.10  
0.05  
0
-0.05  
-0.10  
-0.15  
-0.20  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
IRE  
FIGURE 38. DIFFERENTIAL PHASE (°)  
appropriate because of restrictions placed upon the feedback  
element used with the amplifier.  
Product Description  
The EL5134, EL5135, EL5234 and EL5235 are voltage  
feedback operational amplifiers designed for communication  
and imaging applications requiring very low voltage and  
current noise. They also feature low distortion while drawing  
moderately low supply current and is built on Intersil's  
proprietary high-speed complementary bipolar process. The  
EL5134, EL5135, EL5234 and EL5235 use a classical voltage-  
feedback topology which allows them to be used in a variety of  
applications where current-feedback amplifiers are not  
Gain-Bandwidth Product and the -3dB Bandwidth  
The EL5134, EL5135, EL5234 and EL5235 have a gain-  
bandwidth product of 1500MHz while using only 6.7mA of  
supply current per amplifier. For gains greater than 5 their  
closed-loop -3dB bandwidth is approximately equal to the gain-  
bandwidth product divided by the noise gain of the circuit. For  
gains of 5, higher-order poles in the amplifiers' transfer function  
FN7383 Rev 4.00  
May 4, 2007  
Page 10 of 15  
EL5134, EL5135, EL5234, EL5235  
contribute to even higher closed loop bandwidths. For  
example, the EL5134, EL5135, EL5234 and EL5235 have a -  
3dB bandwidth of 650MHz at a gain of 5, dropping to 150MHz  
at a gain of 10. It is important to note that the EL5134, EL5135,  
EL5234 and EL5235 is designed so that this “extra” bandwidth  
in low-gain application does not come at the expense of  
stability. As seen in the typical performance curves, the  
EL5134, EL5135, EL5234 and EL5235 in a gain of only 5  
exhibited 0.2dB of peaking with a 500load.  
internal circuit latch-up, the slew rate between the negative  
and positve supplies must be less than 1V/nS.  
As supply voltages continue to decrease, it becomes  
necessary to provide input and output voltage ranges that can  
get as close as possible to the supply voltages. The EL5134,  
EL5135, EL5234 and EL5235 have an input range which  
extends to within 2V of either supply. So, for example, on ±5V  
supplies, the EL5134, EL5135, EL5234 and EL5235 have an  
input range which spans ±3V. The output range of the EL5134,  
EL5135, EL5234 and EL5235 is also quite large, extending to  
within 2V of the supply rail. On a ±5V supply, the output is  
therefore capable of swinging from  
Output Drive Capability  
The EL5134, EL5135, EL5234 and EL5235 are designed to  
drive a low impedance load. They can easily drive 6V  
signal  
P-P  
-3.1V to +3.1V. Single-supply output range is larger because of  
the increased negative swing due to the external pull-down  
resistor to ground.  
into a 500load. This high output drive capability makes the  
EL5134, EL5135, EL5234 and EL5235 and ideal choice for  
RF, IF, and video applications. Furthermore, the EL5134,  
EL5135, EL5234 and EL5235 are current-limited at their  
outputs, allowing them to withstand momentary short to  
ground. However, the power dissipation with output-shorted  
cannot exceed the power dissipation capability of the package.  
Power Dissipation  
With the wide power supply range and large output drive  
capability of the EL5134, EL5135, EL5234 and EL5235, it is  
possible to exceed the 150°C maximum junction temperatures  
under certain load and power-supply conditions. It is therefore  
important to calculate the maximum junction temperature  
Driving Cables and Capacitive Loads  
Although the EL5134, EL5135, EL5234 and EL5235 are  
designed to drive low impedance load, capacitive loads will  
decreases the amplifiers’ phase margin. As shown in the  
performance curves, capacitive load can result in peaking,  
overshoot and possible oscillation. For optimum AC  
(T  
) for all applications to determine if power supply  
JMAX  
voltages, load conditions, or package type need to be modified  
for the EL5134, EL5135, EL5234 and EL5235 to remain in the  
safe operating area. These parameters are related as follows:  
performance, capacitive loads should be reduced as much as  
possible or isolated with a series resistor between 5to 20.  
When driving coaxial cables, double termination is always  
recommended for reflection-free performance. When properly  
terminated, the capacitance of the coaxial cable will not add to  
the capacitive load seen by the amplifier.  
T
= T  
+  xPD  
MAXTOTAL  
JMAX  
MAX  
JA  
where:  
• P  
is the sum of the maximum power dissipation  
DMAXTOTAL  
of each amplifier in the package (PD  
)
MAX  
• PD  
MAX  
for each amplifier can be calculated as follows:  
Disable/Power-Down  
V
OUTMAX  
R
L
The EL5134 and EL5234 amplifiers can be disabled placing  
their outputs in a high impedance state. When disable, each  
amplifier current is reduced to 12uA. The EL5134 and EL5234  
are disabled when their CE pins are pulled up to within 1V of  
the power suply. Similarly, the amplifiers are enabled by  
floating or pulling its CE pin to at least 3V below the positive  
supply. For +/-5V supply, this means that EL5134 and EL5234  
amplifiers will be enabled when CE is 2V or less, and disabled  
when CE is above 4V. Although the logic levels are not  
stardard TTL, this choice of logic voltages allows the EL5134  
and EL5234 to be enabled by typing CE to ground, even in 5V  
single supply applications. The CE pin can be driveing from  
CMOS outputs.  
----------------------------  
PD  
= 2*V I  
+ V - V    
OUTMAX  
MAX  
S
SMAX  
S
where:  
• T  
= Maximum ambient temperature  
MAX  
= Thermal resistance of the package  
JA  
• PD  
= Maximum power dissipation of 1 amplifier  
MAX  
• V = Supply voltage  
S
• I  
= Maximum supply current of 1 amplifier  
= Maximum output voltage swing of the  
MAX  
• V  
OUTMAX  
application  
• R = Load resistance  
L
Supply Voltage Range and Single-Supply Operation  
Power Supply Bypassing And Printed Circuit Board  
Layout  
The EL5134, EL5135, EL5234 and EL5235 have been  
designed to operate with supply voltages having a span of  
greater than 5V and less than 12V. In practical terms, this  
means that they will operate on dual supplies ranging from  
±2.5V to ±6V. With single-supply, the EL5134, EL5135,  
EL5234 and EL5235 will operate from 5V to 12V. To prevent  
As with any high frequency devices, good printed circuit board  
layout is essential for optimum performance. Ground plane  
construction is highly recommended. Pin lengths should be  
kept as short as possible. The power supply pins must be  
closely bypassed to reduce the risk of oscillation. The  
FN7383 Rev 4.00  
May 4, 2007  
Page 11 of 15  
EL5134, EL5135, EL5234, EL5235  
combination of a 4.7µF tantalum capacitor in parallel with  
0.1µF ceramic capacitor has been proven to work well when  
placed at each supply pin. For single supply operation, where  
pin 4 (V -) is connected to the ground plane, a single 4.7µF  
S
tantalum capacitor in parallel with a 0.1µF ceramic capacitor  
across pin 8 (V +).  
S
For good AC performance, parasitic capacitance should be  
kept to a minimum. Ground plane construction again should be  
used. Small chip resistors are recommended to minimize  
series inductance. Use of sockets should be avoided since  
they add parasitic inductance and capacitance which will result  
in additional peaking and overshoot.  
FN7383 Rev 4.00  
May 4, 2007  
Page 12 of 15  
EL5134, EL5135, EL5234, EL5235  
Small Outline Package Family (SO)  
A
D
h X 45°  
(N/2)+1  
N
A
PIN #1  
I.D. MARK  
E1  
E
c
SEE DETAIL “X”  
1
(N/2)  
B
L1  
0.010 M  
C A B  
e
H
C
A2  
A1  
GAUGE  
PLANE  
SEATING  
PLANE  
0.010  
L
4° ±4°  
0.004 C  
b
0.010 M  
C
A
B
DETAIL X  
MDP0027  
SMALL OUTLINE PACKAGE FAMILY (SO)  
INCHES  
SO16  
(0.150”)  
SO16 (0.300”)  
(SOL-16)  
SO20  
SO24  
(SOL-24)  
SO28  
(SOL-28)  
SYMBOL  
SO-8  
0.068  
0.006  
0.057  
0.017  
0.009  
0.193  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
8
SO-14  
0.068  
0.006  
0.057  
0.017  
0.009  
0.341  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
14  
(SOL-20)  
0.104  
0.007  
0.092  
0.017  
0.011  
0.504  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
20  
TOLERANCE  
MAX  
NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.057  
0.017  
0.009  
0.390  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.406  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.606  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
24  
0.104  
0.007  
0.092  
0.017  
0.011  
0.704  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
28  
-
0.003  
0.002  
0.003  
0.001  
0.004  
0.008  
0.004  
Basic  
-
-
-
c
-
D
1, 3  
E
-
E1  
e
2, 3  
-
L
0.009  
Basic  
-
L1  
h
-
Reference  
Reference  
-
N
-
Rev. M 2/07  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not included.  
2. Plastic interlead protrusions of 0.010” maximum per side are not included.  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994  
FN7383 Rev 4.00  
May 4, 2007  
Page 13 of 15  
EL5134, EL5135, EL5234, EL5235  
SOT-23 Package Family  
MDP0038  
SOT-23 PACKAGE FAMILY  
e1  
D
A
6
MILLIMETERS  
SOT23-5  
4
N
SYMBOL  
SOT23-6  
1.45  
0.10  
1.14  
0.40  
0.14  
2.90  
2.80  
1.60  
0.95  
1.90  
0.45  
0.60  
6
TOLERANCE  
MAX  
A
A1  
A2  
b
1.45  
0.10  
1.14  
0.40  
0.14  
2.90  
2.80  
1.60  
0.95  
1.90  
0.45  
0.60  
5
±0.05  
E1  
E
±0.15  
2
3
±0.05  
0.15  
2X  
C
D
c
±0.06  
1
2
3
0.20  
2X  
C
D
Basic  
5
e
E
Basic  
E1  
e
Basic  
0.20  
C
A-B  
D
M
B
b
NX  
Basic  
e1  
L
Basic  
±0.10  
L1  
N
Reference  
Reference  
Rev. F 2/07  
0.15  
2X  
C
A-B  
1
3
D
NOTES:  
C
1. Plastic or metal protrusions of 0.25mm maximum per side are not  
included.  
A2  
SEATING  
PLANE  
2. Plastic interlead protrusions of 0.25mm maximum per side are not  
included.  
A1  
0.10  
NX  
C
3. This dimension is measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
5. Index area - Pin #1 I.D. will be located within the indicated zone  
(SOT23-6 only).  
6. SOT23-5 version has no center lead (shown as a dashed line).  
(L1)  
H
A
GAUGE  
PLANE  
0.25  
c
+3°  
-0°  
L
0°  
FN7383 Rev 4.00  
May 4, 2007  
Page 14 of 15  
EL5134, EL5135, EL5234, EL5235  
Mini SO Package Family (MSOP)  
MDP0043  
0.25 M C A B  
A
MINI SO PACKAGE FAMILY  
D
(N/2)+1  
MILLIMETERS  
N
SYMBOL  
MSOP8  
1.10  
0.10  
0.86  
0.33  
0.18  
3.00  
4.90  
3.00  
0.65  
0.55  
0.95  
8
MSOP10  
1.10  
0.10  
0.86  
0.23  
0.18  
3.00  
4.90  
3.00  
0.50  
0.55  
0.95  
10  
TOLERANCE  
Max.  
NOTES  
A
A1  
A2  
b
-
±0.05  
-
E
E1  
PIN #1  
I.D.  
±0.09  
-
+0.07/-0.08  
±0.05  
-
c
-
D
±0.10  
1, 3  
1
B
(N/2)  
E
±0.15  
-
E1  
e
±0.10  
2, 3  
Basic  
-
e
H
C
L
±0.15  
-
SEATING  
PLANE  
L1  
N
Basic  
-
Reference  
-
M
C A B  
b
0.08  
0.10 C  
Rev. D 2/07  
N LEADS  
NOTES:  
1. Plastic or metal protrusions of 0.15mm maximum per side are not  
included.  
L1  
2. Plastic interlead protrusions of 0.25mm maximum per side are  
not included.  
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
c
SEE DETAIL "X"  
A2  
GAUGE  
PLANE  
0.25  
L
DETAIL X  
A1  
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FN7383 Rev 4.00  
May 4, 2007  
Page 15 of 15  

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