F2950NEGK [RENESAS]

High Linearity SP2T Wi-Fi RF Switch 100MHz to 8GHz;
F2950NEGK
型号: F2950NEGK
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

High Linearity SP2T Wi-Fi RF Switch 100MHz to 8GHz

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中文:  中文翻译
下载:  下载PDF数据表文档文件
High Linearity SP2T Wi-Fi RF Switch  
100MHz to 8GHz  
F2950  
Datasheet  
Description  
Features  
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.
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Low insertion loss: 0.58dB at 2.5GHz  
The F2950 is a high power, reflective 5, single-pole double-  
throw (SP2T) RF switch. This device covers a 100MHz to 8GHz  
frequency range to support a wide variety of applications including  
WLAN 802.11.  
High isolation: 44dB at 2.5GHz  
Excellent linearity:  
.
.
.
IIP3 +69dBm at 2.4GHz and 5.9GHz  
IIP2 +115dBm at 2.4GHz  
IIP2 +117dBm at 5.9GHz  
The F2950 uses a single positive supply voltage and is  
compatible with both 1.8V and 3.3V control logic.  
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.
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.
.
.
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Second Harmonic: -93dBc at 5.9GHz  
Third Harmonic: -85dBc at 5.9GHz  
Typical switching speed: 170ns  
Supply voltage: +2.7V to +5.5V  
1.8V and 3.3V compatible control logic  
Competitive Advantage  
The F2950 provides extremely low insertion loss across a very  
broad bandwidth while providing high linearity performance  
across its operating range.  
-40°C to +105°C operating temperature range  
1.5mm x 1.5mm, 6-pin DFN package  
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.
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.
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.
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Optimized for Wi-Fi applications  
Wide bandwidth  
Low insertion loss  
Excellent linearity  
High power handling for large peak-to-average applications  
Fast switching  
Block Diagram  
Figure 1. Block Diagram  
No external matching required  
Minimal footprint  
RFC  
Typical Applications  
.
.
.
.
.
802.11 Wi-Fi  
RF1  
RF2  
Wireless Access Points, Gateways and Router Applications  
LTE and 4G Communication Systems  
2-Way Radios  
General Purpose  
VCC  
VCTL  
1
Rev O Aug 8, 2017  
Pin Assignments  
Figure 2. Pin Assignments for 1.5mm x 1.5mm x 0.55mm DFN, NEG6 Top View  
RF1  
VCTL  
1
6
EP  
F2950  
GND  
RF2  
RFC  
VCC  
5
4
2
3
Pin Descriptions  
Table 1.  
Pin Descriptions  
Pin  
Name  
Function  
Logic control pin. See Table 7 for logic control states.  
1
VCTL  
RF common port. Matched to 50in the insertion loss state only. If this pin is not 0V DC, then an external  
coupling capacitor must be used.  
Power supply. Bypass to GND with capacitors as close as possible to the pin.  
RF2 port. Matched to 50Ω in the insertion loss state only. If this pin is not 0V DC, then an external coupling  
capacitor must be used.  
Ground. Ground this pin as close to the device as possible.  
RF1 port. Matched to 50Ω in the insertion loss state only. If this pin is not 0V DC, then an external coupling  
capacitor must be used.  
2
3
4
5
6
RFC  
VCC  
RF2  
GND  
RF1  
Exposed pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple  
ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple ground  
vias are also required to achieve the specified RF performance.  
EP  
2
Rev O August 8, 2017  
Absolute Maximum Ratings  
Stresses beyond those listed below may cause permanent damage to the device. Functional operation of the device at these or any other  
conditions beyond those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
Table 2.  
Absolute Maximum Ratings  
Parameter  
Symbol  
Minimum  
Maximum  
Units  
VCC to GND  
VCTL to GND  
VCC  
-0.3  
+6.0  
V
Lower of  
(VCC + 0.3, 3.9)  
VLOGIC  
-0.3  
-0.3  
V
V
RF1, RF2, RFC to GND  
VRF  
+0.3  
28  
100MHz ≤ fRF ≤ 200MHz  
200MHz < fRF 500MHz  
500MHz < fRF 1GHz  
1GHz < fRF 6GHz  
fRF > 6GHz  
PABSCW1  
PABSCW2  
PABSCW3  
PABSCW4  
PABSCW5  
PABSPK1  
PABSPK2  
PABSPK3  
PABSPK4  
PABSPK5  
TJMAX  
Maximum Input CW Power,  
ZS = ZL = 50Ω,  
TEP = 25°C, VCC = 5.25V  
(any port, insertion loss state) [a]  
29  
30  
dBm  
dBm  
31  
30  
100MHz ≤ fRF ≤ 200MHz  
200MHz < fRF 500MHz  
500MHz < fRF 1GHz  
1GHz < fRF 6GHz  
fRF > 6GHz  
35  
Maximum Peak Power,  
ZS = ZL = 50Ω,  
TEP = 25°C, VCC = 5.25V  
(any port, insertion loss state) [a], [b]  
36  
37  
38  
37  
Maximum Junction Temperature  
Storage Temperature Range  
+140  
+150  
+260  
°C  
°C  
°C  
TSTOR  
-65  
Lead Temperature (soldering, 10s)  
TLEAD  
Electrostatic Discharge HBM  
(JEDEC/ESDA JS-001-2012)  
2000  
(Class C2)  
VESDHBM  
VESDCDM  
V
V
Electrostatic Discharge CDM  
(JEDEC 22-C101F)  
500  
(Class C2)  
[a] TEP is the temperature of the exposed paddle.  
[b] 5% duty cycle of 4.6ms period in a 50Ω environment.  
3
Rev O August 8, 2017  
 
 
 
Recommended Operating Conditions  
Table 3.  
Recommended Operating Conditions  
Parameter  
Power Supply Voltage  
Operating Temperature Range  
RF Frequency Range  
Symbol  
Conditions  
Exposed paddle  
Min  
2.7 [a]  
-40  
0.1  
Typ  
Max  
Units  
VCC  
TEP  
fRF  
3.3  
+25  
5.5  
+105  
8
V
°C  
GHz  
PRF_CW  
CW, insertion loss state  
5% duty cycle of 4.6ms period,  
insertion loss state  
See Figure 3  
See Figure 3  
50  
RF Input Power [b]  
dBm  
PRF_PULSE  
RFC, RF1, RF2 Port Impedance  
ZRF  
Ω
[a] Functional with reduced performance for 2.3V ≤ VCC < 2.7V.  
[b] Levels based on: VCC = 2.7V to 5.5V, 100MHz ≤ fRF 8GHz, ZS = ZL = 50. See Figure 3 for power handling derating  
vs. RF frequency.  
Figure 3. Maximum RF Input Operating Power vs. RF Frequency (ZS = ZL = 50Ω)  
4
Rev O August 8, 2017  
 
 
 
Electrical Characteristics  
Table 4.  
Electrical Characteristics  
See F2950 Typical Application Circuit. Specifications apply when operated with VCC = +3.3V, TEP = +25°C, PIN = 0dBm, ZS = ZL = 50Ω, single  
tone and two tone signals applied at RF1 or RF2 and measured at RFC when in the ON state, PCB board trace and connector losses are de-  
embedded, unless otherwise noted.  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Units  
Lower of  
(VCC, 3.6)  
Logic Input High Threshold  
VIH  
VCTL pin  
1.1 [b]  
V
Logic Input Low Threshold  
VIL  
VCTL pin  
VCTL pin  
-0.3  
0.6  
V
Logic Current  
DC Current  
IIH, IIL  
ICC  
-1  
+1  
250 [a]  
0.74  
0.79  
0.83  
0.88  
0.90  
µA  
µA  
170  
0.54  
0.58  
0.61  
0.64  
0.67  
0.73  
53  
44  
40  
37  
34  
31  
54  
44  
40  
37  
34  
30  
25  
fRF = 100MHz to 900MHz  
fRF = 900MHz to 2500MHz [c]  
fRF = 2500MHz to 3700MHz  
fRF = 3700MHz to 4900MHz  
fRF = 4900MHz to 6000MHz  
fRF = 6000MHz to 8000MHz  
fRF = 100MHz to 900MHz  
fRF = 900MHz to 2500MHz  
fRF = 2500MHz to 3700MHz  
fRF = 3700MHz to 4900MHz  
fRF = 4900MHz to 6000MHz  
fRF = 6000MHz to 8000MHz  
fRF = 100MHz to 900MHz  
fRF = 900MHz to 2500MHz  
fRF = 2500MHz to 3700MHz  
fRF = 3700MHz to 4900MHz  
fRF = 4900MHz to 6000MHz  
fRF = 6000MHz to 8000MHz  
fRF = 100MHz to 900MHz  
fRF = 900MHz to 2500MHz  
fRF = 2500MHz to 3700MHz  
fRF = 3700MHz to 4900MHz  
fRF = 4900MHz to 6000MHz  
fRF = 6000MHz to 8000MHz  
Insertion Loss (RF1 or RF2 to RFC)  
Isolation (RF1 or RF2 to RFC)  
Isolation (RF1 to RF2, RF2 to RF1)  
Return Loss (RFC, RF1, RF2)  
IL  
dB  
dB  
dB  
dB  
48  
39  
35  
32  
ISO1  
ISO2  
RL  
50  
40  
35  
32  
23  
22  
21  
20  
20  
[a] Items in min/max columns in bold italics are guaranteed by test.  
[b] Items in min/max columns that are not bold italics are guaranteed by design characterization.  
[c] Minimum or maximum specification guaranteed by test at 2.5GHz and by design characterization over the whole frequency  
range.  
5
Rev O August 8, 2017  
 
 
 
Electrical Characteristics  
Table 5.  
Electrical Characteristics  
See F2950 Typical Application Circuit. Specifications apply when operated with VCC = +3.3V, TEP = +25°C, PIN = 0dBm, ZS = ZL = 50Ω, single  
tone and two tone signals applied at RF1 or RF2 and measured at RFC when in the ON state, PCB board trace and connector losses are de-  
embedded, unless otherwise noted.  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Units  
fRF = 2.4GHz at PIN = +24dBm/tone  
100MHz tone spacing  
fRF = 5.9GHz at PIN = +24dBm/tone  
100MHz tone spacing  
f1 = 700MHz, f2 = 1.7GHz  
PIN = +24dBm/tone  
Measure 2.4GHz product  
f1 = 2.4GHz, f2 = 3.5GHz  
PIN = +24dBm/tone  
Measure 5.9GHz product  
fRF = 2.4GHz, PIN = +30dBm  
Measure 4.8GHz product  
fRF = 5.9GHz, PIN = +30dBm  
Measure 11.8GHz product  
fRF = 2.4GHz, PIN = +30dBm  
Measure 7.2GHz product  
fRF = 5.9GHz, PIN = +30dBm  
Measure 17.7GHz product  
fRF = 2.4GHz  
69  
Input IP3  
Input IP2  
IIP3  
dBm  
69  
115  
IIP2  
H2  
dBm  
dBc  
117  
104  
93  
Second Harmonic  
85  
Third Harmonic  
H3  
dBc  
dBm  
dBm  
85  
40  
40  
39  
Input 1dB compression [c]  
Spurious Output [d]  
P1dB  
fRF = 6GHz  
fRF = 8GHz  
fOUT > 5MHz  
All ports terminated, RBW = 100Hz  
Pspur1  
Pspur2  
-97  
-125  
10  
fOUT 5MHz  
All ports terminated, RBW = 100Hz  
Peak transient during switching.  
Measured with 20ns rise time,  
0V to 3.3V (3.3V to 0V) control  
Rise  
Fall  
Maximum Video Feed-Through  
on RF Ports  
VIDFT  
mVpp  
21  
pulse applied to VCTL  
50% VCTL to 90% RF  
50% VCTL to 10% RF  
50% VCTL to 99% RF  
50% VCTL to 1% RF  
.
170  
170  
190  
190  
125  
230  
230  
270  
270  
Switching Time [e]  
SWTIME  
SWRATE  
ns  
Maximum Switching Rate  
kHz  
[a] Items in min/max columns in bold italics are guaranteed by test.  
[b] Items in min/max columns that are not bold italics are guaranteed by design characterization.  
[c] The input 1dB compression point is a linearity figure of merit. Refer to the Absolute Maximum Ratingssection and Figure 3  
for the maximum RF input power.  
[d] Spurious due to on-chip negative voltage generator. Spurious fundamental is approximately 5.7MHz.  
[e] fRF = 1GHz. Rise and fall time of VCTL = 20ns.  
6
Rev O August 8, 2017  
 
 
 
Thermal Characteristics  
Table 6.  
Package Thermal Characteristics  
Parameter  
Symbol  
Value  
Units  
Junction to Ambient Thermal Resistance  
θJA  
200  
°C/W  
Junction to Case Thermal Resistance  
(Case is defined as the exposed paddle)  
θJC_BOT  
132  
°C/W  
Moisture Sensitivity Rating (Per J-STD-020)  
MSL 1  
Typical Operating Conditions (TOCs)  
Unless otherwise noted:  
.
.
.
.
.
.
.
VCC = +3.3V  
TEP = 25°C  
ZS = ZL = 50Ω  
fRF = 1GHz  
Small signal tests done at 0dBm input power  
All temperatures are referenced to the exposed paddle  
Evaluation Kit traces and connector losses are de-embedded  
7
Rev O August 8, 2017  
Typical Performance Characteristics [1]  
Figure 4. RF1 to RFC Insertion Loss vs.  
Figure 5. RF2 to RFC Insertion Loss vs.  
Frequency across Temperature  
Frequency across Temperature  
0
0
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
-0.6  
-0.7  
-0.8  
-0.9  
-1  
-0.1  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-0.2  
-0.3  
-0.4  
-0.5  
-0.6  
-0.7  
-0.8  
-0.9  
-1  
0
2000  
4000  
6000  
8000  
10000  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
Frequency (MHz)  
Figure 6. RF1 to RFC Isolation vs. Frequency  
Figure 7. RF2 to RFC Isolation vs. Frequency  
across Temperature  
across Temperature  
-20  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-30  
-40  
-50  
-60  
-70  
-80  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-90  
-90  
-100  
-100  
0
2000  
4000  
6000  
8000  
10000  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
Frequency (MHz)  
Figure 8. RF1 to RF2 Isolation vs. Frequency  
across Temperature [RF1 Selected]  
Figure 9. RF2 to RF1 Isolation vs. Frequency  
across Temperature [RF2 Selected]  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-90  
-90  
-100  
-100  
0
2000  
4000  
6000  
8000  
10000  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
Frequency (MHz)  
8
Rev O August 8, 2017  
Typical Performance Characteristics [2]  
Figure 10. RF1 Return Loss vs. Frequency  
across Temperature [RF1 Selected]  
Figure 11. RF2 Return Loss vs. Frequency  
across Temperature [RF2 Selected]  
0
0
-5  
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
-45  
-50  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-40  
-45  
-50  
0
2000  
4000  
6000  
8000  
10000  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
Frequency (MHz)  
Figure 12. RFC Return Loss vs. Frequency  
across Temperature [RF1 Selected]  
Figure 13. RFC Return Loss vs. Frequency  
across Temperature [RF2 Selected]  
0
0
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-5  
-5  
-40C 5.5V  
25C 5.5V  
105C 5.5V  
-40C 3.3V  
25C 3.3V  
105C 3.3V  
-40C 2.7V  
25C 2.7V  
105C 2.7V  
-40C 2.3V  
25C 2.3V  
105C 2.3V  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
0
2000  
4000  
6000  
8000  
10000  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
Frequency (MHz)  
Figure 14. EVKit PCB and Connector Thru Loss  
vs. Frequency across Temperature  
0
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
-0.6  
-0.7  
-0.8  
-0.9  
-1  
-40C  
25C  
105C  
0
2000  
4000  
6000  
8000  
10000  
Frequency (MHz)  
9
Rev O August 8, 2017  
Typical Performance Characteristics [3]  
Figure 15. Switching Time Isolation to Insertion  
Loss State  
Figure 16. Switching Time Insertion Loss to  
Isolation State  
10  
Rev O August 8, 2017  
Control Mode  
Table 7.  
Switch Control Truth Table  
VCTL  
LOW  
HIGH  
RFC to RF1  
OFF  
RFC to RF2  
ON  
ON  
OFF  
Application Information  
Default Start-up  
The VCTL control pin includes no internal pull-down resistors to logic LOW or pull-up resistors to logic HIGH.  
Power Supplies  
A common VCC power supply should be used for all pins requiring DC power. All supply pins should be bypassed with external capacitors to  
minimize noise and fast transients. Supply noise can degrade noise figure and fast transients can trigger ESD clamps and cause them to fail.  
Supply voltage change or transients should have a slew rate slower than 1V / 20µs. In addition, all control pins should remain at 0V (± 0.3V)  
while the supply voltage ramps up or while it returns to zero.  
Control Pin Interface  
If a clean control signal cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit at the input of the control pin is  
recommended.  
Figure 17. Control Pin Signal Integrity Improvement Circuit  
5k  
VCTL  
2pF  
RF1  
VCTL  
1
6
EP  
GND  
RF2  
RFC  
VCC  
5
4
2
3
F2950  
11  
Rev O August 8, 2017  
 
Evaluation Kit Picture  
Figure 18. Top View  
Figure 19. Bottom View  
12  
Rev O August 8, 2017  
Evaluation Kit / Applications Circuit  
Figure 20. Electrical Schematic  
Table 8.  
Bill of Material (BOM)  
Part Reference  
C1  
QTY  
Description  
Manufacturer Part #  
Manufacturer  
1
0
2
5
1
1
1
0.1µF ±10%, 16V, X7R, Ceramic Capacitor (0402)  
Not Installed (0402)  
GRM155R71C104K  
Murata  
C2 C8  
R1, R2  
J1 J5  
J6  
0Ω, 1/10W, Jumper (0402)  
ERJ-2GE0R00X  
142-0761-881  
67997-108HLF  
F2950NEGK6  
F2950 EVKit  
Panasonic  
Cinch Connectivity  
Amphenol FCI  
IDT  
50Ω Edge SMA Connector  
Conn Header Vert 4x2 Pos Gold  
SP2T Switch 1.5mm x 1.5mm 6-pin NEG6 DFN  
Printed Circuit Board  
U1  
IDT  
13  
Rev O August 8, 2017  
Evaluation Kit (EVKit) Operation  
External Supply Setup  
Set up a VCC power supply in the voltage range of 2.7V to 5.5V with the power supply output disabled.  
Connect the disabled VCC supply connection to J6 pin 3 or 5 and GND to J6 pin 2, 4, 6, or 8.  
Logic Control Setup  
With the logic control line disabled, set the logic HIGH and LOW levels to satisfy the levels stated in the electrical specifications table.  
Connect the disabled logic control line to VCTL (pin 1 of J6) and GND to J6 pin 2, 4, 6, or 8.  
Turn On Procedure  
Set up the supplies and EVKit as noted in the External Supply Setupand Logic Control Setupsections above.  
Enable the VCC supply.  
Enable the logic control signal.  
Set the VCTL logic setting to achieve the desired Table 7 configuration. Note that the VCTL control logic should not be applied without VCC  
being present.  
Enable any RF signal.  
Turn Off Procedure  
Disable any applied RF signal.  
Set VCTL to GND.  
Disable the VCC supply.  
14  
Rev O August 8, 2017  
 
 
Package Drawings  
Figure 21. Package Outline Drawing NEG6 Package  
15  
Rev O August 8, 2017  
Recommended Land Pattern  
Figure 22. Recommended Land Pattern NEG6 Package  
16  
Rev O August 8, 2017  
Marking Diagram  
1. Line 1: Y = last digit of the year, BA = sequential letters for traceability purposes  
2. Line 2: Pin 1 dot, 2 = F2950 part number code  
YBA  
2
Ordering Information  
Orderable Part Number  
Package  
MSL Rating  
Shipping Packaging  
Temperature  
F2950NEGK  
F2950NEGK8  
F2950EVBI  
1.5mm x 1.5mm x 0.55mm NEG6 DFN  
1.5mm x 1.5mm x 0.55mm NEG6 DFN  
Evaluation Board  
MSL1  
MSL1  
Cut Tape  
Reel  
-40°C to +105°C  
-40°C to +105°C  
17  
Rev O August 8, 2017  
Revision History  
Revision  
Revision Date  
Description of Change  
Rev O  
August 8, 2017  
Initial Release  
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