HD74LV06AT [RENESAS]
LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14, TTP-14D;
| 型号： | HD74LV06AT |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14, TTP-14D 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总8页 (文件大小：60K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74LV06A
Hex Inverter Buffers / Drivers with Open Drain Outputs
REJ03D0230–0500Z
(Previous ADE-205-296B (Z))
Rev.5.00
May 21, 2004
Description
The HD74LV06A has six inverter buffers / drivers with open drain outputs in a 14-pin package.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
All outputs VO (Max.) = 5.5 V (@VCC = 2.0 V to 5.5 V, Output “Z” state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV06AFPEL
HD74LV06ARPEL
HD74LV06ATELL
SOP–14 pin(JEITA)
SOP–14 pin(JEDEC)
TSSOP–14 pin
FP–14DAV
FP–14DNV
TTP–14DV
FP
RP
T
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Input A
Output Y
L
Z
L
H
Note: H: High level
L: Low level
Z: High impedance
Rev.5.00, May 21, 2004, page 1 of 7
HD74LV06A
Pin Arrangement
1A
1Y
VCC
14
1
2
3
4
5
6
7
13 6A
2A
6Y
12
2Y
5A
11
3A
5Y
10
3Y
4A
4Y
9
8
GND
(Top view)
Absolute Maximum Ratings
Item
Symbol
VCC
Ratings
Unit
V
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
–0.5 to 7.0
–0.5 to 7.0
VI
V
VO
–0.5 to VCC + 0.5
V
Output: Z or L
VCC: OFF
VI < 0
–0.5 to 7.0
–20
Input clamp current
IIK
IOK
IO
mA
mA
mA
mA
Output clamp current
Continuous output current
±50
VO < 0
±35
VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND ±50
Maximum power dissipation at PT
Ta = 25°C (in still air)*3
785
mW
SOP
500
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 7.0 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.5.00, May 21, 2004, page 2 of 7
HD74LV06A
Recommended Operating Conditions
Item
Symbol
VCC
VI
Min
2.0
0
Max
5.5
5.5
5.5
50
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
Output current
V
VO
0
V
IOL
—
—
—
—
0
µA
mA
VCC = 2.0 V
2
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
8
16
Input transition rise or fall rate
Operating free-air temperature
∆t / ∆v
200
100
20
ns/V
°C
0
0
Ta
–40
85
Note: Unused or floating inputs must be held high or low.
Logic Diagram
A
Y
DC Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol
VCC (V)*
Min
Typ Max
Unit Test Conditions
Input voltage
VIH
2.0
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.5
V
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
V
V
V
CC × 0.7
CC × 0.7
CC × 0.7
VIL
—
—
—
—
—
—
—
—
—
—
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
V
V
V
CC × 0.3
CC × 0.3
CC × 0.3
Output voltage
Input current
VOL
0.1
V
IOL = 50 µA
IOL = 2 mA
0.4
3.0
0.44
0.55
±1
IOL = 8 mA
4.5
IOL = 16 mA
VIN = 5.5 V or GND
VO = 5.5 V
IIN
0 to 5.5
Min to Max
µA
µA
Off state output
current
IOZ
±2.5
Quiescent supply
current
ICC
5.5
0
—
—
—
—
20
5
µA
µA
pF
VIN = VCC or GND, IO = 0
VI or VO = 0 to 5.5 V
VI = VCC or GND
Output leakage
current
IOFF
—
Input capacitance
CIN
3.3
2.3
—
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.5.00, May 21, 2004, page 3 of 7
HD74LV06A
Switching Characteristics
VCC = 2.5 ± 0.2 V
TO
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
Item
Symbol
Unit Conditions
(Output)
Min Typ Max Min
Max
13.0
18.0
13.0
18.0
Propagation
delay time
tPLH
—
—
—
—
4.7
9.5
5.4
7.9
10.4 1.0
15.2 1.0
10.4 1.0
15.2 1.0
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
tPHL
VCC = 3.3 ± 0.3 V
TO
Item
Symbol Ta = 25°C
Ta = –40 to 85°C
Unit Test
Conditions
FROM
(Input)
(Output)
Min Typ Max Min
Max
8.5
Propagation
delay time
tPLH
tPHL
—
—
—
—
4.0
7.3
4.3
5.8
7.1
10.6 1.0
7.1 1.0
10.6 1.0
1.0
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
12.0
8.5
12.0
VCC = 5.0 ± 0.5 V
TO
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
Item
Symbol
Unit Conditions
(Output)
Min Typ Max Min
Max
6.5
8.5
6.5
8.5
Propagation
delay time
tPLH
—
—
—
—
3.3
5.6
3.4
4.1
5.5
7.5
5.5
7.5
1.0
1.0
1.0
1.0
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
tPHL
Operating Characteristics
CL = 50 pF
Ta = 25°C
Item
Symbol
VCC (V)
Unit
Test Conditions
Min
—
Typ
9.6
Max
Power dissipation capacitance CPD
3.3
5.0
—
—
pF
f = 10 MHz
—
11.4
Noise Characteristics
CL = 50 pF
Test Conditions
Ta = 25°C
Min
Item
Symbol
VCC (V)
Unit
Typ
Max
Quiet output, maximum
dynamic VOL
VOL (P)
VOL (V)
VIH (D)
VIL (D)
3.3
—
0.3
0.8
V
Quiet output, minimum
dynamic VOL
3.3
3.3
3.3
—
–0.1
—
–0.8
—
V
V
V
High-level dynamic input
voltage
2.31
—
Low-level dynamic input
voltage
—
0.99
Rev.5.00, May 21, 2004, page 4 of 7
HD74LV06A
Test Circuit
VCC
RL= 1 k
Ω
*
C L
Note: CL includes the probe and jig capacitance.
• Waveform − 1
tr
tf
VCC
0 V
90%
50% VCC
90%
50% VCC
Input
10%
10%
tPHL
tPLH
VOH
50% VCC
VOL+ 0.3 V
Output
VOL
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r≤ 3 ns, t f ≤ 3 ns
2. The output are measured one at a time with one transition per measurement.
Rev.5.00, May 21, 2004, page 5 of 7
HD74LV06A
Package Dimensions
As of January, 2003
Unit: mm
10.06
10.5 Max
8
14
1
7
+ 0.20
7.80
– 0.30
1.42 Max
1.15
0˚ – 8˚
1.27
0.70 ± 0.20
*0.40 ± 0.06
0.15
M
0.12
Package Code
JEDEC
FP-14DAV
—
JEITA
Mass (reference value)
Conforms
0.23 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
8.65
9.05 Max
8
14
1
7
+ 0.10
6.10
– 0.30
0.635 Max
1.08
0˚ – 8˚
+ 0.67
1.27
0.60
– 0.20
*0.40 ± 0.06
0.15
M
0.25
Package Code
JEDEC
JEITA
FP-14DNV
Conforms
Conforms
0.13 g
*Ni/Pd/Au plating
Mass (reference value)
Rev.5.00, May 21, 2004, page 6 of 7
HD74LV06A
As of January, 2003
Unit: mm
5.00
5.30 Max
14
8
1
7
0.65
1.0
*0.20 ± 0.05
0.13 M
6.40 ± 0.20
0.83 Max
0˚ – 8˚
0.50 ± 0.10
0.10
Package Code
JEDEC
TTP-14DV
—
JEITA
—
*Ni/Pd/Au plating
Mass (reference value)
0.05 g
Rev.5.00, May 21, 2004, page 7 of 7
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